TW200813443A - Power level detector - Google Patents

Abstract

A power level detector is disclosed, which comprising a voltage divider dividing a voltage source of a chip and outputting a detected voltage, a bandgap voltage generator generating a bandgap voltage after the voltage source being reset and regained to a specific level, a compare circuit comparing the detected voltage and the bandgap voltages to determine the voltage level of the voltage source, a control circuit disabling the compare circuit when the bandgap voltage has not generated yet and switching from disabling to enabling the compare circuit when the badgap voltage has generated, and a forced circuit controlling the output of the compare circuit which is disabled.

Description

200813443 IX. Invention Description: [Technical field of invention] This case relates to a voltage source level detecting device (P〇Wer detector) 〇 [Prior Art]

FIG. 1 is a conventional voltage source level detecting device 100 for detecting the level of a voltage source VDD used by a chip, including a bandgap voltage generator, § (Bandgap Voltage Generator) 102, and a debt. The voltage generating circuit 104 and a comparator CMP are measured. The bandgap reference voltage generator 102 is commonly used in a general integrated circuit chip to generate a bandgap and divide the voltage source vDD to produce a measured voltage v. As shown in the figure, after the bandgap reference voltage VBG is generated, the transistor is turned on and the test voltage vBG is supplied to the wafer for reference. The bandgap reference voltage Vbg is a fixed value (typically 1.25 volts) that is unaffected by temperature and does not drift with the voltage source. The detection voltage generating circuit 1〇4 includes three transistors (River 1, 2, and 3) and two resistors (heart and R2), which are used to generate voltage in the gap reference voltage The crystal M2 is operated in a saturation region, and the transistor Ms is turned on and generates a current flowing through the above-mentioned resistor core and the ruler 2. Since the area of the electrode is much larger than that of the transistor, the transistor is operated in a linear region and operates in a resistive state with a resistance value of 玟, ^ R〇n, Ri, and I. After the source VDD is divided, the output is now ^°η° with Vdet. After comparing the detection voltage Vdet and the voltage voltage VBG, the comparator CMP rotates a flag Flag to indicate a comparison result, and the gap reference

Clienfs Docket No.: VIT06-0147 么, aged niece TT^s Docket No:0608-A41005-TW/Final /Glorious Tien ^ 200813443 Voltage source vDD current level. However, when the voltage source VDD is reset, the conventional voltage source level detecting device 100 often causes an error. Because the bandgap reference voltage generator 102 does not immediately generate the bandgap reference voltage VbG after the voltage source VDD is reset; it must be generated after the voltage source V|)D returns to a level. The gap reference voltage Vbg. For example, assuming that Vdd is 5V, after the voltage source VDD is reset, the bandgap reference voltage generator 102 does not output the bandgap reference voltage VBG at first, and must wait until the voltage source VDD rises to a level. The bandgap reference voltage vBG is generated after a bit (for example, 2.5V). As a result, after the voltage source VDD is reset and has not recovered to the level, the two input signals of the comparator CMP (the gap reference voltage VBG and the detection voltage Vdet) are not yet prepared. Ok, so the operation of the comparator CMP will be wrong. SUMMARY OF THE INVENTION The present invention provides a novel voltage source level detecting device that avoids the problems that occur when the conventional voltage source level detecting device 100 is reset at a voltage source. The voltage source level detecting device proposed by the present invention comprises a voltage source voltage divider, a bandgap reference voltage generator, a comparison circuit, a control circuit, and a forcing circuit. The voltage source voltage divider is used to divide a voltage source to generate a detection voltage. After resetting the voltage source, the bandgap reference voltage generator generates a bandgap reference voltage after the voltage source returns to a level. The comparison circuit is configured to compare the detection voltage and the gap reference voltage to determine the level of the voltage source. The energy gap reference voltage is still

Client's Docket N〇.:VIT06-0147 TT,s Docket No:0608-A41005-TW/Final /Glorious—Tien 200813443 When not generated, the control circuit will disable the comparison circuit energy gap. The control circuit is configured to enable the comparison circuit to form an enableM comparison circuit. This is forcibly connected to the output terminal of the comparison circuit (4) control circuit (4). When the viewing circuit is in the de-energized state, the forcing circuit forces the voltage of the output terminal of the comparison circuit to be a certain value to prevent the comparison circuit from rotating an error message. The above and other objects, features, and advantages of the present invention will become more apparent and understood. [Embodiment] FIG. 2 is a schematic diagram of an electric waste source leveling device according to the present invention, wherein a voltage source level detecting device 2 (8) includes a voltage source voltage divider 2〇2', a bandgap reference The voltage generator 2〇4, a comparison circuit 206, a control circuit 208, and a forcing circuit 21〇. The voltage source voltage divider 2〇2 divides a voltage source vDD and outputs a detection voltage Vdet. The detection voltage v - is the partial pressure of the voltage source vdd. The bandgap reference voltage generator 204 is used to generate a bandgap reference voltage VBG having a fixed chirp. When the voltage source vDD is reset, the bandgap reference voltage generator 2〇4 must wait for the voltage source VDD to rise to a level before generating the bandgap reference voltage VBG. The comparison circuit 206 is configured to compare the detection voltage vdet and the gap reference voltage VBG to determine the level of the voltage source VDD. The enable/disable of the comparison circuit 206 is controlled by the control circuit 208. The operation of the control circuit 208 is to disable the comparison circuit 206 when the bandgap reference voltage Vbg has not yet been generated. The gap reference voltage

Client’s Docket No.:VIT06-0147 TT^s Docket No:0608-A41005-TW/Final /Glorious_Tien , 200813443

After the Vbg is generated, the operation of the control circuit 208 is switched to enable the comparison circuit 206 by the comparison circuit 2〇6. The forcing circuit 210 | is connected to the output of the comparison circuit 206 and is also controlled by the control circuit 208. When the comparison circuit 206 is in the de-energized state, the forcing circuit 21 强制 forces the output terminal voltage of the comparison circuit 206 to a certain value to prevent the comparison circuit 206 from outputting an erroneous comparison result. FIG. 3 is an embodiment of the voltage source level detecting device of the present invention. The comparison circuit 302 employed by the voltage source level detecting device 300 includes a comparator CMP and a first switch sWi. The first switch SW1 is coupled between the power terminal of the comparator CMP and the voltage source VDD, and is controlled by a first control signal cSi generated by the control circuit 304. The first switch sWi is non-conducting when the control circuit 304 de-energizes the comparison circuit 302, and is turned on when the control circuit 304 enables the comparison circuit 302. As shown in Fig. 3, the voltage source level detecting means 30 implements the forcing circuit 210 of Fig. 2 with a second switch SW2. The second switch SW2 is controlled by a second control signal CS2 generated by the control circuit 304. Since the real-mode embodiment inputs the bandgap reference voltage VBG to the inverting input terminal of the comparator CMP and inputs the detection voltage Vdet to the non-inverting input terminal of the comparator CMP, the second switch SW2 must When the comparison circuit 302 is in the de-energized state, the output terminal is coupled to a ground terminal (a certain voltage terminal) to ensure that the comparison circuit 302 does not misjudge the detection voltage when the comparison circuit 302 is in the de-energized state. Vdet is higher than the bandgap reference voltage VBG. 4 is an embodiment of the control circuit 304, including a capacitor C, a discharge circuit 402, a first inverter InV1, and a second inversion.

Client’s Docket N〇.:VIT06-0147 TT5s Docket No:0608-A41005-TW/Final /Glorious Tien 200813443 Inv2. As shown, the first end and the second end of the capacitor c are coupled to the voltage source VDD and the discharge circuit 402, respectively. The discharge circuit 4〇2 is activated after the 胄b-gap reference voltage Vbg is generated to generate a discharge current to discharge the capacitor C. The input end of the first inverter InV1 is coupled to the one end of the capacitor c, and outputs the first control signal CS to control the first switch SW!. When the first control signal 〇51 is at a high level, the first switch SWi is turned on, and the comparison circuit 302 is enabled; otherwise, the first switch SW1 is not turned on, and the comparison circuit 302 is disabled. The input end of the second inverter InV2 is connected to the output end of the first inverter Inv! for inverting the first control signal CSi to generate the second control signal CS2 to control the second switch SW2. When the second control signal CS2 is at a high level, the second switch sw2 is turned on, and vice versa. In the present invention, the above-described discharge current I may decrease as the voltage level of the second terminal of the capacitor C decreases. Figure 5 is a further embodiment of the control circuit 〇4. The discharge circuit 502 is a current mirror comprising a first transistor IV and a second transistor. The gate of the first transistor is coupled to the drain. The first and second transistors (the gate voltages of the first and second transistors are controlled by the bandgap reference voltage, and have the same gate-source voltage difference. The first transistor of the transistor is coupled to the capacitor C. Referring to FIG. 5, when the voltage source VDD is reset but has not yet risen to a level, the gap reference voltage VBG has not yet been generated, so the discharge circuit 502 has not been turned on, and the discharge current I is zero. When the potential of the second end of the capacitor c changes with its first end point, that is, with the voltage source

Client’s Docket No·: VIT06-0147 TT^ Docket No: 0608-A41005-TW/Final /Glorious Tien 200813443 l. Therefore, after the potential of the second end of the capacitor c is processed by the first and second inverters InV1 and InV2, the first control signal CS! of the low level and the second control signal cs2 of the high level are output. . Referring to FIG. 3, by the above-mentioned control signals (CS! and CS2), the control circuit 304 can disable the comparison circuit 302 and force the flag Flag generated by the comparison circuit 302 to be grounded to avoid the The comparison circuit 302 outputs an erroneous judgment result. Referring to Figure 5, after the voltage source VDD rises to the level, the bandgap reference voltage VBG is generated, the discharge device 5〇2 is turned on and a discharge current is generated, and the capacitor is discharged. FIG. 6 is the discharge current ί and A diagram of the relationship between the second transistor Μ2 and the source voltage difference vDS_M2. As shown in FIG. 6, when the discharge current I is generated, the potential of the second end of the capacitor C (ie, the source-to-source voltage difference vDSJV12 of the second transistor %) is v〇, and the discharge current is 1: =10. The potential of the second terminal of the capacitor c (Vds - M2) gradually decreases during discharge. As shown in Fig. 6, the discharge current I also gradually decreases, and finally both fall to zero. The discharging process causes the second terminal potential of the capacitor C to be processed by the first and second inverters 1!! ¥1 and InV2, and outputs the first control signal CS: and the low level of the high level. The second control signal CS2. Therefore, the comparison circuit 302 is enabled and the wheel output of the comparison circuit 302 is no longer forced to ground. The comparison circuit 302 is ready for normal operation. The discharge circuit 702 used in another embodiment of the control circuit 304 is an N-type MOS transistor Mn, the gate of which is coupled to the bandgap reference voltage VBG, and the drain of the circuit is coupled to the capacitor. The second end of C and its source is grounded. It can be seen from the above embodiment that the discharge circuit of the present invention stops supplying the discharge after the potential of the second terminal of the capacitor C falls to zero.

Client's Docket N〇.:VIT06-0147 TT^ Docket No:0608-A41005-TW/Final /Glorious Tien 200813443 i, so the present invention does not require a lot of energy. Figure 8 is another embodiment of the present invention, wherein the voltage source knife state 802 is a plurality of resistors connected in series between the voltage source vDD and a ground terminal (the present embodiment is Ri and D) The invention adopts a simple resistor partial pressure, and the user can easily grasp the relationship between the detection voltage vdet and the voltage source Vdd. In contrast, the conventional voltage source level detecting device of FIG. 1 , the detection voltage generating circuit 104 The resistance value R〇n of the transistor M3 varies with the process, and is difficult to grasp, which is easy to cause trouble to the user. FIG. 9 is another embodiment of the present invention, further including a switching device 902 coupled to the voltage source. The voltage divider 904 and the comparison circuit 906 are configured to switch the detection voltage Vdet to a ground terminal to input the comparison circuit 906 when the comparison circuit 906 is in an unenergized state. As shown, the switching device The 902 includes a third switch SW3 and a fourth switch sW4. The third switch SW3 is turned on when the comparison circuit 906 is enabled (the first control signal 081 is at a high level) for coupling the detection. Voltage vdeti the comparison circuit 906. The fourth The switch SW4 is turned on when the comparison circuit 906 is disabled (the first control "is number CS2 is the 鬲 level) for coupling the ground terminal to the comparison circuit 906. Fig. 10 is another An embodiment includes a plurality of sets of comparison circuits (1002 and 1004). The voltage source voltage dividers 1〇〇6 of the present embodiment output two sets of measurement voltages (Vdetl and Vdet2), respectively input to the comparison circuit 1〇〇. 2 and 1004. The operation of the comparison circuits 1002 and 1-4, and the operation of the forcing circuit that is lightly connected to the output thereof are the same as those of other embodiments of the present invention. By this embodiment, the user Can be judged by flags Flagl and nag2

Client’s Docket N〇.:VIT06-0147 TT^ Docket No:0608-A41005-TW/Final /Glorious__Tien 200813443 This voltage source VDD is currently within a certain voltage range. The present invention has been described above with reference to the preferred embodiments thereof, and is not intended to limit the scope of the present invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

Clienfs Docket No.:VIT06-0147 TT^ Docket No:0608-A41005-TW/Final /Glorious_Tien 200813443 [Simplified Schematic] FIG. 1 is a conventional voltage source level detecting device; FIG. 2 is a view of the present invention FIG. 3 is a schematic diagram of a voltage source level detecting device according to the present invention; FIG. 4 is an embodiment of the control circuit 304; FIG. 5 is another embodiment of the control circuit 304. An embodiment; FIG. 6 is a diagram showing the relationship between the discharge current I and the threshold voltage difference Vds__M2 of the second transistor M2 of FIG. 5; FIG. 7 is another embodiment of the control circuit 304; An embodiment of the voltage source level detecting device of the present invention; FIG. 9 is an embodiment of the voltage source level detecting device of the present invention; and FIG. 10 is a voltage source level detecting device of the present invention. An embodiment. [Main component symbol description] 100~ conventional voltage source level detecting device; 102~gap reference voltage generator; 104~ detecting voltage generating circuit; 200~voltage source level detecting device; 202~voltage source voltage dividing 204~bandgap reference voltage generator; 206~comparing circuit; 208~control circuit; 210~force circuit; 300~voltage source level detecting device; 302~comparing circuit; 304~control circuit; 402~discharging circuit 502~ discharge circuit, 702~ discharge circuit, 802~voltage source voltage divider; 902~ switching circuit;

Clienfs Docket N〇.:VIT06-0147 TT5s Docket No:0608-A41005-TW/Final /Glorious Tien 13 200813443 904~voltage source voltage divider; 906~ comparison circuit; 1002,1004~ comparison circuit; 1006~voltage source C=capacitor; CMP~comparator; cs!~first control signal; cs2~second control signal;

Flag, Flagl, Flag2~ comparison circuit output flag; I~ discharge current; Inv^ first inverter;

Inv2 ~ second inverter; Mi, M2, and M3 ~ transistor; # R! and R2 ~ resistance; Mn ~ N type MOS semi-transistor SWi ~ first switch; SW2 ~ second switch; SW3 ~ Three switches; SW4~fourth switch; VBG~gap reference voltage; VDD~voltage source;

Vdet, Vdetl, Vdet2 ~ detection voltage.

Clienfs Docket No.:VIT06-0147 TT^ Docket No:0608-A41005-TW/Final /Glorious Tien 14

Claims (1)

200813443 X. Patent application scope: 1. A voltage source level detecting device, comprising: a voltage source voltage divider, dividing a voltage source to generate a detecting voltage; and a band gap reference voltage generator The voltage source is reset and returns to a level to generate a bandgap reference voltage; a comparison circuit compares the detected voltage and the bandgap reference voltage to determine the level of the voltage source; a control circuit When the bandgap reference voltage has not been generated, the comparison circuit is enabled, and after the bandgap reference voltage is generated, the comparison circuit is converted to enable the comparison circuit; and a compulsory circuit is coupled to the comparison circuit. The output end is controlled by the control circuit for forcing the output terminal voltage of the comparison circuit to be a certain value when the comparison circuit is not enabled by the control circuit. 2. The voltage source level detecting device according to claim 1, wherein the comparing circuit comprises: a comparator; and a first switch coupled to the power terminal of the comparator and the voltage source Between the control circuit, the control circuit is non-conducting when the control circuit is de-energized, and is turned on when the control circuit enables the comparison circuit. 3. The voltage source level detecting device according to claim 2, wherein the forcing circuit is a second switch for coupling the comparison circuit when the control circuit has not enabled the comparison circuit. The output is connected to a certain voltage terminal to provide the constant value. Client's Docket No.: VIT06-0147 TTys Docket No: 0608-A41005-TW/Final /Glorious_Tien 200813443 4. The voltage source level detecting device according to claim 3, wherein the control circuit comprises: a capacitor a first end point coupled to the voltage source; a discharge device coupled to the second end of the capacitor, activated after the bandgap reference voltage is generated to generate a discharge current to discharge the capacitor; The first end of the capacitor is coupled to the second end of the capacitor to output a first control signal to control the first switch, wherein when the first control signal is at a high level, the first switch is turned on, and vice versa And a second inverter for inverting the first control signal to generate a second control signal to control the second switch, wherein the second switch is at a high level, the second switch Turn on, otherwise it won't turn on. 5. The voltage source level detecting device of claim 4, wherein the discharge current decreases as the voltage level of the second terminal of the capacitor decreases. 6. The voltage source level detecting device according to claim 4, wherein the discharging device is a current mirror, comprising: a first transistor, the gate and the drain are coupled together And a second transistor having the same gate-source voltage difference as the first transistor, wherein the second transistor has a drain coupled to the second end of the capacitor, and the second transistor The gate is coupled to the gate of the first transistor to the output of the bandgap reference voltage generator. 7. The voltage source level detecting device according to claim 4, wherein the discharging device is a 金-type MOS transistor, the gate of which is coupled to the output of the bandgap reference voltage generator. Clienfs Docket N〇.:VIT06-0147 TT5s Docket No:0608-A41005-TW/Final /Glorious_Tien 200813443 The second end of the pole is coupled to the ground. 8. The voltage source level detecting device according to the item of claim 4, wherein the voltage source can be composed of a plurality of resistors connected in series between the voltage source and a ground. The voltage source level detecting device of claim 1 further includes a switching split for switching the price measurement voltage to a ground terminal when the control circuit has not enabled the comparison circuit. Enter the comparison circuit. 10. The voltage source level detection device according to claim 9 of the patent application scope, wherein the switching device comprises: a second switch controlled by the control circuit for enabling the comparison circuit in the control circuit And coupling the detection voltage to the comparison circuit, and is non-conducting when the control circuit can disable the comparison circuit; and a fourth switch controlled by the control circuit to enable the comparison at the control circuit In the circuit, the ground terminal is coupled to the comparison circuit, and is non-conductive when the control circuit enables the comparison circuit. Client’s Docket N〇.:VIT06-0147 TT,s Docket No:0608-A41005-TW/Final /Glorious—Tien 17