BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to integrated circuits and in particular to MOS integrated circuits. Still more particularly, the present invention relates to switch circuitry for switching between power supplies.
2. Description of the Related Art
In some situations, it is desirable to provide retention of data in integrated circuits such as memory devices. A number of circuits are commercially available for retaining data in SRAMS when power is removed. An example of one such device may be found in U.S. Pat. No. 5,099,453, entitled Configuration Memory For Programmable Logic Device, U.S. Pat. No. 4,713,555, entitled Battery Charging Protection Circuit; U.S. Pat. No. 4,122,359, entitled Memory Protection Arrangement, and U.S. Pat. No. 4,451,742, entitled Power Supply Control For Integrated Circuit. These devices are often known as “zero power circuits”. Typically, in a zero power circuit, the contents of the circuit are protected in the event that the power supply voltage to that circuit drops below some predetermined or selected threshold voltage i.e., the voltage of a secondary power supply. This protection may be accomplished by switching the circuit from a primary power apply to a secondary power supply, typically an internal battery, when the voltage of the primary power supply drops below that of the secondary power supply.
Power control circuits exist which provide automatic sensing of a primary power source voltage. These power control circuits provide for automatic switching to a secondary power source when the primary power source voltage drops below a predetermined threshold voltage.
Typically, a comparator is employed to compare the voltage of the external power source with the voltage of a predetermined threshold, which is typically the voltage of the battery power supply. When the external power supply voltage drops below the voltage of the battery power supply voltage, the circuit typically switches the integrated circuit to the battery power supply from the external power supply. Such a system works well for integrated circuit systems that employ 5.0 volt power supplies. Problems, however, occur for integrated circuit systems running on power supply voltages at 3.0 volts. In particular, these powers supply voltages may range about from 2.7 to about 4.0 volts. As a result, at various times the external power supply voltage may drop below that of the battery supply power voltage. Therefore, it would be advantageous to have a method and apparatus for switching power supplies that does not rely on the voltage of the battery power supply as a reference voltage to switch power supplies.
SUMMARY OF THE INVENTION
The present invention provides an apparatus and method for switching between two power supplies, a primary power supply and a secondary power supply. The present invention generates a first reference voltage using the voltage of the primary power supply and the secondary power supply, wherein the primary power supply voltage is variable. The present invention also generates a second reference voltage based on the voltage of the primary power supply. The first and second reference voltages each have a different slope and the crossing point between these two reference voltages indicate that a switch between the primary power supply and the secondary power supply should occur.
Typically, the primary power supply is an external power supply to a integrated circuit, and the secondary power supply is a battery power supply that is used when the primary power supply voltage drops below some pre-selected level. The primary power supply voltage is reconnected to the integrated circuit when it exceeds the preselected level. These preselected levels are selected by adjusting the crossing point between the first and second reference voltages according to the present invention.
The above as well as additional objectives, features, and advantages of the present invention will become apparent in the following detailed written description.
BRIEF DESCRIPTION OF THE DRAWINGS
The novel features believed characteristic of the invention are set forth in the appended claims. The invention itself, however, as well as a preferred mode of use, further objectives and advantages thereof, will best be understood by reference to the following detailed description of an illustrative embodiment when read in conjunction with the accompanying drawings, wherein:
FIG. 1 is a diagram of a integrated circuit system that is powered both a primary and a secondary power supply;
FIG. 2 depicts a circuit for generating control signals known in the art;
FIG. 3 is a circuit for generating control signals;
FIG. 4 depicts a schematic diagram of a circuit for generating signals for detecting a switching point according to the present invention;
FIG. 5 is a schematic diagram of a reference circuit implemented in a N-well CMOS process; and
FIGS. 6 and 7 depict graphs of voltages Vcc1, Vbat, Vref, and Va according to the present invention.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENT
With reference now to the figures, and in particular with reference to FIG. 1 is a diagram of a integrated circuit system that is powered both a primary and a secondary power supply. Load 10 is connected to either power supply voltage Vbat or Vcc1. Power supply voltage Vbat is a fixed power supply voltage while power supply voltage Vcc1 is a varied power supply voltage. The power supply voltage connected to load 10 is controlled by transistors M1 and M2. Load 10 is connected to lower power supply voltage Vss, which is a power supply voltage having a voltage less than either power supply voltage Vbat or Vcc1. The gates of transistors M1 and M2 are controlled by control signals CTL and {overscore (CTL)}.
Presently, these control signals are generated by the circuit system shown in FIG. 2. Power supply voltage Vbat is employed as a switching reference point in the prior art. When power supply voltage Vcc1 is less than power supply voltage Vbat, the internal power supply voltage Vccsw is equal to power supply voltage Vbat. When power supply voltage Vcc1 is greater than power supply voltage Vbat, the internal power supply voltage Vccsw is equal to power supply voltage Vcc1. Comparator 12 generates a control signal CTL in response to a comparison of voltages Vbat and Vcc1 at its input. Control signal {overscore (CTL)} is generated by inverter 14. Control signals CTL and {overscore (CTL)} are complimentarily control signals that are generated at the output of the comparator. For a 3.0 volt integrated circuit system, the battery voltage cannot be used as a switching reference. As a result, different voltages are employed to set up the switching point.
According to the present invention, the control signals CTL and {overscore (CTL)} for switching power supplies in the circuit system of FIG. 1 are generated by the circuit of FIG. 3 by comparator 16 with inputs for voltage Va and Vref according to the present invention. The control signal {overscore (CTL)} is generated by inverter 18.
FIG. 4 depicts a schematic diagram of a switching reference circuit for generating signals for detecting a switching point. According to the present invention, a switching reference circuit 20 is depicted. Switching reference circuit 20 generates signals to used detect a switching point to switch between power supplies by circuiting circuitry such as the circuit depicted in FIG. 3 according to the present invention. Switching reference circuit 20 includes a start-up circuit 22, a current source circuit 24, and a reference circuit 26.
Start-up circuit 22 includes transistors T7-T10. Transistors T7, T8, and T10 are N-channel metal-oxide-semiconductor field effect transistors (MOSFETs) according to the present invention. Transistor T9 is a P-channel MOSFET. The source of transistor T9 is connected to power supply Vcc1 while the source of transistor T10 is connected to power supply voltage Vss. Power supply voltage Vcc1 is higher than power supply voltage Vss. Power supply voltage Vss is typically a ground power supply voltage. Start-up circuit 22 is employed to start current flow within current source circuit 24.
Current source circuit 24 includes transistors T1-T6. Transistors T1-T6 are MOSFETs according to the preset invention. Current source circuit 24 also includes a capacitor C1 and a resistor RS. The current in current source circuit 24 is determined by resistor RS. Transistors T1 and T2 are P-channel MOSFETs according to the present invention while transistors T3-T6 are N-channel MOSFETs according to the present invention. Transistors T1 and T2 have sources connected to power supply voltage Vcc1. Capacitor C1 also is connected to power supply voltage Vcc1. The gates of transistors T1 and T2 are controlled by the current passing through transistor T8 in start-up circuit 22. Transistors T5 and T6 are used to provide a more precise current.
Reference circuit 26 contains transistors T11-T15. Transistors T11, T13, and T14 are N-channel MOSFETs with transistor T12 being a P-channel MOSFET. Transistor T15 is a NPN bipolar transistor according to the present invention. The circuit of the present invention in the depicted example is implemented using a p-well CMOS process. In a N-well CMOS process, a PNP bipolar transistor would be employed as depicted in FIG. 5. Start-up circuit 22 is connected a power supply voltage Vcc1 and a ground power supply voltage Vss. Reference circuit 26 is connected to power supply voltage Vccsw which may be either power supply voltage Vcc1 or Vccbat, which is the battery back up power supply voltage. This connection to power supply voltage Vccsw is made through the collector of transistor T15. Reference circuit 26 also is connected to power supply voltage Vcc1 and a lower power supply voltage Vss. Transistor T12 is connected to power supply Vcc1 while transistors T11, T13, and T14 are connected to power supply voltage Vss. A connection to power supply voltage Vss is also made through a capacitor C2. The gate of transistor T12 is controlled by the voltage Vref at node V1, which is the voltage drop across transistor T11 . The circuit 20 is designed such that when measured with respect to Vcc1 , V ref is constant whenever V cc1 is high enough to activate the circuit 20. That is, V ref is a stable reference voltage that remains a constant voltage drop below V cc1 whenever V cc1 is high enough to activate the circuit 20. Therefore, referring e.g. to FIG. 7, it follows that when measured with respect to V ss , V ref tracks changes in, i.e., follows, V cc1 , and thus has the same slope as V cc1 whenever V cc1 is high enough to activate the circuit 20. Power supply voltage Vcc1 is the external power supply voltage. Reference circuit 26 also includes resistors RB, R1 and R2. Reference circuit 26 generates a the voltage Vref fromon the node V1, which is the voltage from node V1 to the lower power supply voltage or ground . Reference circuit 26 also generates a voltage Va at node V2, which is the voltage drop across capacitor C2 to power supply voltage Vss. Voltages Vref and Va are the signals employed to determine when to switch between two power supplies according to the present invention. The function of switching control circuit is described in more detail below.
When power supply voltage Vcc1 rises, current flows through transistor T9 towards node N1, which results in the voltage at node N1 to increase. The increase of voltage Vcc1 causes the current traveling through transistors T7 and T9 to increase. The current flowing through transistor T7 is equal to the current through transistor T9. Transistor T8 is mirrored to transistor T7, which results in the current through transistor T8 also increasing. The voltage at node N2 drops as the current through transistors T7-T9 increases. The drop in voltage at node N2 results in transistors T1 and T2 being turned on allowing current to flow through these two transistors. In response, the voltage at node N3 goes up turning on transistor T10 in start-up circuit 22. In response, transistor TIO T10pulls the voltage at node N1 down disabling start up circuit 22. At this time, all of the transistors T1-T6 are working in a weak inversion region. The current through these transistors is low. Capacitor C1 is added to hold the voltage low at node N2 for a short period of time to allow current source circuit 24 sufficient time to generate current. Current source circuit 24 is employed to generate the current for creating voltages Vref and Va based on power supply voltage Vcc1.
Capacitor C2 is employed to respond to frequency changes. Thus, if noise occurs from the power supply, Vref and Va should follow each other.
Voltage V
ref at node V
1, when measured with respect to V
cc1 , is temperature independent and is about V
cc1 − 0.5 V initially and then settles to a stable value after the current source is stabilized. This When measured with respect to V
ss , the value for V
ref is calculated as follows:
where VBE is the base emitter voltage of transistor T15; K is the ratio of the current mirror T3 and T11, Si is the device size (W/L)i for i=1, 2, 3, and 4 S1 is the device size of the first transistor (T1) in current source 24, S2 is the device size of the second transistor (T2) in current source 24, S3 is the device size of the third transistor (T3) in current source 24, S4 is a device size of the fourth transistor (T4) in current source 24, kT/q is the thermal voltage. The voltage Vref controls transistor T12 with node N5 being pulled to ground. The voltage Va is switched from Vcc1 to R2/(R1+R2) Vcc1.
With reference to FIGS. 6 and 7, graphs of voltages Vcc1, Vbat, Vref, and Va are depicted according to the present invention. In these two graphs, the X-axis is time in milliseconds and the Y-axis is voltage. Crossing point 30 is the point at which the load or circuitry is switched from the battery power supply to the primary power supply. Crossing point 32 is the point at which the load or circuit is switched from the primary power supply to the battery power supply. Voltage Vref, which is measured with respect to Vss in FIGS. 6 and 7, is based on voltages Vcc1 and Vccsw as can be seen with reference back to FIG. 4 and equation 1. As can be seen, when voltage Vref is greater than Va, the power supply is switched from Vbat to Vcc1. The resistor ratio R2/(R1+R2) determines the crossing point, the point at which Va and Vref cross each other, for switching between power supplies. The voltage Vref always follows Vcc1. In other words, Vref has the same slope as Vcc1. Voltage Va has a different slope from Vref. The slope of voltage Va is determined by resistors R1 and R2 in FIG. 4. After crossing point 30, voltage Vref is based only on voltage Vcc1 without any influence from voltage Vbat because at that point, the power supply voltage Vccsw has been switched from the battery power supply generating voltage Vbat to power supply voltage generating voltage Vcc1. The power supply voltage Vccsw is switched back to Vbat after time T3.
In the depicted example the battery voltage Vbat is 3.5 volts and the crossing points 30 and 32, the voltage at which Va and Vref (measured with respect to Vss ) cross has been set to 2.3 volts. The crossing point may be altered by changing values for resistors R1 and R2 in FIG. 4. Also, the battery current Ibat is used by the switching reference circuit only between times T1 and T2 and T3 and T4. At other points in the graph in FIG. 6, the current Ibat in the switching reference circuit is equal to 0.
FIG. 5 is a partial schematic diagram of another embodiment of the switching reference circuit 20 of FIG. 4. Specifically, the circuit 20 of FIG. 5 is designed for use in integrated circuits that are formed in a P-type substrate according to an N-well CMOS process—the circuit 20 of FIG. 4 is designed for use in integrated circuits that are formed in an N-type substrate according to a P-well CMOS process. Therefore, when measured with respect to Vss , V ref in FIG. 5 is a constant, stable reference voltage. That is, V ref remains at a fixed voltage above V ss once V cc1 is high enough to activate the circuit 20. Conversely, V ref in FIG. 5 is not a constant reference voltage with respect to V cc1 . Furthermore, for clarity, only the current source 24 and the V ref portion of the reference circuit 26 are shown. However, one can use the start-up circuit 22 and the V a portion of the reference circuit 26 of FIG. 4 in the circuit 20 of FIG. 5, or can use other start-up and V a circuitry as desired.
One advantage of the present invention is that the switching circuit may be employed for any type of Vcc part with requiring only a small battery current during a short switching period. The present invention also provides an advantage of allowing different reference points to be set for switching between power supplies. The present invention may be implemented for integrated circuit parts using various power supply voltages, such as 5.0 and 3.3 volts. The present invention provides low battery currents during switching periods, which is defined as the time between the starting of the circuitry and the crossing point to switching power supplies. As a result, under the present invention, battery life is not affected by the switching reference circuit.
The present invention is depicted using MOS technology. Other types of technology in transistors may be used according to the present invention.
While the invention has been particularly shown and described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.