TW200810540A - Optical sensor and solid-state imaging device - Google Patents

Optical sensor and solid-state imaging device Download PDF

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Publication number
TW200810540A
TW200810540A TW095129174A TW95129174A TW200810540A TW 200810540 A TW200810540 A TW 200810540A TW 095129174 A TW095129174 A TW 095129174A TW 95129174 A TW95129174 A TW 95129174A TW 200810540 A TW200810540 A TW 200810540A
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Taiwan
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transistor
storage
solid
floating
region
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TW095129174A
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Chinese (zh)
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TWI466541B (en
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Shigetoshi Sugawa
Nana Akahane
Satoru Adachi
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Univ Tohoku
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50Control of the SSIS exposure
    • H04N25/57Control of the dynamic range
    • H04N25/59Control of the dynamic range by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Facsimile Heads (AREA)
  • Studio Devices (AREA)

Abstract

A solid-state imaging device includes a plurality of pixels stored in onedimensional or two-dimensional array, each of the plurality of pixels including a photodiode receiving light and producing photocharges, an overflow gate coupled to the photodiode and transferring photocharges that overflow the photodiode during a storage operation, and a storage capacitor element that stores the photocharges transferred by the overflow gate during the storage operatlon.

Description

200810540 九、發明說明: 【發明所屬之技術領域】 置’尤其關於CMOS或 以及關於上述固態攝像 本發明關於一光感測器與固態攝像裝 CCD感測器之一維或二維固態攝像襄置, 裝置之操作方法。 【先前技術】 盥器’如CM〇S(互補式金屬氧化物半導體)影像感測器 與CCD(電荷麵合裝置)影像感測器,在其性質上已經過改良,且 廣泛地應用在數位相機、照相手機、掃描器等。然而,影像感 器仍需要更進-步之性質改良,其中之—即為延伸㈣範圍。習 〇上所用之影像感測益之動悲範圍係維持在例如3至4位數(6〇至 80dB)之階次,因此,為了與肉眼或鹵化銀薄膜之動態範圍相匹 敵’吾人正寄予期望於實現具有動態範圍至少5至ό位數⑼嘯 至120dB)的高品質影像感測器。 、就加強上述影像感測裔之影像品質的技術,例如,為產生高 S/N bb ^ S.Inoue # -IEEE Workshop on CCDs and Advanced Image Sensor 2001,pp· l6_19”(之後稱為非專利文獻丨)」 中提出一種降低雜訊之技術,該技術係藉由讀取發生於鄰近每一 晝素之光二極體之浮動區域中的雜訊信號以及添加有光學信號之 ϊί信ί二並取得其間之差異。然而即使藉此方法,可達到之動 恶範圍最咼僅在80dB之階次。實現更廣之動態範圍實有其必要。 ^此外,例如,如圖1所示,曰本未審查專利申請公開案(JP-A) 第2003-134396號(之後稱為專利文獻丨)揭露了一種延伸動態範圍 之技術,該^技術係藉由將具有小電容器C1且位於高敏感度與低亮 度侧上之浮動區域以及具有大電容器C2且位於低敏感度與高亮 度側上之浮動區域連接至光二極體PD,然後分別輸出低亮度侧輸 出OUT1與高亮度侧輸出〇UT2。 再者,如圖2所示,曰本未審查專利申請公開案(Jp_A)第 2000-165754(之後稱為專利文獻2)揭露了一種延伸動態範圍之技 5 200810540 邊技術係藉由使在浮動擴散(FD)區域中之電容器cs產生變 一媒揭露了另—種延伸動態範圍之技術,該技術係藉由將 古成具有至少兩不同曝光時間週期之若干攝像,包含具 2應:於μ度侧之短曝光時間週期的攝像、以及具有對應於低 壳度側之長曝光時間週期的攝像。 一 ?所示,日本未審查專利申請公開案(JP-A)第 π=π^_ 後稱為專利文獻3)、及Y· Muramatsu等人發表於 journal of Solid_State Circuits, VoL 38, Νο· 1,ρρ· 1 :減之文獻中揭露了—種延伸動態範圍之技術,該技 ΐΐ猎極體PD與電容器c之間設置一電晶體開關丁, 光啟開關τ,以將光信號電荷儲存於光二極體 一里、私合為C兩者内;及在第二曝光週期中關閉開關丁,以在第 二U期中5光電荷儲存於所儲存電荷的頂部上之光二極體 夕^。在!1’這些文獻均揭露:當所提供之光照超過其飽和值時, 夕餘之電荷將經由重設電晶體R放電。 woif*如f 4所示’日本未審查專利申請公開案(爪稱 之後稱為專利文獻4) ’係揭露藉由使用比習知者更大 之電谷益作為光二極體PD而容許滿足高亮度攝像之技術方宰。 此外,如圖5所示,文獻The joumal 〇f妝福她〇f如 Infonnatlon and Television Engineers, v〇1 57, 2〇〇3(之後稱 3)係揭露-種延伸動態範圍之技術,該技術係藉 體所、、且成之對數轉換電路而以對數方式轉換該信號。 斗、2亡述專利文獻1、2、3、以及非專利文獻2所提出之方法、 或利用-或更多不神光時間週期之攝像方法巾,在 攝像與在高亮賴上之攝像係於彼此不同之咖下進行。^ 發-問題:在至少兩攝像之攝像時間之間將產生時 而 低移動影像之品質。 口而^ 而且,在上述專利文獻4與3所提出之方法中,雖然可藉由 6 200810540 應ί高亮度側之攝像達成寬廣動態範圍,但就低亮度側上 像品ί而言’將非期望地產生低敏感度與低S/N比,因而降低影 以達CM()S^像感測器之影像感測器中,一直難 僅僅岸二二^耗圍而又維持高敏感度與高,比。前述並不 ΖΞί晝素係以二維陣列排列之影像感測器,更應用於書辛 係以-維_排列之線性_器、以及不具複數晝素之铖測器:: 【發明内容】 持古22,之—目的為:提供能夠延伸動態範圍、同時維 I破感度與尚S/Ν比之固態攝像裝置。 收光攝像裝置,寬廣之動態範圍可藉由利用接 感产盥古存光電何之光二極體以在低亮度攝像中維持高敏 出之’且更藉由利用將經由溢流閘極而流 像元域之先電何儲存於一儲存電容器中而得以實現高亮度攝 -光—細· ° #域測器包含: -技麻5接收先且產生光電荷;一溢流閘極,係連接科本 且傳輸在儲存操作期間溢出光二極體之光電荷;及二二 荷各器元件’係儲存於儲存操作期間經由溢流閘極所傳輸之光^ 忒光感測裔更包含一傳輸電晶體,1 其中該傳輸電晶體係自一將 將形成接面電晶體之=⑶ii連光較:況為 面區域之半導舰域、叹之表 導電類型之料體層,科物料低Γ在,ίΓίί中^ 7 200810540 (punch through)的阻障。 該儲存電容器元件可包含:一半導 係形成於其中形成光感測器之半導體二=,作為下部電極, 容器絕緣膜,係形成於靖體;=板2面層部份中;-電 於該電容器絕緣膜上。 , 上部電極,係形成 該儲存電容器元件可包含:一 光感測器之基板上;一電容器絕形成於其中形成 及一上部雜,係職於該電雜概^成於訂部電極上; 該儲存電容器元件可包含:—半導£ 係形成於—溝渠之内壁中,該溝渠係i作為下部電極, 半導體基板中;—電容器絕緣膜,係形成於^Ϊ成光感測器之 一上部形成於該電細壁上;及 素,亦提供每-具有上述之光感測器^^車簡列之複數個畫 複數個畫素塊巾之每—者包含晝素塊。在此裝置中, 個晝素中之每一者包含:一光二旦素與單一浮動區域。複數 溢流閘極,係連接於該光二極體且工儲且產生光電荷;-極體之光電荷;_儲存電容器元件,係二傳輸溢出光二 體益電荷;及-傳輪電晶體 之通道相以J道^^其具有與傳輸電晶體 輸電晶體之基板的表二 該固態攝像裝置,包含複數^^至=定深度。 之晝素更可包含:―重設雷曰轉,,;^母—具有上述光感測器 出《存電容器元件與浮動區。;浮祕域’用以釋 浮動區域與該儲存電容器元件之間電::= 200810540 該浮動區域中、或該 為電壓;-選擇電晶體:之= 该固態攝像裝置更可包含·— ,容器元件,用以釋㈣存電以係連接於該儲存 '何’一電晶體,設於該浮動動區域中之信號電 者中之信號電荷來作為電壓;與儲存電容器 放大電晶體,用以選擇晝素。 ^擇私日日體,係連接於該 口亥固恶攝像裝置,包含複婁丈個 祷所獲得之電壓传^在二或共儲存電谷益兩者之光電 元件兩者之重的ΐ^Τί區域、或浮魄域與儲存電容器 根據本發壓信號、。 法’該光感測器包含光^體自光。感,之信號輸出方 存於光二極體;將光二核體^^之j產生之第-光電荷儲 電容器元件;及基於二光電荷儲存 该溢流間極可由光電一先電何來輸出該信號。 晶體所構成,言亥M〇s ^了^存電容器之間所連接的廳電 號。 日日體之閘極電極接收決定儲存操作之信 【實施方式】 在此之後’根據本替 而加以說明。貫穿這__以例之固輯像裝置將參考附圖 件。 ^之相同參考符號代表相同或均等之零 200810540 盖二A施例 ,6係根據本發明之第一實施例,在固態 的專1域路圖,及圖7為其概略平面圖。 —素 荷;一1專—於畫雷素曰=〇一光二嫌PD卜接收光且產生與儲存光電 一、'-私t輪V電阳體係鄰接於光二極體PD1而設且傳輸光電荷; 極ί ml域(洋動區域)FD3,係透過傳輸電晶體T2而連接於光二 左,一溢流閘極L〇4,係鄰接於光二極體PD1而設且在儲 =乍=傳輸溢出光二_ PD1之光電荷;一儲存電= 之齐雷奸.子^木作期間經由溢流閘極L04儲存溢出光二極體PD1 扁找丄一重設電晶體116,係連接於浮動區域刚,用以釋出 電容器CS5 之間; 兩者中之ίίί* ,ϋ「中、或浮動區域FD3與儲存電容器CS5 電曰P 〜電何頃為黾壓;及一選擇電晶體X9,係連接於放大 屯日日體SF8,用以選擇晝素或晝素塊。 郷魏大 根據本實施例之固態攝像裝 的每—者,係以二維或—=1置有ί列之複數晝素 線H 4tU、/12 力储存、。在母一晝素中,驅動 傳輸電晶體T2、儲存S帝曰辦S7R係t別連接於溢流閉極L04、 並且’由列位移暫存哭^^金f f设電晶體R6之間極電極。 晶體X9之間極電極二再者,擇線^14係連接於選擇電 體对之輸_雜,且蝴位=連接於選擇電晶 x,*作即可。因此,; 圖8A係根據本發明,顯示 PD卜溢流間極L〇4、及儲在带二f像衣置之晝素中之光二極體 圖犯係顯示在書辛中之光CS5區域的概略剖面圖,且 素中之先—極體PD卜傳輪電晶體T2、浮動區 10 200810540 域:,電晶體S7、及儲存電容器⑶ 例如,在—n型石夕半導體基 〇 略剖面圖。 (p-well)2卜且形成以l〇c〇s ( ^ j形成一P型井 L2'2425 .且在該n型半導體^域〇係形成於P型井21中, • 3卜藉由此Pn接面,構成電荷^輪^人=2^型半_區域 超出導預,有由嗎體區域31 以之表面層形定轉驗置處,於P型井 區域體 形成=上述其他區域相隔一曰預定距離之位半導體區域34係 i7pr-f:; 11 200810540 没極。 而且,在與n+型半導體區域33與n+型半導體區域34相關聯 之區域中,由多晶矽或其類似物所製成之閘極電極40係隔著由氧 化矽或其類似物所構成之閘極絕緣膜39而形成於p型井21之頂 面上,且在p型井之表面層中設有一具有通道形成區域之儲存電 晶體S ’而以n+型半導體區域33與n+型半導體區域34作為源極 /没極。 此外,在由元件隔離絕緣膜22與23加以分開之區域中,作 為下部電極之P+型半導體區域41係形成於p型井之表面層中, 且在此層之頂部上,由多晶矽或其類似物所製成之上部電極43係 隔著由氧化矽或其類似物所構成之電容器絕緣膜42而形成。這些 構成了儲存電容器CS。 形成由氧化矽或其類似物所構成之絕緣膜44,以便覆蓋溢流 閘極LO、傳輸電晶體T、儲存電晶體S、及儲存電容器CS。設有 一開口區,自n+型半導體區域32與n+型半導體區域33、經由n+ 型半導體區域34往上延伸至上部電極43。又,設有連接n+型半 導體區域32與上部電極43之配線45、以及與n+型半導體區域 33相連之配線46。 驅動線0Τ係連接於傳輸電晶體T之閘極電極38,而驅動線 0 s則連接於儲存電晶體S之閘極電極40。 驅動線係連接於溢流閘極LO之閘極電極36。可使驅動 線0LO承受施加驅動脈衝信號或者使其連接於零電位(如同在P 型井21之情況中)。將溢流閘極LO之閾值電壓設為較傳輸電晶 體T之閾值電壓為低的數值,俾使超過光二極體PD之飽和值的 多餘電荷、有效地經由溢流閘極LO而流到儲存電容器CS。當溢 流閘極LO與傳輸電晶體T之閾值電壓設為相同時’將電位設為 較零電位為高之數值將使超過光二極體PD之飽和值的多餘電荷 有效地經由溢流閘極LO流到儲存電容器CS。 關於其他構成元件’亦即’重設電晶體R、放大電晶體SF、 12 200810540 驅動線^與^、及輸出線〇υτ,係以將配線46 電路圖未’示)、俾使該構造之結果為圖6之等效 之未說式’設置於在圖8A與8B所示之半導體基板 域構成具有相對淺層電位之電容器Cpd,而浮動區 C鱼子私谷态CS則構成分別具有相對深層電位之電容器 LFD 興 Lcs 〇 攝像ί 7、8八與8B中所示之本實施例而說明固態 動時^圖。’、/ 。圖9係根據本實施例之固態攝像裝置的驅 電晶存前,將齡S設糊啟,且將傳輸 完全i乏狀、能:又二日:體R設為關閉。此時,光二極體PD處在一 域’將重設R切換綱啟財設浮動區 n储存電谷器cs(時間:ti)。接著,緊接在重 所獲得之㈣+⑼輸靡"1,係_^信號 的變化曰,.二信號N2⑤含放大電晶體SF之閾值電壓 在ί存電=1固=^之雜訊成分。在儲存週期期間(時間:t3), 切』能重設電晶體R、及選擇電晶體X 左閉狀中,在飽和别之光電荷係由光二極體PD所蝕 於多制光電荷職顧流閘極L〇而儲存 捨棄之情況下,—為有效_。以此方式在 何ΐ未被 週?中’儲存操作係藉由以相同儲存_中之每一晝 —極體來接收光而加以進行。 旦”、相同光 —在已完成儲存後(時間:t〇,將選擇電晶體χ切換成 信號Ν1包含放大電晶體SF之間值電射白U,) f 為固疋圖案之雜訊成分。 乂作 13 200810540 嘹—ii,開啟傳輸電晶體1’以將儲存於光二極體pd中之光作 f _ FD(_7),且職_=^1 者亦開啟儲存電晶體S,以將儲存於光二極體p 全傳輪至浮動區域FD與儲存電容器c _ ^ 且將該信號讀為CS中所儲存之電荷予以混合, 排列Ϊ 艮ί=施例之固態攝像裝置的方塊圖。在二維方式 排列之晝素陣列100至103的周邊上,設、 ^ ) ’ 勤虎N2與(在FD與cs中接受電荷/電壓轉換之飽 ^亦隹辦夕除知作係糟由減法電路:[(S1+N1) 2機雜成分與固定圖案雜訊成分兩者。)另—方面仃= 成分鱼固Μ安:/被項取因此,當移除隨機雜訊 圖、!成:者時,雜訊N2即經儲存於圖框記 以^;減法^進行雜訊移除操 之作妒S1叙、Μ T k其中母一者清除了雜訊的飽和前 巧j S1與過飽和侧之信號(S1+S2)。減法電路 母一者I形成於影像感測器晶片上或形成個別晶片、那此體之 使汙動區域FD與儲存電容器cs之電容分 , 而在貝際上,相較於重設浮動區域阳 之例子中,重設電晶體R處之_穿透4阳+巧 不大,且過飽和侧信號S2之飽和雷厚_聰幽的影專 ㈣電壓,所以糊姻===== 14 200810540 素尺寸之情況下能有效延伸動態範圍、同時維持弁-200810540 IX. Description of the Invention: [Technical Field of the Invention] In particular, regarding CMOS or the above-described solid-state imaging, the present invention relates to a one-dimensional or two-dimensional solid-state imaging device for a photosensor and a solid-state imaging CCD sensor. , the method of operation of the device. [Prior Art] Devices such as CM〇S (Complementary Metal Oxide Semiconductor) image sensors and CCD (Charge Coupled Device) image sensors have been improved in their properties and are widely used in digital applications. Camera, camera phone, scanner, etc. However, image sensors still require further improvements in the nature of the steps, which are the extended (four) range. The range of image sensing used in the practice is maintained at a level of, for example, 3 to 4 digits (6 to 80 dB). Therefore, in order to compete with the dynamic range of the naked eye or silver halide film, 'we are placing It is desirable to implement a high quality image sensor having a dynamic range of at least 5 to a number of turns (9) screams to 120 dB). Techniques for enhancing the image quality of the above-mentioned image sensing, for example, to generate high S/N bb ^ S. Inoue # - IEEE Workshop on CCDs and Advanced Image Sensor 2001, pp·l6_19" (hereinafter referred to as non-patent literature) A technique for reducing noise is proposed by reading a noise signal occurring in a floating region of a photodiode adjacent to each pixel and adding an optical signal. The difference between them. However, even with this method, the range of achievable astigmatism is only at the order of 80 dB. Achieving a broader dynamic range is necessary. Further, for example, as shown in FIG. 1, the unexamined patent application publication (JP-A) No. 2003-134396 (hereinafter referred to as the patent document) discloses a technique for extending the dynamic range, which is By connecting a floating region having a small capacitor C1 on the high sensitivity and low luminance side and a floating region having a large capacitor C2 on the low sensitivity and high luminance side to the photodiode PD, and then outputting low luminance respectively Side output OUT1 and high brightness side output 〇UT2. Further, as shown in FIG. 2, the unexamined patent application publication (Jp_A) No. 2000-165754 (hereinafter referred to as Patent Document 2) discloses a technique for extending the dynamic range. Capacitor cs in the diffusion (FD) region produces a technique that exposes another extended dynamic range by using a number of cameras that have at least two different exposure time periods, including 2 Imaging of a short exposure time period on the degree side, and imaging with a long exposure time period corresponding to the low shell side. As shown in the figure, the Japanese Unexamined Patent Application Publication (JP-A) is called π=π^_ and is referred to as Patent Document 3), and Y. Muramatsu et al. is published in journal of Solid_State Circuits, VoL 38, Νο· 1 , ρρ· 1 : The literature of the extended dynamic range is disclosed in the literature. The technique is to provide a transistor switch between the hunting pole PD and the capacitor c, and the light switch τ to store the light signal charge. The light diode is in one and the private phase is in both C; and the switch is turned off in the second exposure period to store 5 photo charges in the second U phase on the photodiode on top of the stored charge. These documents are disclosed in !1': when the illumination provided exceeds its saturation value, the remaining charge will be discharged via the reset transistor R. Woif*, as shown in f4, 'Japanese Unexamined Patent Application Publication (hereinafter referred to as Patent Document 4)' discloses that it is allowed to satisfy high use of electricity as a photodiode PD by using a larger electric power than the conventional one. The technical method of brightness photography is slaughter. In addition, as shown in FIG. 5, the document The Joumal 〇f makeup 〇 f such as Infonnatlon and Television Engineers, v〇1 57, 2〇〇3 (hereinafter referred to as 3) is a technique for extending the dynamic range, the technique The signal is converted in a logarithmic manner by means of a logarithmic conversion circuit.斗,2, the patent documents 1, 2, 3, and the method proposed in Non-Patent Document 2, or the use of - or more non-light time period imaging method towel, in the camera and on the high-definition camera system Under different coffees. ^ Hair-Question: The quality of the moving image will be low between at least two camera recording times. Moreover, in the methods proposed in the above-mentioned Patent Documents 4 and 3, although a wide dynamic range can be achieved by the imaging of the high-brightness side of the 6 200810540, on the low-luminance side, the product will be Desirably, the low sensitivity and low S/N ratio are generated, so that the image sensor that reduces the shadow to the CM()S^ image sensor has been difficult to maintain only high sensitivity and maintain high sensitivity. High, than. The foregoing is not an image sensor arranged in a two-dimensional array, but is also applied to a linear _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Ancient 22, the purpose is to provide a solid-state imaging device capable of extending the dynamic range and simultaneously reducing the sensitivity of the I and the S/Ν ratio. The wide-range dynamic range of the light-receiving camera can be used to maintain high-sensitivity in low-brightness imaging by utilizing the sensation of the sensation of the ancient light-emitting photonic diodes, and by using the image to flow through the overflow gate The first field of the meta-domain is stored in a storage capacitor to achieve high-brightness-light-thin-°# domain detectors include: -Technology 5 receives first and generates photo-charge; an overflow gate, is connected to the section And transmitting the photocharge of the photodiode overflowing during the storage operation; and the two-element device component is stored in the light transmitted through the overflow gate during the storage operation, and the light sensing sensor further comprises a transmission transistor , 1 where the transmission electron crystal system will form a junction transistor = (3) ii light is compared with: the semi-conducting domain of the surface area, the material layer of the conductivity type of the sigh, the material is below,, ίΓ Medium ^ 7 200810540 (punch through) barrier. The storage capacitor element may include: a semiconducting system formed in the semiconductor sensor 2 in which the photosensor is formed, as a lower electrode, a container insulating film is formed in the surface layer of the surface layer; On the capacitor insulation film. The upper electrode forming the storage capacitor component may include: a substrate of a photo sensor; a capacitor formed therein and an upper portion, the system is mounted on the electrode of the order; The storage capacitor component may include: - a semiconducting layer formed in the inner wall of the trench, the trench system i as a lower electrode, in the semiconductor substrate; a capacitor insulating film formed on one of the upper portions of the photosensor On the electric thin wall, and each of the plurality of pixel blocks each having the above-mentioned light sensor device, each of which includes a pixel block. In this device, each of the individual elements comprises: a photonic element and a single floating area. a plurality of overflow gates connected to the photodiode and stored and generating photocharges; - photocharges of the polar bodies; - storage capacitor elements, two transmissions of overflow light, two body charges; and - channels of the transmission transistor The solid-state imaging device having the substrate and the substrate for transmitting the transistor, includes a plurality of ^^ to = fixed depth. The element can also include: “Reset Thunder Turn,,; ^ Mother—has the above-mentioned photo sensor. “Capacitor component and floating area. The floating domain is used to discharge the floating area from the storage capacitor element::= 200810540 In the floating area, or the voltage is; - Selecting the transistor: = The solid-state camera device can further include -, the container And a component for discharging (4) storing electricity to be connected to the storage device, the signal charge in the signal generator in the floating dynamic region is used as a voltage; and the storage capacitor is used to amplify the transistor for selecting Russell. ^Select the private Japanese body, which is connected to the mouth of the murmur camera, including the voltage obtained by the Fuzhangzhang prayer, and the weight of both of the optoelectronic components of the two or the total storage of the electricity. Τί area, or floating area and storage capacitor according to the present voltage signal. The light sensor comprises a light body. Sense, the signal output side is stored in the photodiode; the photo-nuclear storage capacitor component generated by the optical dinuclear body ^^j; and based on the diphoto-charge storage, the overflow interpole can be output by the photoelectric first signal. The crystal is composed of the hall, and the hall number is connected between the capacitors. The gate electrode of the Japanese body receives the letter determining the storage operation. [Embodiment] Hereinafter, the description will be made based on this. A solid image device that runs through this will refer to the attached drawings. The same reference symbols denote the same or equal zero. 200810540 盖二A exemplification, 6 is a solid-state specific domain road map according to the first embodiment of the present invention, and Fig. 7 is a schematic plan view thereof. -Su-Hui; 1-Special--Drawing Lei Suzhen = 〇一光二嫌 PD Bu receiving light and generating and storing photoelectric one, '- private t-round V electric yang system is adjacent to the photodiode PD1 and is designed to transmit photo-charge极 ML3 is connected to the left side of the light through the transmission transistor T2, and an overflow gate L〇4 is set adjacent to the photodiode PD1 and is stored in the 乍=transmission overflow. Light II _ PD1 light charge; a storage power = Qi Lei rape. During the wood work, the overflow light diode PD1 is stored via the overflow gate L04. The flat transistor is connected to the floating area, and is connected to the floating area. To release the capacitor CS5; between the two ί, ϋ "Medium, or floating area FD3 and storage capacitor CS5 曰 P ~ electricity is what is the pressure; and a selection of transistor X9, is connected to the amplification 屯The Japanese body SF8 is used to select a halogen or a halogen element. 郷Wei Da, according to the solid-state image pickup device of the present embodiment, is a two-dimensional or -=1 set of a plurality of halogen elements H 4tU , /12 force storage, in the mother-single, drive transmission transistor T2, storage S Emperor S7R system t are connected to the overflow closed-pole L04, and ' The column displacement temporarily stores the crying ^^ gold ff to set the electrode between the electrodes R6. The crystal electrode X9 between the pole electrode two, the line ^14 is connected to the selected electric body to the input _ miscellaneous, and the butterfly = connection In view of the present invention, FIG. 8A shows a photodiode diagram of a PD b overflow interpole L〇4 and a photoreceptor stored in a photoreceptor. The criminal system shows a schematic cross-sectional view of the CS5 region of the light in the book, and the first one in the prime-body PD-transmission transistor T2, the floating region 10 200810540 domain:, the transistor S7, and the storage capacitor (3) - n-type Shi Xi semiconductor based on a cross-sectional view (p-well) 2 and formed with l〇c〇s (^ j forms a P-type well L2 '2425. And in the n-type semiconductor domain formation In the P-type well 21, the 3P is connected by the Pn, and the charge ^ wheel ^ person = 2^ type half_region exceeds the pre-predetermination, and the surface layer is shaped by the body region 31. In the P-type well region formation = the other regions are separated by a predetermined distance from the semiconductor region 34 is i7pr-f:; 11 200810540 immersed. Moreover, in the n + -type semiconductor region 33 and the n + -type semiconductor In the region associated with the domain 34, a gate electrode 40 made of polysilicon or the like is formed on the top surface of the p-type well 21 via a gate insulating film 39 composed of yttrium oxide or the like. And, in the surface layer of the p-type well, a storage transistor S' having a channel formation region is provided, and the n+ type semiconductor region 33 and the n+ type semiconductor region 34 are used as a source/depolarization. In the region where the films 22 and 23 are separated, the P + -type semiconductor region 41 as the lower electrode is formed in the surface layer of the p-type well, and on the top of the layer, the upper electrode is made of polycrystalline germanium or the like. The 43 is formed via a capacitor insulating film 42 made of yttrium oxide or the like. These constitute the storage capacitor CS. An insulating film 44 composed of yttrium oxide or the like is formed so as to cover the overflow gate LO, the transfer transistor T, the storage transistor S, and the storage capacitor CS. An opening region is provided which extends from the n + -type semiconductor region 32 and the n + -type semiconductor region 33 to the upper electrode 43 via the n + -type semiconductor region 34. Further, a wiring 45 connecting the n + -type semiconductor region 32 and the upper electrode 43 and a wiring 46 connected to the n + -type semiconductor region 33 are provided. The driving line 0 is connected to the gate electrode 38 of the transmission transistor T, and the driving line 0 s is connected to the gate electrode 40 of the storage transistor S. The drive line is connected to the gate electrode 36 of the overflow gate LO. The drive line 0LO can be subjected to application of a drive pulse signal or to a zero potential (as in the case of a P-well 21). The threshold voltage of the overflow gate LO is set to be lower than the threshold voltage of the transmission transistor T, so that the excess charge exceeding the saturation value of the photodiode PD is effectively flown to the storage via the overflow gate LO. Capacitor CS. When the threshold voltage of the overflow gate LO and the transmission transistor T are set to be the same, 'setting the potential to a value higher than the zero potential will cause the excess charge exceeding the saturation value of the photodiode PD to effectively pass the overflow gate. The LO flows to the storage capacitor CS. Regarding the other constituent elements 'that is, 'resetting the transistor R, the amplifying transistor SF, 12 200810540, the driving line ^ and ^, and the output line 〇υτ, the wiring 46 is not shown in the circuit diagram, and the result of the configuration is made. The equivalent unillustrated figure of FIG. 6 is disposed in the semiconductor substrate region shown in FIGS. 8A and 8B to form a capacitor Cpd having a relatively shallow potential, and the floating region C caviar state CS is configured to have a relatively deep potential. The capacitor LFD □ Lcs 〇 camera ί 7, 8, and 8B show the solid state dynamic time diagram. ', /. Fig. 9 is a diagram showing the erasing of the age S before the driving of the solid-state image pickup device according to the present embodiment, and the transmission is completely deficient, and the second day: the body R is set to be closed. At this time, the optical diode PD is in a field 'resets the R switch to the floating area n to store the electric bar cs (time: ti). Then, immediately after the (4) + (9) transmission 靡 1 信号 1 1 1 1 1 1 系 系 系 系 曰 曰 曰 曰 曰 曰 曰 曰 曰 曰 二 二 二 二 二 二 二 二 二 二 二 二 二 二 二 二 二 二 二 二 二 二 二 阈 阈ingredient. During the storage period (time: t3), the switch can reset the transistor R, and select the transistor X in the left closed shape. In the saturation, the photocharge is etched by the photodiode PD to the multi-photoelectric charge. In the case where the flow gate is L〇 and stored and discarded, it is valid_. In this way, why not Zhou? The middle 'storage operation is performed by receiving light with each of the same storage_poles. ", the same light - after the storage has been completed (time: t〇, the transistor χ will be switched to the signal Ν1 contains the value between the amplified transistor SF and the white U), f is the noise component of the solid pattern.乂作13 200810540 嘹—ii, turn on the transmission transistor 1' to make the light stored in the photodiode pd f__FD(_7), and the _=^1 also turns on the storage transistor S to store The photodiode p is transmitted to the floating region FD and the storage capacitor c _ ^ and the signal is read as the charge stored in the CS to be mixed, and arranged in a block diagram of the solid-state imaging device of the embodiment. Dimensional arrangement of the pixel arrays 100 to 103 on the periphery, set, ^) 'Qinhu N2 and (in the FD and cs accept the charge / voltage conversion of the full ^ 隹 除 除 除 知 由 由 由 由 由 由 由 由 由 由 由 由[(S1+N1) 2 machine components and fixed pattern noise components.) Another aspect 仃 = component fish solid security: / by item, therefore, when removing random noise map, ! , the noise N2 is stored in the frame to record ^; subtraction ^ to perform the noise removal operation 妒 S1 Syria, Μ T k where the mother clears the saturation of the noise before the j S1 and the signal on the supersaturation side (S1+S2). The subtraction circuit mother I is formed on the image sensor wafer or forms an individual wafer, and the body divides the capacitive region FD and the storage capacitor cs, and In the case of the shell, compared to the case of resetting the floating area, the _ penetration 4 yang + is not large, and the saturated sag of the supersaturated side signal S2 _ _ _ _ _ _ _ _ _ _ , so the marriage ===== 14 200810540 The size of the prime can effectively extend the dynamic range while maintaining 弁-

體吾人期望形成具有高面積效率之大儲存H 見廣動恶乾圍信號之合成可藉由選摆 ::和,號(S1+S2)其中任一者而加以達 ,之後,S1與⑻说)之_選擇可藉由I擇^1 /、中任-者而獲得。吾人建議將該娜 ^於' 電壓,以避免該切換束者雷乂心 又成低於S1飽和 變罐’且同時設成高電;而二電: 宋 值(FD CCS)/ CFD可使得此增益與飽和前之 二因4;生=寻具有一動態範圍之影‘ =措由携性結合自低亮度往上至高亮度之線性錢而加= 如由上述制之㈣所B肠顯示者,在本_ 荷與過飽和侧之信號電荷混合成^飽和側 ㈣i:二二S1+S2)在飽和前至少包含接近信號S1之 •-雜\1^=°了1’此將增進在過飽和侧上對雜訊成分(例如重 dark current)) ° it itlff 的增進,即使在飽和前之信號與過飽和侧 ^之間,的選擇點附近,仍可藉由在隨後場域中重設浮^ 2 FD及後立即讀取電位為N2,而確保足夠之謝The body is expected to form a large storage with high area efficiency. H. The synthesis of the signal of the broad-moving and dry-hearted can be achieved by selecting the pendulum::, (S1+S2), and then S1 and (8) The choice of _ can be obtained by I choose ^1 /, the middle -. We recommend that the Na should be 'voltage' to avoid the switching beam being lower than the S1 saturation tank and set to high power at the same time; and the second power: FD CCS / CFD can make this Gain and saturation before the second cause 4; raw = seek has a dynamic range of shadow '= measures the combination of self-sufficiency from low brightness up to high brightness linear money plus = as shown by the above (4) B intestine display, The signal charge on the _ and the supersaturated side is mixed into the saturation side (4) i: the second two S1+S2). At least the proximity signal S1 is included before saturation. -1^=1^=°1' This will enhance the supersaturation side. For the enhancement of the noise component (such as heavy dark current) ° it itlff, even in the vicinity of the selection point between the signal before saturation and the supersaturated side ^, the floating ^ 2 FD can be reset in the subsequent field. And immediately read the potential as N2, and make sure enough thanks

比,並且取付在先前場域中關於(S1+S2+N (S1+S擁2)-N2,)來移除固定圖案雜訊成分。”差值(兀即 該飽和前之信號(S1+N1)、與雜訊信號N1之讀取摔作 i!; ?Ratio, and take in the previous field (S1 + S2 + N (S1 + S + 2) - N2,) to remove the fixed pattern noise component. "Difference (that is, the signal before the saturation (S1 + N1), and the reading of the noise signal N1 fell as i!; ?

月/ = 因此’便可在低免度區域巾實現高職度與高S/N 比(低雜訊)性質,而不會產生殘影。在過飽和侧上之操作中,於已 將溢出光二極體PD之電荷透過在相同儲存週期中之溢流閑極L〇 15 200810540 =儲存^儲存電容器cs中後,進行在低亮度側上之信號讀取。在 ,成=讀取後,在時間ts時,留在浮動區域FD中之飽和前的信 號電1與過飽和信號電荷相混合,然後讀取該混合電荷。再者, 在此=間t8,在開啟儲存電晶體s時,浮動區域]?〇係連接於具有 大電容^儲存電容器CS,且(FD+CS)之電位朝向正方向。因此, 即使光二極體PD處於飽和狀態,光二極體PD之光電荷仍完全以 ϊί ί傳輸至(FD+CS) ’目而甚至在PD飽和之附近中亦無殘留影 雷曰:ϊ當儲存電容器cs呈飽和之後,仍可藉由調整重設 放ί、Ϊ徂、ΐίη電晶體S之閾值電壓,而有效率地將多餘電荷釋 放至电源供應VDD,因此,即使當吾人使用p型矽半 Ϊ象(blGC)ming) °在此’可將重設電晶體RI儲存電 曰曰體S之低側電位設為比零電位還高的數值。 式’在光二極體PD未飽和之低亮度攝像中,便可藉 所和前的電細_轉高敏感度與高 極體PD之光電體PD錢和之高亮度攝像中,溢出光二 之藉㈣雜訊所獲得之信號,亦即飽和前 上===侧撕㈣2),蝴編度側 側上的=實裝置,在不降低低亮度 廣範圍,此外,此度側上之敏感度目而達成寬 壓。此將允許本^使f超過—般使用範11之電源供應電 化。而且,目為置得以在將來滿足影像❹彳器之微型 之增加。為讀之添加已降至最少,所以不會導致晝素尺寸 以相同之儲之習知„器,本實施例係 之間的儲存週‘,亦# ’而不分⑽亮度侧與低亮度側 仔似亦即不跨立圖框。即使在移動影像之攝像中, 16 200810540 此方式仍可避免影像品質之劣化。 而且,關於來自浮動區域FD之漏電流,根據本實施例之影 像感測器,(S1+S2)之最小信號變成來自光二極體Pd之飽和電 荷,因此使影像感測器得以處理大於來自浮動區域FD之漏電流 者的電荷量。此將提供使影像感測器不受FD漏電影響之優點。 弟二實施例 根據本實施例之固態攝像裝置係為根據第一實施例之固態攝 像裝置中之晝素的電路架構而加以修改者。圖η係根據本實施例 之其^一晝素的等效電路圖。圖12係為其中的概略平面圖。 #每一晝素包含:一光二極體PD1,接收光且產生與儲存光 荷;一傳輪電晶體Τ2,係鄰接於光二極體PD1而設且傳輸光電荷· 一浮動區域FD3,係透過傳輸電晶體T2而連接於光二極體pDj ·’ ,係鄰接於光二極體PD1而設且在儲存操作期間 皿出光極體PD1之光電荷;—儲存電容器CS5,在 ,J間經由溢流閘極L04儲存溢出光二極體pD1之光電荷;一二 設電晶體R6,係連接於儲存電容器⑶,用^雷 =tFD3中之信號電荷;-儲存電以 區域FD3與儲存電容器CS5之間;一放大雷曰辦Ώ、勁 t、或浮動區域FD3與儲存電容Hs5兩者 二SiS晝及素:鬼選擇電晶體Χ9,係連接於放大電晶體“ 中,二實施例之例子中,根據本實施例之固態攝像果置 以儲存。在每„晝素中,驅3維或-維陣列加 選;;由列位移暫存器所: 線嶋係。再者,一^ 存器加以_以產生輸出。 之輸出_極,封欄位移暫 17 200810540 如上述第一實施例之例子中,根據本實施例之固態攝像 的雜亚未設限,只要可將浮祕域FD3之電獅定於—適^ 以便能夠進行畫素之選擇操作或非選擇操作即可。因此=直 略選擇電晶體X9與驅動線0 χ14。 J名 、、、、、、&根據本實施例之固態攝像卜顯示晝素中之光二極體Pm、 了广間極LO4、及儲存電容II CS5區域的概略剖關係與第一者 二二>]所:之圖8A相同’因此,將其圖省略避免重圖。再者二 ίίϊϊτ?像裝置之畫素中之光二極體™、傳輸電晶體Τ2 :、ϊ $區,FD3、儲存電晶體S7、及儲存電容器c 而 圖係與圖8B相同,因此,亦將其圖省略避免重圖。面 晋之2古Ϊ據圖U與12所示之本實施例,將說明固態攝像穿 圖。本/。圖13係根據本實施例之固態攝像裝置的驅動時^ 體將^電曰曰f/言f開啟’且將傳輪電晶 空乏狀能。體R叹為關閉,光二極體PD處在一完全 CS(日fin開設?晶體R以重設浮動區域FD與儲存電容哭 ,儲存電容器cs)的重設雜訊為浮動 =雜則§#bN2包含在放大電晶體SF之聞值 )。在 二為固定圖案之雜訊成分。在儲存週期_ ( 的^匕’以 日曰體S、傳輪電晶體τ、重設電晶體R 二,儲存電 多餘的光電荷則透過溢流間極L0而::= 冤备的cs中。此操作允許溢出光二極體]?1) # 子於儲存 情況下,而能為有效利用。以此方式,在飽和前=未被拾棄之 儲存操作係藉由以相同儲存週期中之每一書夸、後之兩週期中, 接收光而加以進行。 一’、、目同光二極體來 在已完成儲存後(時間:t4,),將選擇電晶體X切換成開啟,然 18 200810540 後讀取儲存於光二極體pj)終之雜 含在放大電晶體SF之閾值糕上的^,^乍此為^^細包 先仏號元全傳輸至浮動區域FD( 中之 (S1+N1)。接著,亦將儲存電晶體“ 號係讀為 =#在此’將光二極體PD、浮動_ fd 時捨棄浮動=重設操作期間,在時間:t6 ;;^ί^ _象㈣,輯本實施例之固 所示㈣嶋㈣—實施例中 點方式、由每一晝素=各j避免f圖。在實施例中以連續 動態。“第^二比、及寬廣 不降低低亮声=本實施例之固態攝像裝置,係在 之電源供應電壓。此將並未使用超過—般使用範圍 感測器之微型化。而Η,二-,攝像裝置得以在將來滿足影像 導致畫素尺寸之增加。’*為70件之添加已降至最少,所以不會 以相同之儲存4期來之:知?像感測器,本實施例係 此方;影框。即使在移動影像之嫩^ 像感測器,域FD之漏電流,根據本實施例之影 予動&域FD與儲存電容器CS之電容所讀取之最小 19 200810540Month / = Therefore, you can achieve high-quality and high S/N ratio (low noise) in low-purity area towels without causing afterimages. In the operation on the super-saturation side, after the charge of the overflow photodiode PD has been transmitted through the overflow idle pole L〇15 200810540 in the same storage period, the signal on the low-luminance side is performed. Read. After the reading = reading, at time ts, the signal electric 1 before saturation remaining in the floating area FD is mixed with the supersaturated signal charge, and then the mixed electric charge is read. Furthermore, at this interval t8, when the storage transistor s is turned on, the floating region is connected to the storage capacitor CS having a large capacitance, and the potential of (FD + CS) is directed in the positive direction. Therefore, even if the photodiode PD is in a saturated state, the photocharge of the photodiode PD is completely transmitted to (FD+CS)', and even in the vicinity of the PD saturation, there is no residual thunder: when stored After the capacitor cs is saturated, the threshold voltage of the transistor S can be reset, and the excess charge can be efficiently discharged to the power supply VDD, so even when we use the p-type 矽 half Bl ( ( bl ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° 重 重 重 重 重 重 重 重 重 重In the low-brightness imaging where the photodiode PD is not saturated, it can be borrowed from the former and the high-sensitivity and high-polarity PD photoelectric body PD money and high-brightness camera. (4) The signal obtained by the noise, that is, the front of the saturation === side tear (4) 2), the real device on the side of the butterfly, without reducing the wide range of low brightness, in addition, the sensitivity on the side of the degree Achieve wide pressure. This will allow the power supply to be more than the power supply of the general purpose. Moreover, it is intended to meet the increase in the number of microscopic devices in the future. The addition for reading has been reduced to a minimum, so it does not cause the size of the element to be stored in the same way. The storage week between the embodiments is also #' without dividing (10) the brightness side and the low brightness side. It does not even straddle the frame. Even in the case of moving images, 16 200810540 can avoid deterioration of image quality. Moreover, regarding the leakage current from the floating area FD, the image sensor according to the embodiment The minimum signal of (S1+S2) becomes the saturated charge from the photodiode Pd, thus enabling the image sensor to process the amount of charge greater than the leakage current from the floating region FD. This will provide an image sensor independent of Advantages of the FD leakage effect. Second Embodiment The solid-state image pickup device according to the present embodiment is modified according to the circuit structure of the pixel in the solid-state image pickup device of the first embodiment. FIG. Figure 12 is a schematic plan view of Figure 12. Each element contains: a photodiode PD1 that receives light and generates and stores a light load; a transfer transistor Τ2, adjacent to Light two The body PD1 is provided and transmits a photocharge. A floating region FD3 is connected to the photodiode pDj.' through the transmission transistor T2, and is adjacent to the photodiode PD1 and is provided with the photodiode PD1 during the storage operation. Photoacoustic charge; - storage capacitor CS5, between J, through the overflow gate L04 to store the photo-charge of the overflow photodiode pD1; one or two sets of transistor R6, connected to the storage capacitor (3), with ^ Ray = tFD3 signal The electric charge is stored between the area FD3 and the storage capacitor CS5; an amplified Thunder, tt, or the floating area FD3 and the storage capacitor Hs5 are both SiS昼 and the element: the ghost-selective transistor Χ9 is connected to In the example of the second embodiment, the solid-state image pickup according to the present embodiment is stored for storage. In each element, drive 3D or -dimensional array plus;; by column shift register: line system. Furthermore, a memory is used to generate output. Output_pole, block Displacement Temporary 17 200810540 In the example of the first embodiment described above, the solid-state imaging according to the present embodiment is not limited, as long as the electric lion of the floating domain FD3 can be set to be suitable for the pixel selection. It is sufficient to operate or not select the operation. Therefore, the transistor X9 and the driving line 0 χ 14 are selected abbreviated. J name, , , , , and the solid-state imaging film according to the present embodiment shows the light diode Pm in the element. The general cross-sectional relationship between the wide pole LO4 and the storage capacitor II CS5 region is the same as that of the first one two-two>: FIG. 8A. Therefore, the figure is omitted to avoid the rest of the graph. Furthermore, the two-dimensional image device is omitted. The photodiode TM in the pixel, the transmission transistor Τ2:, the ϊ$ region, the FD3, the storage transistor S7, and the storage capacitor c are the same as those in Fig. 8B, and therefore, the figure is omitted to avoid the re-image. According to the embodiment shown in Figures U and 12, the solid-state imaging image will be described. This is shown in Figure 13. According to the driving mode of the solid-state image pickup device of the embodiment, the body is turned on and the current is depleted. The body R is turned off, and the photodiode PD is at a complete CS ( Day fin opened? Crystal R to reset floating area FD and storage capacitor cry, storage capacitor cs) reset noise is floating = miscellaneous § #bN2 is included in the amplified transistor SF value. The noise component. During the storage period _ (^匕' is the 曰 曰 S, the traverse transistor τ, and the transistor R is reset, the excess photocharge of the stored electricity passes through the overflow pole L0::= In the preparation of cs. This operation allows the overflow of the light diode]? 1) # child in the case of storage, but can be used effectively. In this way, before the saturation = the storage operation is not picked up by the same In each of the storage cycles, the light is received and received in the next two cycles. A ', the same photodiode to switch the selected transistor X after the storage has been completed (time: t4,) Turn on, then after 18200810540, read the memory stored in the photodiode pj), which is contained in the threshold cake of the amplified transistor SF. This is the ^^ fine packet first 仏 元 传输 传输 传输 传输 传输 ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( Fd, discard float = reset operation period, at time: t6;; ^ί^ _ (4), the solid example shown in this example (four) 嶋 (four) - the embodiment of the midpoint mode, by each element = each j to avoid f. In the embodiment, continuous dynamics. "The second ratio, and the broadness does not reduce the low-light sound = the solid-state imaging device of this embodiment is the power supply voltage. This will not be used beyond the general use range. Miniaturization of the sensor. And Η, 二-, the camera device will be able to meet the image in the future, resulting in an increase in the size of the pixel. The addition of '*' has been reduced to a minimum of 70, so it will not be stored in the same period of 4: known as the sensor, this embodiment is the side; the frame. Even in the image sensor of the moving image, the leakage current of the domain FD, the minimum reading of the capacitance of the moving & field FD and the storage capacitor CS according to the present embodiment 19 200810540

信,’亦即(cFD+ccs)變成(過飽和電荷)+(來自光二極體p 電荷),因此使影像感測器得以處理大於浮動區域FD 的,量二此將提供使影像感測器不受漏電影響之者 差^實施例 根據本實施例之固態攝像裝置係為根據 :=例、之固態攝像裝置中之晝素的溢流閘極而加以修1:、圖= 2偏刀職本貫施例之4素的等效電路®與概略平面w,這此Η 係對應於第-實施例之各。而且,@ 16與17分^ g圖 等效電路圖與概略平面圖,這些圖係對應於第二 每一晝素包含:一光二極體PD1,接收# 何 一 FD3 ’係透過傳輸電晶體T2而連接於光二極_了. f ΐL04’ ’係鄰接於光二極體PD1而設且在儲存操作期門 傳輸溢出光二極體PD1之光電荷;一儲存 ;曰1 ,閘極L04,儲存溢出光二極體‘之光電荷;4 則(圖U)、或儲存電容器css(圖 在域 體S7,設於浮動區域與儲存電子, 體SF8,用以將浮動區域FD3中、=S5之^ =大電晶 CS5兩者中之信號電荷讀為電壓;及 電 f 器 放大電晶體删,用以選擇晝素或晝素^擇包s日體X9,係連接於 如上述第一與第二實施例之例子中, 像裝置中,具有上述排列之複數晝素的每1本=例Z態攝 陣列加以儲存。在每一畫素中,驅動 者’,以:、准或-維 分別連接於傳輸電晶體T2、儲存電晶體ST7、重係 極電極。並且,由列位移暫存器所驅動之金二曰曰^之閘 於選擇電晶體X9之閘極電極。再者:素山、擇線0x14係連接 20 200810540 輸出。 如上述第-實施例之例子中,根據 的架,未設限,只要可將浮動區域FD3之電攝 以便此触彳了畫素之選縣作或麵獅 此^ 略選擇電晶體X9與驅動線0χ14。 口此丌了令 俨』18Λ1 第if施例之固態攝像裝置中之晝素中的光二極 及儲存電容1⑶的概略剖面圖。在此, ϊί區i3G與n+型半導體區域32相關連之區域中, 半導體者財1ί。,傭p+半_域5()電連接於P+ 根^實施例之_攝像裝置的操作方法係如 實=之固態攝像裝置的方塊圖係如同第—ί ί卢由每—晝素所讀取之信號、動態範圍之放大比‘ 者之==巧了—第—與第二實施例 5〇係電連接於ρ+丰一與第二實施例’由於Ρ+半導體區域 之固態攝像事置允七Ί區域31與口型井21,所以根據本實施例 度晝素聶像衣置允相動信號之配線數目得以降低,且達成高密 在儲固態攝像裝置為相較於上述第三實施例能夠 图10 4 S更加噸利地移動溢出光二極體之電荷者。The letter, 'that is, (cFD+ccs) becomes (supersaturated charge) + (from the photodiode p charge), thus enabling the image sensor to be processed larger than the floating area FD, which will provide the image sensor without The difference between the effects of the leakage and the leakage of the solid-state imaging device according to the present embodiment is based on the overflow gate of the halogen in the solid-state imaging device of the example: The equivalent circuit of the four elements of the embodiment and the schematic plane w, which corresponds to the respective embodiments of the first embodiment. Moreover, the @16 and 17 points ^ g diagram equivalent circuit diagram and schematic plan, these diagrams correspond to the second each element includes: a photodiode PD1, receiving # 何一FD3 ' is connected through the transmission transistor T2光光二极_了. f ΐL04' ' is adjacent to the photodiode PD1 and transmits the photocharge of the overflow photodiode PD1 during the storage operation period; a storage; 曰1, gate L04, storing the overflow photodiode 'Photon charge; 4 (Figure U), or storage capacitor css (Figure in the domain S7, set in the floating area and stored electrons, body SF8, used to float the area FD3, = S5 ^ = large crystal The signal charge in both CS5 is read as a voltage; and the electric-amplifier amplifying the transistor to select a halogen or a halogen element, which is connected to the first and second embodiments as described above. In the image device, each of the plurality of Z-state arrays having the plurality of pixels arranged as described above is stored. In each pixel, the driver 'is connected to the transmission transistor by :, quasi- or -dimensional respectively. T2, storage transistor ST7, heavy-pole electrode, and gold-driven by column shift register曰^ Gate is selected as the gate electrode of transistor X9. Further: Sushan, select line 0x14 series connection 20 200810540 output. As in the example of the above-mentioned embodiment, according to the frame, there is no limit, as long as The electric light of the floating area FD3 makes it possible to touch the pixel of the selected county or the lion. This selects the transistor X9 and the drive line 0χ14. The mouth is 俨 俨 Λ 18Λ1 in the solid state camera device of the example A schematic cross-sectional view of the photodiode and the storage capacitor 1 (3) in the pixel. Here, in the region where the i3G and the n + -type semiconductor region 32 are associated with each other, the semiconductor is plentiful. The commission p + half _ domain 5 () is electrically connected to The operation method of the camera device of the P+ embodiment is as follows: the block diagram of the solid-state camera device is as follows: the signal read by each 昼素, the amplification ratio of the dynamic range is '=== Coincidentally, the first embodiment is electrically connected to the ρ+Fengyi and the second embodiment. Since the solid-state imaging of the Ρ+ semiconductor region allows the seven-zone region 31 and the lip-shaped well 21, In the embodiment, the number of wirings of the phase-removing signal is reduced, and In the high density storage device is a solid-state image pickup compared to the above-described third embodiment 10 4 S tons more advantageously by mobile charges overflow light diode capable of FIG.

為—像裝置之舶圖的細,其中麵流閘極LO 類型的半“電s:;;r通 21 200810540 基板的表面或其表面附近形成至 體 pd、溢流間極l〇、及儲存電容器csm圖19顯示光二極 及_半導體半導體區域ί 51為1型區域,其摻雜質之有、η型半導體區域 與η+型半導體區域32。 又係低於11型半導體區域3〇 上述構造有助於降低光二極 位阻障。此將允許在電荷 存電容器CS之間的電 順利移至儲存電容器cS。 / θ恤出光—極體PD之電荷得以 圖20與21所示之固態攝像梦 板之預定深度處之溢汽間朽τ二’、_而成為具有與位於基 導體層,且該g下方之部分平行_ 擊穿阻障。 層料低先-極體1^與儲存電容器CS間之 圖20係根據本實施例之固能壯 光二極體PD、溢流閘極L〇、^、象之口面圖的範例,顯示 W 〇及储存電容器CS的區域。在吐, =¾二:之 半導於斜降中之擊 穿阻障。自η型 由光二極體roH諸型^、f、f區域32之擊穿路徑構成 極體PD之電荷擊穿,流路徑,因而允許溢出光二 存電容器CS。 “何儲存期間將電荷順利地移動至儲 20 ® ° « 50下方之預定二衣置的例子中,在溢流閘極1^0之閘極電極 型半導&的區域中’形成n型半導體區域53以便與11 主相連。在此實施例中,更進一步使動型半導體 £域53在下生延伸至η+型半導體區域32下方。 ⑽ 述構4有助於降低溢流閘極L〇中之擊穿阻障。自。型半 22 200810540 路徑構成由光而至n+型半導體區域32的擊穿 溢出光二極cs _路徑,因而允許 移動至儲存電^=何知,俾在電荷存蓄_將電荷順利地 裝置置顧^ 像裝置中之兩8122係根據本貫細之固態攝 ㈣素的纽電路81,且圖23則為其概略平面圖。 成之晝It:,態攝”置為具有以兩畫素”a,,與”b”所組 電容哭Γ每查者’每一晝素塊包含兩二極體與兩儲存 is存ί 2素塊光二極體舰與腿,,接收光且產 極體ifal ί電晶體T_Tb2,,係分別鄰接於光二 a ^ τ 〇而5又且傳輸光電荷;一浮動區域FD3,係透過 4與驚_連接於光二極體舰與PDb^ 設_!在儲;A品tlt0b4,係分別鄰接於光二極體PDai與pdm,而 i—.射·^^間傳輪溢出個別光二極體PDaWpDbl,之光電 :f儲存操__別溢流閘 溢·一舌」+日g別储存Μ出光二極體PDal與PDb1,之光電 二,田δ又電曰曰體R6 ’係連接於儲存電容器csa5與csb5,之每 中之俨號出電容器csa5與csb5,、及浮動區域FD3 存電;二i c==sa7與放 =,日1 於浮動區域FD3與儲 ^ b5之間,一放大電晶體SF8,用以將浮動區 ^之ΐ號電荷、或浮動區域FD3與儲存電容器csa5與 放大雷日荷讀為電壓;及—選擇電㈣X9,係連接於 ,大電j SF8 ’用以選擇晝素或晝素塊。以此方式,作為基本 旦素塊係用以包含兩光二極體、兩儲存電容器、一浮動區 3 放大電晶體SF、-重設電晶體R、及一選擇電晶體X。 以-ϊΐ本ΓΓ之固態攝像裝置中,以上述排列之複數晝素係 以一維或—_列加以儲存。在每—晝素塊中,驅動線 23 200810540 LOb 0Ta、0Tb、0Sa、0Sb、&0R 係分別連接 f〇M,、傳輸電晶體Ta2與Tb2,、儲存電晶體 選擇線心係連接於選擇電晶體 體X9之輸出靖極,且藉由欄位移^ 存态加以控制而產生輸出。 的構造並未設限,只要可將浮動區域FD3i“ 以便能夠進彳Tt权麵縣或非選縣料 略選擇電晶體X9與驅動線0χ。 口匕丌 根據本實關之固態攝像中,顯示晝素塊之晝素,,a,,妒 光二極體舰與腿,、溢流閘極L〇a4與L〇M,、及儲^容 為CSa5與CSb5,區域的概略剖面圖,係與第一實施例所示之圖队 相同,因此,將其圖省略避免重圖。再者,顯示在晝素中之 極體PDal與PDbl,、傳輸電晶體心2與加,、浮動區域fd3、 儲存電晶體,Sb7,、及儲存電容器CSa5與csb5,區域的概略 剖面,係與第-實施例之圖8B相同,因此,亦將其圖予以省略。 罢夕據f 22與23所示之本實施例,將說明固態攝像裝 ^之插,方法。圖24係根據本實施例之固態攝絲置的驅動時序 ®在母旦素塊中,當晝素”a”與,’b”正待讀取時,該讀取便可 由使用相同浮動區域FD、放大電晶體SF、重設電晶體R、及^ 擇電晶體X而加以進行。 、 首先,在曝光儲存前,將晝素” a”之儲存電晶體Sa設為開啟, 且將傳輸電晶體Ta與纽電晶體R設為關。此時,晝素” 極體PDa處於-完全空乏狀態巾。接著,將錄電晶體汉切 換成開啟以重設晝素”a,,之浮動區域FD與儲存電容器csa(時 間:ti)。接著,緊接在重設電晶體R已經切換成關閉後所獲得之 (f+CSa)的重没雜訊,係讀為雜訊信號N2(時間灸)。在此,雜訊 h#uN2 &含在放大電晶體SF之閾值電壓上的變化,以作為固定 24 200810540 溢流間極LOa而儲^ f 餘的光電荷則透過 式,在飽和前、情況下,而能為有效利用。以此方 中之每一書相週期中,儲存操作係藉由以相同儲存週期 光二極體來接收光而加以進行。 ^ ^ «If "ί? X ° ^ 接在該重設後啟以重設浮動區域卿:«,且將緊 以作為固定圖荦之雜二i電,體f之閾值電壓上的變化, 儲rt電容器=在光二極體PDa、浮^域二 (SH^+Nl^i载光電i/j"/匕合;且將該信號讀為 為開啟,Ιΐίί ,亦在晝素,,b,,中將儲存電晶體Sb設 將重言㈣曰Ξϋΐ電晶體ΐ重設電晶體R設為關閉。接著, 將緊d二為開啟以重設洋動區域FD與儲存電容器csb,且 電晶體R已被切換成關閉後所獲得之,CSb)之重For the image of the device, the half of the surface flow gate LO type "electric s:;; r through 21 200810540 substrate surface or its surface near the surface formed into the body pd, the overflow between the poles, and storage Capacitor csm Fig. 19 shows that the photodiode and _semiconductor semiconductor region ί 51 are a type 1 region having a doped type, an n-type semiconductor region and an n + -type semiconductor region 32. Further, it is lower than the 11-type semiconductor region 3 〇 the above structure Helps reduce the light diode barrier. This will allow the electricity between the charge storage capacitor CS to smoothly move to the storage capacitor cS. / θ shirt light - the charge of the polar body PD can be seen in the solid-state imaging dream shown in Figures 20 and 21. The overflow τ of the plate at a predetermined depth is τ', which becomes parallel to the base conductor layer and the portion below the g_ breakdown barrier. The layer is low-first-pole 1^ and the storage capacitor CS FIG. 20 is an example of a surface diagram of a solid-state diode PD, an overflow gate L〇, and an image according to the present embodiment, showing an area of the W 〇 and the storage capacitor CS. In the spit, =3⁄4 Two: The semi-conducting breakdown barrier in the oblique drop. From the η type by the photodiode roH type ^, f The breakdown path of the f region 32 constitutes the charge breakdown of the polar body PD, and the flow path, thus allowing the overflow of the optical capacitor CS. "When the storage period, the charge is smoothly moved to the storage 20 ® ° « In the example, the n-type semiconductor region 53 is formed in the region of the gate electrode type semiconductor & of the overflow gate 1^0 so as to be connected to the 11 main. In this embodiment, the movable semiconductor domain 53 is further extended below the n + -type semiconductor region 32. (10) The description 4 helps to reduce the breakdown barrier in the overflow gate L〇. from. Type half 22 200810540 The path constitutes a breakdown of the light-to-n+-type semiconductor region 32 from the light-emitting diode bipolar cs_path, thus allowing movement to the storage device. 何 何 电荷 电荷 电荷 电荷 电荷 电荷 电荷 电荷 电荷 电荷 电荷 电荷 电荷 电荷 电荷 电荷The two 8122 in the image device are based on the compact circuit of the solid state (four), and Figure 23 is a schematic plan view. Chengzhi 昼It:, the state photo "set to have two pixels" a,, and "b" set of capacitors crying every checker 'each elementary block contains two diodes and two storage is stored ί 2 The block light diode is connected to the leg and receives the light and the polar body ifal ί transistor T_Tb2, which is adjacent to the light a ^ τ 〇 and 5 and transmits the photocharge; a floating region FD3, through the 4 and the shock _Connected to the light diode ship and PDb^ set _! in storage; A product tlt0b4, respectively adjacent to the optical diode PDai and pdm, and i-. Shooting ^^^ between the individual light diode PDaWpDbl, Photoelectricity: f storage operation __Do not overflow overflow gate · one tongue" + day g do not store the light emitting diode PDal and PDb1, the photoelectric two, the field δ and the electric body R6 ' is connected to the storage capacitor csa5 and Csb5, the nickname of each of the capacitors csa5 and csb5, and the floating area FD3 stored; two ic == sa7 and put =, day 1 between the floating area FD3 and the storage b5, a magnifying transistor SF8, It is used to read the ΐ electric charge of the floating area, or the floating area FD3 and the storage capacitor csa5 and the amplified thunder load as a voltage; and - select the electric (four) X9, which is connected to the big electric j SF8 ' Day day biotin or to select pixel block. In this manner, the basic dendrite block is used to include two photodiodes, two storage capacitors, a floating region 3 amplifying transistor SF, a reset transistor R, and a selective transistor X. In the solid-state imaging device of the present invention, the plurality of cells arranged in the above-described manner are stored in one-dimensional or --- columns. In each of the alum blocks, the drive lines 23 200810540 LOb 0Ta, 0Tb, 0Sa, 0Sb, & 0R are respectively connected to f〇M, the transmission transistors Ta2 and Tb2, and the storage transistor selection line is connected to the selection. The output of the transistor X9 is symmetrical, and is controlled by the column displacement ^ state to produce an output. The structure is not limited, as long as the floating area FD3i can be used so that it can enter the Tt-weight county or the non-selected county to select the transistor X9 and the drive line 0χ. The port is displayed according to the solid-state camera of this reality.昼素块,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, The map shown in the first embodiment is the same, and therefore, the figure is omitted to avoid the rest of the figure. Furthermore, the polar bodies PDal and PDbl, the transfer transistor core 2 and the addition, the floating area fd3, which are displayed in the pixel, The storage transistor, Sb7, and storage capacitors CSa5 and csb5, the schematic cross-section of the region is the same as that of Fig. 8B of the first embodiment, and therefore, the figure is also omitted. The present invention according to f 22 and 23 In the embodiment, a method of inserting a solid-state image pickup device will be described. Fig. 24 is a driving sequence of the solid-state film set according to the present embodiment® in a parental block, when the elements "a" and "b" are waiting When reading, the reading can be performed by using the same floating area FD, amplifying the transistor SF, resetting the transistor R, and selecting the transistor X. And proceed. First, before the exposure storage, the storage transistor Sa of the halogen "a" is set to be turned on, and the transmission transistor Ta and the neon crystal R are set to be off. At this time, the halogen Pole PDA is in the -completely depleted state towel. Next, the recording transistor is cut to be turned on to reset the halogen "a", the floating region FD and the storage capacitor csa (time: ti). Then, the re-noise of (f+CSa) obtained immediately after the reset transistor R has been switched off is read as the noise signal N2 (time moxibustion). Here, the noise h#uN2 & includes a change in the threshold voltage of the amplifying transistor SF, as a fixed 24 200810540 overflow interpole LOa, and the remaining photocharge is transmissive, before saturation, Under, but can be used effectively. In each of the book phase cycles, the storage operation is performed by receiving light with the same storage period photodiode. ^ ^ «If " ί? X ° ^ After the reset, reset the floating area qing: «, and will be used as a fixed figure 杂 二 i i 体 体 体 体 体 体 体Storing rt capacitor = in the photodiode PDa, floating domain 2 (SH^ + Nl ^ i carrying optoelectronic i / j " / 匕; and the signal is read as open, Ιΐ ίί, also in 昼素,, b, The central storage transistor Sb is set to say that (4) the transistor ΐ reset transistor R is turned off. Then, the second is turned on to reset the oceanic region FD and the storage capacitor csb, and the transistor R Has been switched to the value obtained after closing, CSb)

;ίίίί ™!#bN2 〇 ? ^tEN2 SF 之閾值電壓上的變化,以作為固定圖案之雜訊成分。 儲存在間(時間:^ ’飽和前之光電荷係由光二極體™所 存於儲存多餘之光電荷便透過溢流閘極LOb而儲 菩,完成後(時間:ti〇),將選擇電晶體χ切換成開啟。接 重($晶體r切換細啟以重設浮動區域卿知),且將 緊接2重設後所獲得之ro重設雜訊讀為雜訊信號叫時間、。 者’將傳輸電晶體Tb切換成開啟以將儲存於光二極體pDb 25 200810540 中之光信號完全傳輸至浮動區域FD(時間如),且該信號係 f先一極體PDb中之光電荷完全傳輸至浮動區域^與儲 ίϊίϋί:極體pDb、浮動區域fd、及儲存電容器⑽ 中之電何予以此合,且將該信號讀為(S1+S2+N2)。 曰^fttt例之固態攝像裝置中,因為浮動區域阳、放大電 『晶體R、及選擇電晶體χ係以每兩晝素為一組之 比率加以自又置,所以可減少每一畫素之晝素面積。 外線係以每兩晝素為一組之比率加以設置為不同之 二3=施^_攝像裝置的方塊圖係如同第—實施例中 實施射以連續點方式、由每—晝素所讀取之 、錢綱輸制合成係與第一 全乍Γ ’係以連續驅動設於晝素塊之晝素且利用來自 (—rung韻)操作,吾人可 二= 擇之晝素所獲得之信號;或者,= 素塊中混合與添加晝素信號以期利用該信號。* " 在旦 在不根據本實施例之固態攝像裝置,係 :度因而達ii:亡ΐ”的情況下,俾增加高亮度側上之敏 圍之電源4;ί::二 會導致晝素尺寸之增加。 、、加已降至衫、,所以不 以相:ί儲:⑺之感測器,本實施例係 此方式仍可避免影像品質之劣化卩使在移動影像之攝像中, 而且’關於來自浮動區域FD之漏電流,根據本實施例之影 26 200810540 像感測器,(S1+S2)之最小信號變成來自光二極體pd之飽和電 荷,因此使影像感測器得以處理大於浮動區域FD之漏電流者g 電荷量。此將提供使影像感測器不受FD漏電影響之優點。 第六實施例 夂” 根據本實施例之固態攝像裝置為根據第一實施例之固態攝像 裝置中之電路架構而加以修改者。圖25係根據本實施例之^態攝 •像裝置中之四個晝素的等效電路圖。圖26則為其概略平面圖二 • 根據本實施例之固態攝像裝置為具有以四個晝 素”a”、”b”、”c”及,,d”所組成之晝素塊作為基本單元者,每一^ 素塊包含四個二極體與四個儲存電容器。每一晝素塊包含:光^ 極體PDa卜PDbl,、PDcl”、及PDdl,,,,接收光且產生與儲^ 光電荷;傳輸電晶體Ta2、Tb2,、Tc2”、及Td2,,,,係分別鄰接 於光二極體PDal、PDbl’、PDcl”、及PDdl’’’而設且傳輸光電 荷;一浮動區域FD3,係透過傳輸電晶體Ta2、Tb2,、ΤθΊ 丁d2”’而分別連接於光二極體PDa卜PDbl,、PDcl,,、及PDdl,,,; 溢流閘極LOa4、LOb4,、LOc4,,、及LOd4,,,,係分別鄰接於光 二極體PDal、PDbl,、PDcl,,、及PDdl,,,而設且在儲存操作期 間傳輪溢出個別光二極體PDal、PDbl,、PDcl”、及PDdl,,,之 卞電荷;儲存電容器CSa5、CSb5,、CSc5,,、及CSd5,,,,在儲存 操作期間經由個別溢流閘極L〇a4、LOb4,、LOc4,,、及LOd4,,, 分別儲存溢出光二極體PDal、PDbl,、PDcl”、及pDdl,,,之光 • 電荷,一重設電晶體R6,係連接於儲存電容器CSa5、CSb5,、 .^Sc5 、及cSd5’’’之每一者,用以釋出在儲存電容器⑶沾、 CSC5、及CSd5、及浮動區域FD3中之信號電荷;儲 f,晶體Sa7、Sb7’、Sc7”、及Sd7,,,,設於浮動區域]^3與儲存 =谷态 ^Sa5、CSb5’、CSc5’’、及 CSd5,,,之間;一放大電晶體 SF8, w以將浮動區域FD3巾之^號電荷、或浮動區域與儲存電容 :CSa5、CSb5’、CSc5”、及CSd5’’’之每一信號電荷讀為電壓; 一選擇電晶體X9,係連接於放大電晶體SF8,用以選擇晝素或 27 200810540 =塊。以此方式,作為基本單元之晝素 重設電晶體R、及一;擇;=域FD、一放大電晶體SF、- 以二之固態攝像裝置中,以上述排列之複數晝素係 /、車列加以儲存0在每一畫素塊中,驅動線0LOa、0 -、0L〇C/L〇d、、0Ta、“、“、“、I、“、“、必 Sd 係分別連接於溢流閘極L0a4、L0b4,、L0c4,,、另; ίίίί TM!#bN2 〇 ? ^tEN2 The change in the threshold voltage of SF as a noise component of the fixed pattern. Stored in between (time: ^ 'saturation before the photocharge is stored by the photodiode TM to store excess photo-charge and then stored through the overflow gate LOb. After completion (time: ti〇), the transistor will be selected χSwitch to open. The weight is connected ($ crystal r switches fine to reset the floating area), and the ro reset noise obtained after 2 reset is read as the noise signal called time. Switching the transmission transistor Tb to turn on to completely transmit the optical signal stored in the photodiode pDb 25 200810540 to the floating region FD (time), and the signal charge f is completely transmitted to the photocharge in the first polar body PDb to The floating area ^ and the storage ϊ ϊ ϋ : : : : 极 极 极 极 极 极 极 极 极 极 极 极 极 极 极 极 极 极 极 极 极 极 极 极 ft ft ft ft ft ft ft ft ft ft ft ft ft ft ft ft ft ft ft ft ft ft ft ft ft ft ft ft Because the floating area is positive, the amplified crystal "crystal R, and the selected transistor system are self-reset with a ratio of each two elements, so the pixel area of each pixel can be reduced. The ratio of the elements of the group is set to be different. The block diagram is the same as that in the first embodiment, which is executed by the continuous point method, and is read by each of the alizarins, and the Qiangang transmission and synthesis system and the first full 乍Γ ' are continuously driven to the 昼 块 block. And using the operation from (-rung rhyme), we can choose the signal obtained by the choice of the element; or, = mix and add the halogen signal in the prime block to use the signal. * " In the absence of this In the case of the solid-state imaging device of the embodiment, in the case that the degree is ii: ΐ ΐ 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 俾 高 高It is reduced to the shirt, so it is not the phase: ί Storage: (7) sensor, this embodiment can still avoid the degradation of image quality, in the imaging of moving images, and 'About the leakage from the floating area FD Current, according to the shadow of the embodiment 26 200810540 Image sensor, the minimum signal of (S1+S2) becomes the saturated charge from the photodiode pd, thus enabling the image sensor to process the leakage current larger than the floating region FD The amount of charge. This will provide an image sensor that is immune to FD leakage. The sixth embodiment 夂" The solid-state image pickup device according to the present embodiment is modified in accordance with the circuit configuration in the solid-state image pickup device according to the first embodiment. Fig. 25 is a view of the image pickup device according to the present embodiment. The equivalent circuit diagram of the four elements in Fig. 26. Fig. 26 is a schematic plan view thereof. 2. The solid-state image pickup device according to the embodiment has four elements "a", "b", "c" and, d The composed elementary block is the basic unit, and each element block contains four diodes and four storage capacitors. Each elementary block contains: photodiodes PDa, PDbl, PDcl, and PDdl , receiving light and generating and storing photo charges; transmitting transistors Ta2, Tb2, Tc2", and Td2, respectively, adjacent to photodiodes PDal, PDbl', PDcl", and PDdl'' 'Setting and transmitting photocharges; a floating region FD3 is connected to the photodiodes PDa, PD, PD, PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD Overflow gates LOa4, LOb4, LOc4,, and LOd4,,,, are adjacent In the light diodes PDal, PDbl, PDcl,, and PDdl,, and during the storage operation, the floating charges of the individual photodiodes PDal, PDbl, PDcl", and PDdl, are stored; The capacitors CSa5, CSb5, CSc5,, and CSd5, respectively, store the overflow photodiode PDal via the individual overflow gates L〇a4, LOb4, LOc4, and LOd4 during the storage operation, PDbl, PDcl", and pDdl,,, light, charge, a reset transistor R6, connected to each of the storage capacitors CSa5, CSb5, . . . . . . . . . . . The signal charge in the storage capacitor (3), CSC5, and CSd5, and floating region FD3; storage f, crystals Sa7, Sb7', Sc7", and Sd7,,, are located in the floating region]^3 and storage = valley state ^Sa5, CSb5', CSc5'', and CSd5,,,; amplifying the transistor SF8, w to charge the floating area FD3, or floating area and storage capacitor: CSa5, CSb5', CSc5" And each signal charge of CSd5''' is read as voltage; one selects transistor X9, which is connected to Large transistor SF8, used to select halogen or 27 200810540 = block. In this way, as a basic unit, the resetting of the transistor R, and the selection of the == domain FD, the amplifying transistor SF, and the second solid-state imaging device, the plurality of elements arranged in the above arrangement, The train is stored in 0. In each pixel block, the drive lines 0LOa, 0 -, 0L〇C/L〇d, 0Ta, ", ", ", I, ", ", and Sd are respectively connected to the overflow. Flow gate L0a4, L0b4, L0c4,,, another

Ta2 ;,Tb2,' :c2?,' ^^ « 0 Sd7 、及重设電晶體R6之閘極電極。而 Γ斤驅動之錄選擇線0x係連接於選擇電晶體 ^ 輸出線〇UT15係連接於選擇電晶體X9 之輸出侧源=,且藉由攔位移暫存器加以控制而產生輸出。 ㈣i吐Ϊ第—實施例之例子中,根據本實施例之_、攝像裝置 勺構以亚未设限,只要可將浮動區域FD3之電壓固定於一適各 以便能夠進行晝素之選擇操作或非選擇操作即可。此,^ 略選擇電晶體X9與驅動線0χ。 丌了啗 在根據本實施例之固態攝像中,其概略剖面圖係代表在晝 塊之畫素”a,,、,,b,,、,,c,,及,,d,,中之光二極體 pDal、pDM,、pDcY' 及 PDdl”’、溢流閘極 LOa4、LOb4,、L〇c4,,、及⑷私,,,、及 儲,電f器、CSa5、CSb5’、CSc5”、及CSd5,,,的區域,該剖面圖 與第一實施例所示之圖8A相似,因此,將其圖省略避免重圖。再 者,對應於晝素中之光二極體PDal、PDbl,、PDcl,,、及PDdl,,,、 傳輸電晶體Ta2、Tb2’、Tc2”、及Td2,,,、浮動區域FD3、儲存 電晶體 Sa7、Sb7,、Sc7,,、及 Sd7,,,、及儲存電容器 CSa5、CSb5,、 CSc5 、及CSd5之區域之本固態攝像裝置的概略平面圖,係與 第一實施例之圖8B相似,因此,亦將其圖予以省略。 、 在此,根據圖25與26所示之本實施例,將說明固態攝像裝 置之操作方法。圖27係根據本實施例之固態攝像裝置的驅動時序 圖。在每一晝素塊中,當晝素”a”、”b”、,,c,,及,,d,,正待讀取時, 28 200810540 =便====、SF、重設電 先—極體PDa處於-完全空乏狀離中。 〗-京a之 儲存Ϊί 重±設電晶體R,以重設晝素”a”之浮動區域FD與 著,讀取在重設電晶體R已關閉後立 A ll ^ Sa)的重5又雜汛,以作為雜訊信號N2(時間.t2)。 以作為放大電晶體SF之閑值電壓上的變化, PDa戶=㈣之光電荷係由光二極體 而儲存^存而電田^過^口:,多餘的光電荷貝_溢流閘極LOa 在此κ時叫 以作為,定_之雜訊3成t 體之_€壓上的變化, 精^啟傳輸電晶體Ta,以將儲存於光二極體PDa中之光 ii元ί動區域FD(時間:t7),且該信號係讀為(s_)。 ϊ體ίίΐίί Sa切換成敝(時間:t8),以將儲存於光二 CSal#中ίί電何完全傳輸至浮動區域FD與儲存電容器 H Λ二極體巧、浮動區域FD、及儲存電容器⑽中之電 晝素” b:r將儲讀為(S1+S2+N1)。在曝光儲存前,亦在 i曰曰許設為開啟’且將傳輸電晶體Tb與重設 體R 4 M。接著,將重設電晶體R設賴啟以重設浮動 29 200810540 ^域FD與儲存電容器csb,且將緊接於重設 得之(FD+csb)之重設雜訊讀為雜訊信^ N2。在此: 固定放大__概賴上的魏,以作為 儲存在間(時間:t9),飽和前之光電荷係由光二極體腿所 it諸ΐΐΐ過飽和時,多餘之光電荷便透過溢流閘極LOb而儲 ^ tti、2CSb中。在儲存已完成後(時_,將選擇電ΐ I FT?成鮮’將重設電㈣R _賴啟以重設浮動 二號νΪΪΗ且,接^該轉後所獲得之™ 4設雜訊讀為雜 存‘i -朽;曰1 ΐ!。接著,將傳輸電晶體Tb切換成開啟以將儲 m、f j 中之光信號完全傳輸至浮動區域FD(時 至、、^動& ίΐί 將儲存於光二極體PDb中之光f荷完全傳輸 與儲存電容器CSb。在光二極體PDb、浮動區域 為(Sl3t3容巾所财之電荷予以混合,且將該信號讀 為」Π 後’針對晝素,,e”與“d”重複相同操作。 曰骑tft貫施例之固態攝像裝置中,因為浮動區❹D、放大電 =率加以=R、及選擇f晶體X係以每四個晝素為一組 之比羊加〜置’所以可減少每-晝素之晝素面積。 全部,細賴,鶴設於錢狀錄且利用來自 吾人可㈣素塊來選擇任何晝素,以利^ 素所獲得之信號。或者,於—均值化操作時,五人可 旦素塊中混合與添加晝素信號而利用該信號。 从*^"1輪出線係以每四個畫素為—組之比率加以設置s不同之 根,本實施例之固態攝像裝置的方塊圖係如同第 3之圖Κ)者。在實施例中以連續點方式、由每—t素所 =例===比、及寬廣動態範_的合成係“一 30 200810540 在不^根據本實施例之_攝像裝置,係 感产因而、之敏感^的情況下,俾增加高亮度側上之敏 Κ電、祕ΐίί乾圍’此外,此裝置並未使用超過一般使用範 增Γ’因為元件之添加已降至最少,所以不 以相ϊί二不同於施行寬廣範圍之習知影像感測器,本實施例係 間的儲存2期ΐ儲存光電荷’而不分割高亮度側與低亮度側之 週期,亦即不跨立_。即使在軸影像之攝像中,此 方式仍可避免影像品質之劣化。 像’,自,區域FD之漏電流’根據本實施例之影 (S1+S2)之隶小信號變成來自光二極體pD之飽和電 ;;旦仏感測器得以處理大於浮動區域FD之漏電流者的 /何,。此將提供使影像感測器不受阳漏電影響點。 七實^g ”、、 之光象裝置,係將用以儲存溢出光二極體 例。电D °子包谷态,以上述第一至第六實施例加以修改的範 打Ϊ利用—接面儲存電容器作為儲存電容器時,甚至 ^干條^考量下’亦即其面積效率並非很高之情況下 2靜電電容係、落於G.3至3 ff/_2之階次上,因此, 不易擴大動態範圍。 在平面儲存電容器之例子巾,#絕緣膜之電場 MV/em或更小時,最大施加電壓賴為2.5至3 V, π =二谷為1巴、緣膜厚度設為7 nm之階次,目的是為了抑制電容哭 緣,電流’相關之介電f數為㈣9時,靜電電i 二成.8fF/"m ’ Sr=7.9時靜電電容則變成9 9fF/#m2, ^ ^容職成%取⑽2,及時,靜魏容則變成 200810540 利用所谓的咼-k材料允許較大之靜電電定 化石夕(ε r:7.9)、Ta2〇5( ε r:約 20 至 30)、丁 ^如氮 約30)、Law' ε r:約40至50)、以及氧化矽Γ.·3 )r: 具有相當簡單結構之平面儲存電容器之例子中^使在 範圍寬如100至200 dB的影像感測器。 只見具有動態 而且,結構之應用,例如堆疊型或溝牮 亡,而能夠增大電容器貢獻之面積,允許達絲9如二=斤伯據 ,範圍,而且,以組合方式_上述之高士材 之動 疊型與溝渠型達成寬如140 dB與160 (©之動㈣^。。刀別以堆 之後,將顯示本實施例可應用之儲存電 ,第-實施例者平面M0S儲存電容器的剖面。圖^如°圖2= 電谷态CS之配置係用以包含:一作為 此储存 ^r.i; ™43 ? ^ f 29係顯示平面M〇s與街面儲存 此儲存電容ϋ cs之配置係用以包含:’ 導體區域仏在n型半導體基板2〇上所形成之^ n+型半 加以形成,係與作為儲在帝曰骑 PI井之表面層中 32加以整合形成;及—上型半導體區域 容器絕緣膜42加以形成,設於該^者^^所製成之電 趣儲存電面圖)為一類似圖28中所示之 電容器絕緣削2“系以高士材料樵圖28者,f此儲存電容器中, 在圖31中所示之儲六哭’ ^如氮化矽或办2〇5。 面MOS與接面儲存^哭电面圖)為一類似圖29所示之平 魏緣媒-係以高士材料構成者例 32 200810540Ta2;, Tb2, ' :c2?, ' ^^ « 0 Sd7 , and reset the gate electrode of transistor R6. The recording selection line 0x of the driving drive is connected to the selection transistor. The output line 〇 UT15 is connected to the output side source= of the selection transistor X9, and is controlled by the displacement register to generate an output. (4) In the example of the embodiment of the present invention, the camera device according to the present embodiment is not limited in any way, as long as the voltage of the floating region FD3 can be fixed to a suitable one to enable the selection operation of the pixel or You can do it by non-selection. Therefore, ^ transistor X9 and drive line 0χ are selected slightly. In the solid-state imaging according to the present embodiment, the schematic cross-sectional view represents the pixels in the block "a,,,,,,,,,,,,,,,,,,,, Polar body pDal, pDM, pDcY' and PDdl"', overflow gate LOa4, LOb4, L〇c4,, and (4) private,,, and storage, electric device, CSa5, CSb5', CSc5" And the area of CSd5,,, the cross-sectional view is similar to that of FIG. 8A shown in the first embodiment, and therefore, the figure is omitted to avoid the re-image. Furthermore, corresponding to the photodiodes PDal, PDbl in the pixel, , PDcl,, and PDdl,,,, transmission transistors Ta2, Tb2', Tc2", and Td2,,, floating area FD3, storage transistors Sa7, Sb7,, Sc7,, and Sd7,,,, The schematic plan view of the solid-state imaging device in the region of the storage capacitors CSa5, CSb5, CSc5, and CSd5 is similar to that of FIG. 8B of the first embodiment, and therefore, the drawings are also omitted. Here, according to the embodiment shown in Figs. 25 and 26, the operation method of the solid-state image pickup device will be explained. Fig. 27 is a timing chart of driving of the solid-state image pickup device according to the embodiment. In each element block, when the elements "a", "b", c, c, and, d, are waiting to be read, 28 200810540 = will ====, SF, reset First, the polar body PDa is in a completely vacant state. 〗 〖-Jing a storage Ϊ 重 ± ± 设 电 电 设 设 设 设 设 设 设 设 设 设 设 设 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电The chowder is used as a noise signal N2 (time.t2). In order to change the voltage of the idle voltage of the amplifying transistor SF, the photocharge of the PDa household = (4) is stored by the photodiode and the electric field is ^^: the excess photocharges - the overflow gate LOa In this case, κ is called, and the noise of the _ _ _ _ _ _ _ _ _ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ (Time: t7), and the signal is read as (s_). ϊ ίίΐίί Sa switch to 敝 (time: t8) to completely transfer the stored in the light II CSal# to the floating area FD and the storage capacitor H Λ diode, the floating area FD, and the storage capacitor (10) The electric sputum "b:r will be stored as (S1+S2+N1). Before the exposure storage, it is also set to "on" and the transistor Tb and the reset body R4M will be transmitted. Then, The reset transistor R is set to reset the floating 29 200810540 ^ domain FD and the storage capacitor csb, and the reset noise immediately after the reset (FD + csb) is read as the noise signal N 2 . Here: the fixed amplification __ depends on the Wei, as stored in the middle (time: t9), the photocharge before saturation is supersaturated by the light diode legs, the excess light charge passes through the overflow The gate LOb is stored in ^tti, 2CSb. After the storage has been completed (hour _, will select the electric ΐ I FT? into the fresh 'will reset the electricity (four) R _ Lai Qi to reset the floating No. 2 ν ΪΪΗ, and then ^ The TM 4 obtained after the turn is read as a miscellaneous 'i - decay; 曰1 ΐ!. Then, the transfer transistor Tb is switched on to fully transmit the optical signal in the storage m, fj The floating area FD (time to, ^, & ίΐί) completely transfers the light f charge stored in the photodiode PDb to the storage capacitor CSb. In the photodiode PDb, the floating area is (Sl3t3 Mixing, and reading the signal as "Π" after repeating the same operation for the element, e" and "d". In the solid-state imaging device of the example of the ride, because of the floating area ❹D, the amplification rate = rate = R, and select the f crystal X system with each of the four elements as a group of the ratio of the sheep plus ~ set ' so can reduce the area of the perennial element of the alizarin. All, fine, crane set in the money record and use from We can use (4) the prime block to select any element to obtain the signal obtained by the element. Or, in the case of the -averaging operation, the signal can be mixed and added with the halogen signal in the five-person block. From *^ "One round of the line is set with a ratio of each of the four pixels as a group, and the block diagram of the solid-state image pickup device of the present embodiment is the same as that of the third figure. In the embodiment, The continuous point method, the synthesis system of each -t prime = example === ratio, and the broad dynamic range _ "a 30 20 0810540 In the case where the camera device according to the present embodiment is sensitive to the sense, the Κ 俾 俾 俾 俾 高 高 ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' The use of Fan Zengqi 'because the addition of components has been minimized, so it is not different from the conventional image sensor that implements a wide range. In this embodiment, the storage of the phase 2 storage of photocharges is not divided. The period between the high-brightness side and the low-brightness side, that is, no straddle _. This method can avoid deterioration of image quality even in the imaging of the axis image. The leakage current like ', self, region FD' becomes a saturated signal from the photodiode pD according to the shadow (S1+S2) of the present embodiment; the denier sensor can handle the leakage larger than the floating region FD The current / what, the current. This will provide the point at which the image sensor is protected from solar leakage. The light-image device of the seven-figure, "g", will be used to store the overflow light diode. The electric D ° sub-package valley state, modified by the above first to sixth embodiments, the use of the junction storage capacitor As a storage capacitor, even if the area is not very high, the 2 electrostatic capacitance system falls on the order of G.3 to 3 ff/_2, so it is difficult to expand the dynamic range. In the example of a planar storage capacitor, the electric field MV/em or less of the #insulating film, the maximum applied voltage is 2.5 to 3 V, π = two bar is 1 bar, and the thickness of the film is set to 7 nm. The purpose is to suppress the capacitor crying edge, the current 'correlated dielectric f number is (four) 9 o'clock, the electrostatic current i is 20.8fF / " m ' Sr = 7.9 when the electrostatic capacitance becomes 9 9fF / #m2, ^ ^ In the case of % (10) 2, in time, the static Wei Rong becomes 200810540. The so-called 咼-k material allows the larger electrostatic electricity to be determined by 化 夕 (ε r: 7.9), Ta 2 〇 5 ( ε r: about 20 to 30), ^ such as nitrogen about 30), Law' ε r: about 40 to 50), and yttrium oxide. · 3)r: a planar storage capacitor having a relatively simple structure In the sub-image, the image sensor is as wide as 100 to 200 dB. It can be seen that it has dynamic and structural applications, such as stacking or trenching, which can increase the area contributed by the capacitor, allowing Das 9 to = 斤 据 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 Applicable storage power, the cross section of the planar MOS storage capacitor of the first embodiment. Fig. 2 = Fig. 2 = configuration of the electric valley state CS is used to include: one as the storage ^ri; TM43 ? ^ f 29 The display plane M〇s and the street surface store the storage capacitor ϋ cs are configured to include: 'The conductor region ^ is formed on the n-type semiconductor substrate 2〇, and is formed in the emperor. The surface layer 32 of the PI well is integrated and formed; and the upper semiconductor region container insulating film 42 is formed, and the electrical storage surface pattern formed by the ^^^^ is similar to that shown in FIG. The capacitor insulation is shown as 2" with the Coats material in Figure 28, f this storage Vessel, in the reservoir 31 as shown in FIG six cry '^ such as silicon nitride, or do 2〇5. The surface MOS and the junction storage ^ crying electrical surface diagram) is similar to the flat-leaf-environment shown in Figure 29 - the example of the composition of the Coats material 32 200810540

Ta2〇5’且使其電容大於圖29者。 上方之元件隔離絕緣膜62上.一電^成 =設於n型半導體基板2〇 電極63上;及-上部電極t’,开^成^^膜=形成於該下部 冤極63係以配線45相連接。 J守股匕切%及下部 • 地GND係施加於上部電極65。,电源供應電壓VDD或接 CS ^ 極的n+型半導體區域32 為儲^電晶體之源極/沒 形成於該下部電極67之内相器絕緣膜妨, 絕緣膜68而加以形成,以便後入於^極69,隔著該電容器 此,電源供應電麈VDD或接地D ° ^内部部分。在 成係為嵌人下部電極67卿部上部電極69。其形 般物具有更大之接面面積,;:=電助: 器的剖面圖》ίί:; 二組合儲存電容 圖35係顯示—溝渠儲存電容成哭之有二面,效率之大電容。 係用以包含:—溝渠TC,其形成係為切存電容器Cs 上之p型井21,以抵達n型半導俨^ ;二或半導體基板20 型半導體區域7〇,形成於溝竿一作為下部電極之n+ ,成係為覆蓋該及膜I ΐ電容器絕緣膜71而嵌人溝渠Tc。在此,作為儲ίϊ成係為隔 n+mm 32' 72;,/;:«^ ,36係顯示具有接面之溝渠儲存電容器的剖 。。cs之配置在於使溝渠Tc形成於n型轉體基 33 200810540 型井21内;在溝渠tc之内壁中,一、 f域’係與作為儲存電晶體 ^;下部電極之㈣半導體 加以正a形成;及—電容器絕緣膣、%,及極的n+型半導體區域32 之内壁;及一上部電極75,其、,其形成係為了覆蓋該丁 c 入溝渠TC。 、知糸為隔著電容器絕緣膜74而篏 /圖37係顯示-溝渠儲存電 • 係用以包含:-溝渠Tc,其形 ^剖面圖。此儲存電容器cs • 上之P型井21,以抵達n型半導髀其刀穿位於n型半導體基板20 型半導體區域76,以深於溝渠Tfj2〇、; 一作為下部電極之n+ 渠TC之内壁上;一電容器絕緣膜深度的區域、形成於溝 S 78,其形成係為隔著覆蓋該TC之 溝木TC。在此,作為儲存電晶 者屯谷态絶緣膜77而嵌入 32、及上部電極78係由配線45= 目之表及極的n+型半導體區域 y圖38係顯示一溝渠儲存電衮哭夕☆丨。 係用以包含··一溝渠丁C,面圖。此儲存電容器CS 上之p型井22,以抵達„型4,七刀f位於η型半導體基板2〇 型半導體區域79,形成於溝準Tr/土反0,作為下部電極之ρ+ 著電谷為絕緣膜80而篏入溝渠Tc。 °卩电極81,其形成係為隔 極7沒極的n+型半導體區域32’以及作為儲存電晶體之源 連接。 σ電極幻係藉由配線45相 圖39係顯示具有利用接面 山 CMOS感測器的剖面圖。例如,:日=入式儲存電容器之 半導體上,且一 n+型半曰d、形成於p型石夕 型蟲晶層91而加以形成。^卩n 型石夕半導 ,體區域與P型(第二導電類型)半導域相ill電類型)半 ,態攝像裝置之半導體基板的内部係嵌入於構 成肷入式儲存電容器。再者,p+型隔 接面電容器形 體(P_sub)90 I p型石曰届…由 ^ 係形成於p型半導 層91中。-商導體層糾以 34 200810540 L i上。如上述實施例之例子中,針對p型料導體層 域FlT㈣一極體PD、溢流閑極L〇、傳輸電晶體T、浮動區 ί巴域體S。例如,作為儲存電容器SC之n+型半導 ^域92係廣泛地形成於該若干形成區域上,如 於Ρ型㈣垂直延伸 域92相連。 -稱成儲存電谷益之η+型半導體區 ,40係顯示利用一絕緣膜電容器與一接 、且 式儲存電容器之CM0S感測器的剖面圖。此 ^ ς ^ ^之曰结而,在此感測器中’第一 Ρ型蟲晶iilal第。 而形成體)基板,使轉體層係隔著絕緣膜 曰盛onu 區域杈越弟一 P型磊晶層91a盥第二D创石 j,且儲存電容H係姻轉體 G = ς ,容器加以形成,其中半導體基 === 電容器係職於第-接面 其他結構則與圖39中所示之CMOS感測器者相同。曰S之間。 圖41係顯示利用一絕緣膜電容器鱼一 式儲存電容器之CM0S感測器的剖面°圖。有歲入 形成於構成光二極體型半導^度==(1層辦係 ^ 域921 _維障,_ 自 二二電在電荷存蓄期間’此將允許溢出光 別迷各種儲存電容器係可應用於上述第一至第七實施^= 壬 35 200810540 範例1 ,膺至屬配線之丰導體的製造方法加以製造。在 ΐ之象裝置元件具有以二維陣列所排列之晝素 :t素之數目,列)χ48_)、7·5_平方 2 Ϊ區域f Cfd=4 σ、儲存電容fF。每-儲存電容 Γ石夕、=^广/所構成,亦即多晶參氧化賴-梦的電容器與多 多晶石夕的電容器。信號S1與⑻说)之餘和電壓分 S1 sls^fj000 mV 0 5 "(S1+S2)中者,係為0.09 mV之相同值。將自si至 之切換電壓設為低於信號S1之飽和電壓的4〇〇mV。 在每一切換點處,信號(S1+S2)對殘餘雜訊的s/n比係高於仞 dB’猎此允許施行具有高影像品質之固態攝像裝置,而獲得丨⑻ 之,態範圍。又,在以高亮度光照射期間,可藉由溢流閘極l〇 而將溢出光二極體PD之多餘光電荷有效率地 器,,俾使漏人鄰近晝素中之多餘光電荷受到抑制,而產』= 抗輝政(blooming)性與抗糢糊(smearing)性。 在此範例1中,可在高亮度侧上達成動態範圍之擴大而仍維 持南S/N比。 範例j 根據本發明之固態攝像裝置中,一固態攝像裝置元件係藉由 以二,陣列(晝素之數目:640(列)x240(欄))配置畫素塊所製造。曰在 此,每一晝素塊係藉由以7//m(長度)x3.5//m(寬度)之大小、在基 本畫素塊上、排列2x2之光二極體與儲存電容器所構成。有效之 晝素數目為640(列)χ480(欄)。在每一晝素塊中,藉由施加一溝渠 式儲存電容器結構,將浮動區域電容CFD設為3.4 Ff,及將儲存^ 36 200810540 容Ccs設為100 fF。信號S1與(S1+S2)之飽和電壓分別為500 mV 與1000 mV。殘餘雜訊電壓,在雜訊移除後殘留在S1與(幻+§2) 中者,係為相同之0.09 mV值。將自S1至(S1+S2)之切換電壓設 為低於彳§號S1之飽和電壓的400 mV。 在每一切換點之信號(S1+S2)對殘餘雜訊的S/N比係高於4〇 dB,因而允許固態攝像裝置得以實現高影像品質。獲得li〇 dB之 動態範圍。而且,在以高亮度光照射_,可齡溢流閘極l〇 而將溢出光二極體PD之多餘光電荷有效率地傳輸至儲存電容 盗’俾使漏入鄰近晝素中之多餘光電射到抑制,而產生增強之 抗輝散(blooming)性與抗糢糊(smearing)性。 曰 拉古〖例2巾’可在1^度側上達成祕範圍之擴大而仍維 狩冋JVJN比0 吾人應了解:本發明並未限於上述實施例。例如,本 實施例中之固態攝像裝置的應用。亦可將本發明庫 像裝置中之晝素係以線性排列之直線感; 二固祕像裝置中個別地構成晝素所獲得 之先措此可達成空前寬廣之動態範圍與高謝比。 Λ 1古ηϋ儲存及其他之形狀並未特別加以限制。為了辦 ίΐί 隨機,記憶體)之記憶體儲存電容器或^ 已被杳展之各種方法。並未限制根播太於BH ’只要用以财溢出光 固態攝像於:'tilt而相連。根據本發明之 者’當然可在未脫離本發明之精神與範^下===,°再 種變化與修改。 L、耗可下’對本發明中進行各 根據本發明之固態攝像裝置可應 Μ 像感測器,而用於數位相機、照相手機:關圍之影 上之相機―deameras A ^視-械、附於儀器 根據本發私_攝縣置的操作方法可制㈣要寬廣動 37 200810540 悲範圍之影像感測器者。 【圖式簡單說明】 圖1係尉應於專利文獻1之等效電路圖。 圖2係對應於專利文獻2之等效電路圖。 圖3係對應於專利文獻3之等效電路圖。 圖4係對應於專利文獻4之等效電路圖。 圖5係對應於非專利文獻3之等效電路圖。 沾隹係根據本發明之第一實施例,在固態攝像裝置中之晝素 的4政電路圖。 一 的恤f 了係根據本發明之第一實施例,在固態攝像裝置中之晝素 的概略平面圖。 素中係根據本發明之第一實施例,顯示在固態攝像裝置之畫 概略叫面图極體?〇1、溢流閘極L04、及儲存電容器CS5區域的 素中係根據本發明之第一實施例,顯示在固態攝像裝置之晝 !#S7 極體PD1、傳輸電晶體T2、浮動區域FD3、儲存電晶 且圖,儲存電容器CS5區域的概略剖面圖。 圖。θ係根據本發明之第一實施例之固態攝像裝置的驅動時序 S 據本發明之第一實施例之固態攝像裝置的方塊圖。 等效電路圖根據本發明之第二實施例之固態攝縣置中之畫素的 概略根據本發明之第二實施例之固態攝像裝置中之畫素的 圖。圖I3係根據本發明之第二實施例之固祕像裝置麟動時序 等效根明之第三實施例之固態攝像裝置中之畫素的 圖圖係對應於f—實施例者。 係根據本發明之第三實施例之固態攝像裝置中之畫素的 38 200810540 概略平面圖’此平面圖係對應於第一實施例者。 =16係根據本發明之第三實施例之固態 4效電路W,此等效電路圖係對應於第二實_^財之旦素的 圖17係㈣康本發明之第三實施例之固態攝像 概略平面圖,此平面圖係對應於第二實施例者。 旦素勺 剖面圖。 、 象衣 置中之畫素的 剖面^丨。9係根據本發明之細實施例之關攝像裝置中之晝素的 序圖 剖面Ξ如係根據本發明之第四實施例之關'攝像裝置中之畫素的 剖面^ ί1餘據本發曰月之第四實施例之固態攝像裝置中之晝素的 的等=2=據本發明之第五實施例之關攝料置巾之兩晝素 的概據本發明之f五實施例之_攝像裝置中之兩晝素 圖24係根據本發明之第五實施例之固態攝像裝置中之驅動時 去J根據*發明之第六實施例之固態攝像裝置中之四個書 言的專效電路圖。 一 素的本發明之第六實細之固賴像裝置中之四個晝 序圖圖27係根據本發明之第六實施例之固態攝像裝置中之驅動時 圖28係根據本發明之第七實施例之固態攝像裝置中之晝素的 剖面圖。 一’、 剖面^ Μ係根據本發明之第七實施例之固態攝像裝置中之晝素的 39 200810540 圖3〇係根據本發明之第七實施例之固態攝像裝置中之畫素的 剖面圖。 圖31係根據本發明之第七實施例之固態攝像裝置中之晝素的 剖面圖。 圖32係根據本發明之第七實施例之固態攝像裝置中之畫素的 剖面圖。 ' 圖33係根據本發明之第七實施例之固態攝像裝置中之畫素的 剖面圖。 圖34係根據本發明之第七實施例之固態攝像裝置中之畫素的 剖面圖。 ' 圖35係根據本發明之第七例之固態攝像裝置中之畫素的 剖面圖。 ' ,36係根據本發明之第七實施例之固態攝像裝置中之晝素的 剖面圖。 ,37係根據本發明之第七例之固態攝像裝置中之晝素的 剖面圖。 剖面Ξ3。8係根據本發明之第七實施例之固態攝像裝置中之晝素的 剖面Ξ3。9係根據本發明之第七實施例之固態攝像裝置中之畫素的 剖面Ξ4。0係根據本發明之第七實施例之固態攝像裝置中之晝素的 剖面^ 4。丨係根據本發明之第七實施例之固態攝像裝置中之晝素的 【5要元件符號說明】 [〜光二極體 [〜光二极體 [—‘才兩Ta2 〇 5' and its capacitance is greater than that of Figure 29. The upper element isolation insulating film 62 is provided on the n-type semiconductor substrate 2 on the electrode 63; and the upper electrode t' is formed on the lower electrode 63 to be wired. 45 phase connection. J% stock and % lower. Ground GND is applied to the upper electrode 65. The power supply voltage VDD or the n + -type semiconductor region 32 connected to the CS ^ is formed by the source of the storage transistor / the internal phase insulating film not formed in the lower electrode 67, and the insulating film 68 is formed so as to be inserted backward. At the cathode 69, the power supply is supplied with the power VDD or the ground D ° ^ internal portion. In the formation, the upper electrode 69 is embedded in the lower electrode 67. Its shape has a larger junction area;; = = electric help: the cross-section of the device ίί:; two combined storage capacitance Figure 35 shows that the storage capacitor of the ditch has two sides, the efficiency of the capacitor. The system is configured to include: a trench TC formed by a p-type well 21 on the storage capacitor Cs to reach an n-type semiconducting layer; or a semiconductor substrate 20 type semiconductor region 7〇 formed in the trench The n+ of the lower electrode is formed so as to cover the film I ΐ capacitor insulating film 71 and be embedded in the trench Tc. Here, as a reservoir, the system is divided into n+mm 32' 72;, /;: «^ , 36 shows a section of the trench storage capacitor with junctions. . The configuration of cs is such that the trench Tc is formed in the n-type rotating body base 33 in the 200810540 type well 21; in the inner wall of the trench tc, the first and the f-domains are formed as a storage transistor; the lower electrode (four) semiconductor is formed by positive a And - an insulating capacitor, %, and an inner wall of the pole n + -type semiconductor region 32; and an upper electrode 75 formed to cover the trench TC.糸 糸 隔 电容器 电容器 电容器 图 图 图 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / The P-well 21 on the storage capacitor cs • arrives at the n-type semi-conducting fin, and the cutter passes through the n-type semiconductor substrate 20-type semiconductor region 76 to be deeper than the trench Tfj2〇; and the inner wall of the n+ drain TC as the lower electrode A region of the depth of the capacitor insulating film is formed in the trench S 78 formed to cover the trench TC covering the TC. Here, as the storage crystal cell germanium insulating film 77 is embedded 32, and the upper electrode 78 is connected by the wiring 45 = the surface and the poles of the n + -type semiconductor region y, FIG. 38 shows a ditch storage electric 衮 ☆ ☆ Hey. It is used to contain a ditch, C, and a surface. The p-type well 22 on the storage capacitor CS reaches „type 4, and the seven-knife f is located in the 〇-type semiconductor substrate 2 〇-type semiconductor region 79, and is formed in the trench Tr/soil 0, as the lower electrode ρ+ The valley is the insulating film 80 and is recessed into the trench Tc. The erbium electrode 81 is formed as an n+ type semiconductor region 32' having a gate 7 and a source connected as a storage transistor. The σ electrode is connected by a wiring 45. Figure 39 shows a cross-sectional view of a CMOS sensor using a junction. For example, a semiconductor of the input capacitor is mounted, and an n+ type semiconductor layer is formed on the p-type smectite layer 91. And formed. ^卩n type Shi Xi semi-conducting, body region and P-type (second conductivity type) semi-conducting phase phase electrical type) half, the internal structure of the semiconductor substrate of the state imaging device is embedded in the intrusive storage Capacitor. Further, the p+ type isolation surface capacitor body (P_sub) 90 I p type is formed by the p type semiconductor layer 91. The commercial conductor layer is corrected by 34 200810540 L i. In the example of the embodiment, the p-type conductor layer domain F1T (four) one-pole PD, the overflow idle pole L〇, the transmission transistor T, a floating region κB domain S. For example, an n+ type semiconductor region 92 as a storage capacitor SC is widely formed on the plurality of formation regions, such as a Ρ-type (four) vertical extension region 92. In the η+ type semiconductor region of the electric valley, the 40 series shows a cross-sectional view of a CMOS sensor using an insulating film capacitor and a storage capacitor. This is the 感 ^ ^ ^ In the 'first Ρ type worm crystal iilal s. and form the body substrate, the rotating layer is separated by an insulating film on on on on on on on 一 一 一 一 一 P P P P P P P P P P , , , , , , , , , , , , , , , The H-system is G = ς, and the container is formed, wherein the semiconductor base === The capacitor is operated on the first junction. The other structure is the same as the CMOS sensor shown in Fig. 39. Between S. The 41 series shows a cross-sectional view of a CMOS sensor using an insulating film capacitor fish-type storage capacitor. The aging is formed in the form of a photodiode-type semi-conducting degree == (1st floor system ^ 921 _ _ _ _ Two or two electricity during the charge storage period 'this will allow the overflow light to be fascinated by various storage capacitor systems can be applied to the above 1st to 7th implementation ^= 壬35 200810540 Example 1 is manufactured by manufacturing a conductor of a wire-like conductor. The device element has a two-dimensional array of elements: the number of t-items, column) χ48_ ), 7·5_square 2 Ϊ region f Cfd=4 σ, storage capacitor fF. Each storage capacitor is composed of Γ石夕, =^广/, that is, polycrystalline oxide oxide-dream capacitor and polycrystalline In the case of the capacitors of the eve, the signals S1 and (8) are the same as the voltages S1 sls^fj000 mV 0 5 "(S1+S2), which are the same value of 0.09 mV. The switching voltage from si to is set to 4 〇〇 mV lower than the saturation voltage of the signal S1. At each switching point, the s/n ratio of the signal (S1+S2) to the residual noise is higher than 仞 dB'. This allows a solid-state imaging device with high image quality to be obtained, and the range of 丨(8) is obtained. Moreover, during the irradiation with high-intensity light, the excess photo-charge of the overflow photodiode PD can be efficiently actuated by the overflow gate, so that the excess photocharge in the adjacent pixel is suppressed. , and production 』 = anti-blooming and smearing. In this example 1, the expansion of the dynamic range can be achieved on the high luminance side while still maintaining the south S/N ratio. Example j According to the solid-state image pickup device of the present invention, a solid-state image pickup device element is manufactured by arranging pixel blocks in two arrays (the number of pixels: 640 (column) x 240 (column)). Here, each elementary block is formed by arranging 2x2 light diodes and storage capacitors on a basic pixel block in a size of 7//m (length) x 3.5//m (width). . The number of valid pixels is 640 (column) χ 480 (column). In each element block, by applying a trench storage capacitor structure, the floating area capacitor CFD is set to 3.4 Ff, and the storage ^ 36 200810540 capacity Ccs is set to 100 fF. The saturation voltages of signals S1 and (S1+S2) are 500 mV and 1000 mV, respectively. The residual noise voltage, which remains in S1 and (Magic + § 2) after noise removal, is the same 0.09 mV value. The switching voltage from S1 to (S1 + S2) is set to be 400 mV lower than the saturation voltage of 彳§ S1. The S/N ratio of the residual noise to the signal at each switching point (S1+S2) is higher than 4〇 dB, thus allowing the solid-state imaging device to achieve high image quality. Get the dynamic range of li〇 dB. Moreover, the high-brightness light illuminates the excess photo-charge of the overflow photodiode PD to the storage capacitor thief, so that the excess photo-electricity leaking into the adjacent element To suppression, there is enhanced anti-blooming and smearing.曰 拉古〗 〖Example 2 towel can achieve the expansion of the secret range on the 1^ degree side while still maintaining the JVJN ratio 0. It should be understood that the present invention is not limited to the above embodiment. For example, the application of the solid-state image pickup device in this embodiment. It is also possible to linearly align the halogens in the image forming apparatus of the present invention; the first steps obtained by separately forming the halogen in the two-secret image device can achieve an unprecedented wide dynamic range and high contrast ratio. Λ 1 Ancient ϋ ϋ storage and other shapes are not particularly limited. In order to do ίΐί random, memory) memory storage capacitors or ^ have been developed in various ways. It is not restricted to the root broadcast too much BH ’ as long as it is used to cover the light. Solid-state camera is connected to: 'tilt. It is a matter of course that the invention may be modified and modified without departing from the spirit and scope of the invention. L, the consumption can be carried out in the present invention, the solid-state image pickup device according to the present invention can be used as an image sensor, and used for a digital camera, a camera phone: a camera on the camera - deameras A ^ vision - Attached to the instrument according to the operation method of the private _ photo county can be made (four) to be wide and wide 37 200810540 sad range of image sensors. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is an equivalent circuit diagram of Patent Document 1. FIG. 2 is an equivalent circuit diagram corresponding to Patent Document 2. FIG. 3 is an equivalent circuit diagram corresponding to Patent Document 3. FIG. 4 is an equivalent circuit diagram corresponding to Patent Document 4. FIG. 5 is an equivalent circuit diagram corresponding to Non-Patent Document 3. The dip is a four-dimensional circuit diagram of a pixel in a solid-state image pickup device according to a first embodiment of the present invention. A shirt f is a schematic plan view of a pixel in a solid-state image pickup device according to a first embodiment of the present invention. According to a first embodiment of the present invention, the present invention is shown in a schematic diagram of a solid-state imaging device. According to the first embodiment of the present invention, the 〇1, the overflow gate L04, and the storage capacitor CS5 are displayed in the solid-state imaging device! #S7 Pole body PD1, transmission transistor T2, floating area FD3, Store the electro-crystal and diagram, a schematic cross-sectional view of the area of the storage capacitor CS5. Figure. θ is a block diagram of a solid-state image pickup device according to a first embodiment of the present invention, in accordance with a driving timing of a solid-state image pickup device according to a first embodiment of the present invention. Equivalent Circuit Diagram A schematic diagram of a pixel in a solid-state image pickup device according to a second embodiment of the present invention, in accordance with a second embodiment of the present invention. Fig. I3 is a diagram of a pixel in a solid-state image pickup device according to a third embodiment of the solid-state image device according to the second embodiment of the present invention, corresponding to the f-embodiment. A schematic plan view of a pixel in a solid-state image pickup device according to a third embodiment of the present invention. This plan view corresponds to the first embodiment. = 16 is a solid-state four-effect circuit W according to a third embodiment of the present invention, and the equivalent circuit diagram corresponds to the second embodiment of the second embodiment of the present invention. A plan view which corresponds to the second embodiment. Cross section of the spoon. , like the section of the picture in the clothing. 9 is a cross-sectional view of a pixel in a camera device according to a thin embodiment of the present invention, such as a cross section of a pixel in a camera device according to a fourth embodiment of the present invention. The equivalent of the halogen in the solid-state image pickup device of the fourth embodiment of the month = 2 = the basis of the two elements of the photographing substrate according to the fifth embodiment of the present invention The two pixel diagrams in the image pickup apparatus are the circuit diagrams of the four books in the solid-state image pickup apparatus according to the sixth embodiment of the invention according to the fifth embodiment of the present invention. . FIG. 27 is a seventh embodiment of the present invention, and is a seventh embodiment of the present invention. FIG. 28 is a seventh embodiment of the present invention. A cross-sectional view of a halogen in a solid-state image pickup device of an embodiment. A section of a solid-state image pickup device according to a seventh embodiment of the present invention is a cross-sectional view of a pixel in a solid-state image pickup device according to a seventh embodiment of the present invention. Figure 31 is a cross-sectional view showing a halogen in a solid-state image pickup device according to a seventh embodiment of the present invention. Figure 32 is a cross-sectional view showing a pixel in a solid-state image pickup device according to a seventh embodiment of the present invention. Figure 33 is a cross-sectional view of a pixel in a solid-state image pickup device according to a seventh embodiment of the present invention. Figure 34 is a cross-sectional view showing a pixel in a solid-state image pickup device according to a seventh embodiment of the present invention. Figure 35 is a cross-sectional view of a pixel in a solid-state image pickup device according to a seventh example of the present invention. '36' is a cross-sectional view of a halogen in a solid-state image pickup device according to a seventh embodiment of the present invention. 37 is a sectional view of a halogen in a solid-state image pickup device according to a seventh example of the present invention. Section Ξ3. 8 is a cross-section of a halogen in a solid-state image pickup device according to a seventh embodiment of the present invention. The cross-section of the pixel in the solid-state image pickup device according to the seventh embodiment of the present invention is Ξ4. A cross section of a halogen element in the solid-state image pickup device of the seventh embodiment of the present invention.丨 的 的 5 5 5 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜 〜

"光二極 40 200810540 2〜傳輸電晶體 2’〜傳輸電晶體 2”〜傳輸電晶體 2’”〜傳輸電晶體 3〜浮動區域 4〜溢流閘極 4’〜溢流閘極 4”〜溢流閘極 4’”〜溢流閘極 5〜儲存電容器 5’〜儲存電容器 5”〜儲存電容器 5”’〜儲存電容器 6〜重設電晶體 7〜儲存電容器 7’〜儲存電容器 7”〜儲存電容器 7’’’〜儲存電容器 8〜放大電晶體 9〜選擇電晶體 10〜驅動線0LO 11〜驅動線0Τ 12〜驅動線0S 13〜驅動線0R 14〜驅動線0χ 15〜輸出線 20〜半導體基板(η型基板) 21〜ρ型井 22、23、24、25〜元件隔離絕緣膜 41 200810540 26、27、28、29〜p+型隔離區域 30〜η型半導體區域 31〜ρ+型半導體區域 32〜η+型半導體區域 33〜η+型半導體區域 34〜π+型半導體區域 35〜閘極絕緣膜 36〜閘極電極 37〜閘極絕緣膜 3 8〜閘極電極 39〜閘極絕緣膜 40〜閘極電極 41〜ρ+型半導體區域 42〜電容器絕緣膜 42a〜電容器絕緣膜 43〜上部電極 44〜絕緣膜 45、46〜配線 50〜p+半導體區域 51〜η型半導體區域 52〜η型半導體區域 53〜π型半導體區域 60〜η+型半導體區域 61〜n+型半導體區域 62〜元件隔離絕緣膜 63〜下部電極 64〜電容器絕緣膜 65〜上部電極 67〜下部電極 42 200810540 68〜電容器絕緣膜 69〜上部電極 70〜n+半導體區域 71〜電容器絕緣膜 72〜上部電極 73〜n+型半導體區域 74〜電容器絕緣膜 75〜上部電極 76〜n+型半導體區域 77〜電容器絕緣膜 78〜上部電極 79〜p+型半導體區域 80〜電容器絕緣膜 81〜上部電極 90〜p型矽半導體 90a〜絕緣膜 91〜P型磊晶層 91a〜第一 p型磊晶層 91b〜第二p型磊晶層 92〜n+型半導體區域 93〜p+型隔離區域 94〜p型矽半導體層 95〜n+型半導體區域 %〜低濃度半導體層 100〜103〜晝素陣列 104〜列位移暫存器 105〜欄位移暫存器 106〜信號/雜訊保留區 107〜輸出電路"Light Dipole 40 200810540 2~Transfer transistor 2'~Transfer transistor 2"~Transfer transistor 2'"~Transfer transistor 3~Floating area 4~Overflow gate 4'~overflow gate 4"~ Overflow gate 4'"~ overflow gate 5~ storage capacitor 5'~ storage capacitor 5"~ storage capacitor 5"'~ storage capacitor 6~reset transistor 7~storage capacitor 7'~storage capacitor 7"~ Storage capacitor 7'''~ storage capacitor 8~ amplifying transistor 9~selecting transistor 10~drive line 0LO11~drive line0Τ12~drive line0S 13~drive line 0R 14~drive line 0χ 15~output line 20~ Semiconductor substrate (n-type substrate) 21 to p-type well 22, 23, 24, 25 to element isolation insulating film 41 200810540 26, 27, 28, 29 to p+ type isolation region 30 to n-type semiconductor region 31 to ρ+ type semiconductor Region 32 to n + type semiconductor region 33 to n + type semiconductor region 34 to π + type semiconductor region 35 to gate insulating film 36 to gate electrode 37 to gate insulating film 38 to gate electrode 39 to gate insulating Film 40 to gate electrode 41 to p+ type semiconductor region 42 to electricity Insulation film 42a to capacitor insulating film 43 to upper electrode 44 to insulating film 45, 46 to wiring 50 to p+ semiconductor region 51 to n-type semiconductor region 52 to n-type semiconductor region 53 to π-type semiconductor region 60 to n+ semiconductor Region 61 to n+ type semiconductor region 62 to element isolation insulating film 63 to lower electrode 64 to capacitor insulating film 65 to upper electrode 67 to lower electrode 42 200810540 68 to capacitor insulating film 69 to upper electrode 70 to n+ semiconductor region 71 to capacitor insulation Film 72 to upper electrode 73 to n+ type semiconductor region 74 to capacitor insulating film 75 to upper electrode 76 to n+ type semiconductor region 77 to capacitor insulating film 78 to upper electrode 79 to p+ type semiconductor region 80 to capacitor insulating film 81 to upper electrode 90 to p-type germanium semiconductor 90a to insulating film 91 to P-type epitaxial layer 91a to first p-type epitaxial layer 91b to second p-type epitaxial layer 92 to n+-type semiconductor region 93 to p+ type isolation region 94 to p Type germanium semiconductor layer 95~n+ type semiconductor region%~low concentration semiconductor layer 100~103~morphe array 104~column shift register 105~column shift register 106~signal/miscellaneous Reserved output circuit 107~

Claims (1)

200810540 十、申請專利範圍: 1· 一種光感测器,包含: 一光二極體,接收光且產生光電荷; 一溢流閘極,連接於該光二極齅 , 該光二極體之光電荷;及 迗儲存操作期間溢出 一儲存電容器元件,用以儲存在 閘極所傳送之光電荷。 儲存刼作期間經由該溢流 2. 如申ί專利範圍第1項之光感測器,更包含: 傳輸電晶體,連接於該光二^ 中該傳輸電晶體將行;一浮動區域,其 域。 了自料—極體傳輸至該浮動區 3. 如,請專利範圍第1項之光感測器,其中. 該溢流閘極係由一接面電晶體所構成.·曰 兮光Ui:電晶體之閘極的半導體區域係連接於妒成 體與該溢_極形成於其巾的井區。連接於該光二極 4·如申請專利範圍第1項之光感測器,其中. 處^溢=極係於形錢溢流閘極之該基板的預定深度 半導=流道相同導電 類型的 th_g_阻障。^層F+低了在^ ”極中擊穿(punch ^申糊軸丨似侧,其巾_存細元件包 一半導體區域’作為一下部電極, 感測器之,,導體基板的表面層部份中形=其Τ形成該光 一電容器絕緣膜,形成於該半導體‘ 一上部電極,形成於該電容器絕緣膜上。, 44 200810540 6.如申凊專利範圍第1 、 件包含·· 、之光感測器,其中該儲存電容哭一 一下部電極,形成於 奋态70 一電容器絕緣膜,形;::形成該光感測器之該基板 一上部電極, 成於該下部電極上,·及 _ 7_如申請專補圍^於_容11絕緣膜上。 含: 項之光感測器,其中該儲存電容器元件包 一半導體區域,作為一 該溝渠係形成於其中 ^電極’係形成於-溝渠之内壁 一電容器絕緣膜,之該半導體基板中;中 -上部電極,开;出形成於該溝渠之該内壁上’·及 & -種固態攝像裝置成包^緣膜上域人該溝渠。 素’每一晝素具有如申請專^範圍第陣列排列之複數個書 9=申請專利範圍第δ項之&=像^ 述之該光_器: 〇S電晶體或接面電晶體所構成。衣〃中该温流間極係由 10.:種固態攝像裝置,包含^個書辛塊, 域;個晝輪之每—者^_嫩單-浮動區 該複數個晝素中之每一者包含: 一光二極體,接收光且產生光 一溢流閘極,連接於該光二榀骑 該光二極體之光電荷; 〜A肢一專㈣在儲存操作期間溢出 溢流 一儲存電容器元件,用以儲存在 閘極所傳輸之光電荷;及 /坫存知作期間經由該 一傳輸電晶體,連接在該光二極體 ^ 、 Π. —種固態攝像裝置,包含複數個晝素,=浮動區域之間。 如專利申請範圍第2項之該_測二、复中之每一者具有 入式通道電晶體,其具有與該傳輸電晶f j輸電晶體為-埋 半導體層,該傳輸電晶體之通道係由相同導電類型的 "、甲形成該傳輸電晶體之基 45 200810540 板的表面或表面附近形成至一預定深戶。 12·如申請專利範圍第1〇項之固態攝像 為-埋入式通道電晶體,其具有與該|=日匕3輪電晶體 類型的半導體層,該傳輸電晶體之通道係道相同導電 體之基板的表面或表面附近形成至一預定、严声、。7成该傳輪電晶 I3· -種固態攝像裝置,包含複數個畫素,匕一 如專利申請細第2項之絲感測H 具有 容 一重設電晶體’係連接於該雜⑽像衣置更包含: 器元件與該浮動區域中之信號電荷;°°或,用以釋出該儲存電」 -電晶體,設於該浮動區】與該 一放大電晶體,用以讀取在該浮動間; 一選擇電晶體,連為電壓; r如申/專利範圍第1〇項之固態攝像裝置亥晝素。 一重設電晶體,連接於該、、輩f d 元件與該浮動區域中之信號^荷;⑽$ ,以釋出該儲存電容器 -電晶體’設於該浮動區域與該儲存 s兮一,大電晶體’用以讀取在該浮動區域中1^ 乂間’ 中之信細來作為電壓 區域 、^日日體,係連接於該放大電晶體, 。·-種固恶攝像裝置,包含複數個晝辛,姑查各:^亥晝素。 如專利圍第2項之該“^像具有 -重設電日日日體,連接科祕雷容料置更包含: 電容ϊίΐ與該浮動區域中ΐ信號電荷用以釋出該儲存 一晶Ϊ於:與;該器元件之間; 該儲存者中壓或該浮動區域與 46 200810540 -重設電晶體,連接於該儲存電容器元件 i 電谷裔元件與該浮動區域中之信號電荷; 睪出该儲存 二^晶體’設於該浮動區域無儲存電容器元件 一放大電晶體,用以讀取在該浮動區 3, 與該儲存電容器元件兩者中之信號電荷來 ^广洋動區域 一選擇電日日日體,連接於該放A電晶體,用以^擇 態攝像裝置,包含複數個晝素 如專利申請範圍第2項之該光感測器,該固者具有 雜讯2裝用以取得下述兩電壓信號之^的^·更包含·· 一電壓信號,由經傳輸至該浮動區杰,, 该儲存電容器兩者之光電 動f域、或傳輸該浮動區域與 設位:或該浮動區域與該儲存電容器元件兩者之重 如申請專利範圍f 1〇項之固態攝 雜訊消除裝置,肋轉下獅 電壓彳§號,由傳輪至該浮動區域、鈐. 該儲存電容H兩者之光電荷所獲得;&猶輸至知動區域與 設位或該浮動區域與該儲存電容器件兩者之重 19.=r置利項之固態物置,更包含: 該重設位準的電^號存在叙動區域與該儲存電容器元件中之 20,^it利ΐ圍第項之固態攝像裝置,更包含: 該重設位j的電壓=存在縣動區域與該齡電容器元件中之 體及n電tin輪出^號之方法’該光感測器包含一光二極 將+’該方法包含以下步驟: 儲存於該體在該光二極體飽和之前所產生之第一光電荷 47 200810540 將由該光二極體在該飽和之後所產生之第二光電荷儲存於該 儲存電容器元件;及 基於該第一與第二光電荷而輸出該信號。 22.如申請專利範圍第1項之光感測器,其中該溢流閘極係由該光 電荷與該儲存電容器之間所連接的MOS電晶體所構成,該MOS 電晶體之閘極電極接收決定儲存操作之一信號。 十一、圖式: 48200810540 X. Patent application scope: 1. A light sensor comprising: a light diode that receives light and generates a photocharge; an overflow gate connected to the photodiode, the photocharge of the photodiode; And storing a capacitor element during the storage operation to store the photocharge transferred by the gate. The light sensor according to claim 1 of the patent application scope, further includes: a transmission transistor connected to the light diode, the transmission transistor will be in a row; a floating region, a domain thereof . The self-material-polar body is transferred to the floating zone 3. For example, please call the optical sensor of the first item of the patent range, wherein the overflow gate is composed of a junction transistor. The semiconductor region of the gate of the transistor is connected to the germanium body and the overflow region is formed in the well region of the towel. Connected to the photodiode 4, such as the photosensor of claim 1, wherein the overflow is the predetermined depth of the substrate of the shape of the manifold overflow gate semi-conductor = the same conductivity type of the flow channel Th_g_ barrier. ^Layer F+ is low in the ^" pole breakdown (punch ^ application paste axis like side, its towel _ storage fine component package a semiconductor area ' as the lower electrode, sensor, the surface layer of the conductor substrate The medium shape=the ytterbium is formed into the light-capacitor insulating film, and is formed on the upper electrode of the semiconductor, and is formed on the capacitor insulating film. 44 200810540 6. For example, the patent scope of the application is included in the light. a sensor, wherein the storage capacitor cries a lower electrode, formed in a capacitor 70, a capacitor insulating film, and forms: an upper electrode of the substrate forming the photosensor, formed on the lower electrode, And _ 7_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ a capacitor insulating film on the inner wall of the trench, in the semiconductor substrate; a middle-upper electrode, which is formed on the inner wall of the trench, and a solid-state imaging device is formed on the substrate The ditch. There are a plurality of books 9 arranged in the array of the application range, the number of the δth item of the patent application range, and the light source: the 〇S transistor or the junction transistor. The inter-temperature system is composed of: a solid-state camera device, including a book block, a domain; each of the wheels - a single-floating area, each of the plurality of elements: a light diode that receives light and generates a light-overflow gate connected to the photo-charge of the photodiode; the A-A limb (4) overflows an overflow capacitor during storage operation for storage in the capacitor element The photo-charge transmitted by the gate; and/or stored in the photodiode via the transmission transistor, connected to the photodiode, a solid-state imaging device, comprising a plurality of halogens, = between floating regions. Each of the second and the second of the patent application scope has an inlet channel transistor having a transmission semiconductor crystal layer and a buried semiconductor layer, and the channel of the transmission transistor is the same Conductive type ", A forms the transmission transistor 45 200810540 The surface or surface of the board is formed to a predetermined deep household. 12· The solid-state imaging of the first aspect of the patent application is a buried channel transistor having a type of transistor with the |= 3D transistor a semiconductor layer, the channel of the transmission transistor is formed in the vicinity of the surface or surface of the substrate of the same conductor to a predetermined, strict sound, 7 into the transmission electric crystal I3 · a solid-state imaging device, including a plurality of paintings As the patent application, the wire sensing H of the second application has a capacitance-resetting transistor, which is connected to the impurity (10), and further comprises: a device element and a signal charge in the floating region; °° or, For releasing the storage electricity - the transistor is disposed in the floating region] and the amplifying transistor for reading in the floating chamber; a selecting transistor is connected to the voltage; 1 item of solid-state camera device. a reset transistor connected to the signal of the floating element and the floating region; (10)$ to release the storage capacitor-transistor is disposed in the floating region and the storage device The crystal 'used to read the letter in the '1 乂 ' in the floating region as a voltage region, and the Japanese body is connected to the amplifying transistor. ·- A kind of solid camera device, including a number of 昼 , 姑 姑 姑 姑 姑 姑 姑 姑 姑 姑 姑 姑 姑 姑 姑For example, in the second section of the patent, the "^ image has a -reset electric day and day body, and the connection secretary is further included: a capacitor ϊίΐ and a signal charge in the floating region for releasing the storage wafer. Between: and; the device element; the reservoir medium voltage or the floating region and 46 200810540 - reset transistor, connected to the storage capacitor element i electric grain element and the signal charge in the floating region; The storage diode is disposed in the floating region without a storage capacitor component and an amplifying transistor for reading a signal charge in the floating region 3 and the storage capacitor component. a day-to-day body connected to the A-type transistor for use in an optional camera device, comprising a plurality of elements, such as the photo sensor of the second application of the patent application scope, the solid device having the noise 2 installed Obtaining a voltage signal of the following two voltage signals, and transmitting a voltage signal to the floating area, the optical electric field of the storage capacitor, or transmitting the floating area and the set: or The floating region and the storage capacitor element The weight of the two is as follows: the solid-state noise-canceling device of the patent application scope f 1〇, the rib turns to the lion voltage 彳§, which is obtained by the transfer of the light to the floating region, 钤. ; & is still connected to the active area and the set or the floating area and the storage capacitor device, the weight of the solid object placed 19., r, the inclusion of the solid state object, including: The solid-state imaging device of the movable region and the storage capacitor element, wherein: the voltage of the reset bit j = the presence of the county moving region and the body of the capacitor element and the n-electricity The method of rotating the ^ sign 'The photo sensor comprises a photodiode +' The method comprises the following steps: storing the first photocharge 47 generated by the body before the photodiode is saturated. 200810540 will be the photodiode a second photocharge generated after the saturation is stored in the storage capacitor element; and the signal is output based on the first and second photo charges. 22. The photosensor of claim 1, wherein The overflow gate is composed of the photocharge and the reservoir The MOS transistor connected between the capacitors is formed, and the gate electrode of the MOS transistor receives a signal for determining a storage operation. 11. Fig. 48
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