200808136 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種多層印刷電路板，特別是一種僅在積體電 路連接點的直線傳輸路徑上形成電磁能隙結構之多層印刷電路 板。 【先前技術】 在南頻數位電路設計中’朝向高速、體積小、低電壓等趨勢 馨 發展。尤其是個人電腦系統内之中央處理器（Central Processing Unit ’ CPU)速度愈來愈快的情況下，地彈雜訊(Gr〇und BounceBACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed circuit board, and more particularly to a multilayer printed circuit board in which an electromagnetic energy gap structure is formed only on a linear transmission path of an integrated circuit connection point. [Prior Art] In the design of the south frequency digital circuit, the trend toward high speed, small size, and low voltage has progressed. Especially when the central processing unit (CPU) in the personal computer system is getting faster and faster, the ground noise (Gr〇und Bounce)
Noise ; GBN)效應對系統的影響愈加顯著，抑制地彈雜訊效應變 得重要且必須。 地彈雜訊的主因是源自於在高速數位電路中，訊號線的不連 續與電源層/接地層的寄生電感效應，當積體電路（Integrated Circuit; 1C)快速切換時，導致暫態電壓產生於電源層間，我 _ 們稱此雜訊即為地彈雜訊。電路路徑設計或積體電路封裝所造成 的雜散電感，當系統的速度愈來愈快，亦或是同時轉換邏輯狀態 的積體電路接腳個數愈多時就愈容易造成地彈現象，係為數位系 、’先的成個主要雜訊來源之一，常見地彈雜訊所造成的現象是導致 系統的邏輯運作產生誤動作。我們將電源層視為一平行導波結 構，此地彈雜訊將造成電源層共振，可發現在共振頻率點附近， 地彈雜訊對訊號完整性（Signal Integrity)與電磁干擾 (Electromagnetic Interference ; EMI)的影響顯著。 200808136 白知技* 6有提丨應祕乡騎刷電路板饰遍Circuit Board ; PCB)中以抑制地彈雜訊效應，其方法包括於突波源附近 連接顆大的絲合電谷，請參照「第〗圖」，係為習知多層印刷 電路板設置去輕合電容之示意圖，於多層印刷電路板ι〇ι上，去 麵合電容105連接積體電路1〇4麟接於電源層1〇11與接地層 二012之間’或疋加多顆趣合電容於雜輯四取形成電容牆保 蒦及在电源層間切刻—矩形狹缝，以形成隔離的效果等等， 然而这些方法在抑制地彈雜訊效應上仍顯不足。 因應數域路的設計，朝向更高速更高頻的趨勢，已有人提 出使用電磁能隙結構（Electromagnetic Band G叩，·腦）於抑制 高頻段的電源層或接地層的地彈雜訊，目前的方法皆使用完整的 電磁能隙結構於整個電源層或接地層，請參照「第2圖」， 知多層印刷電路板中具有電磁㈣結騎之示意圖，如= 所示，於多層印刷電路板2〇1上，整個電源層則或接地層⑽ 都為電磁能隙結構，其缺點為自阻抗㈤咖帅咖）會明顧地 大於不使㈣魏騎構的電源層或接地層，以及轉移阻抗 (Transfer-ImpecW)也會於數百耻以下大於不使 ^The influence of the noise (GBN) effect on the system becomes more and more significant, and it is important and necessary to suppress the ground noise effect. The main cause of ground-based noise is derived from the discontinuity of the signal line and the parasitic inductance effect of the power layer/ground layer in the high-speed digital circuit. When the integrated circuit (1C) is quickly switched, the transient voltage is caused. Produced between the power layers, I _ we call this noise is ground bomb noise. The stray inductance caused by the circuit path design or the integrated circuit package is more likely to cause ground bounce when the speed of the system is getting faster and faster, or the more the number of integrated circuit pins of the logic state is converted at the same time. It is a digital system, and it is one of the main sources of noise. The phenomenon caused by common ground noise is the malfunction of the logic operation of the system. We regard the power plane as a parallel waveguide structure. This ground noise will cause the power layer to resonate. It can be found near the resonance frequency point, and the ground motion noise to signal integrity (Signal Integrity) and electromagnetic interference (Electromagnetic Interference; EMI The impact is significant. 200808136 白知技* 6 has a 丨 丨 秘 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡 乡"第图图" is a schematic diagram of setting a light-to-light capacitor for a conventional multilayer printed circuit board. On a multi-layer printed circuit board ι〇ι, the face-to-face capacitor 105 is connected to the integrated circuit 1〇4 lining to the power layer 1 〇11 and the ground plane between the two 012 'or add more interesting capacitors to the capacitors to form a capacitor wall to protect and cut between the power layer - rectangular slits to form an isolation effect, etc., however, these methods It is still insufficient in suppressing the effect of the ground bomb noise. In response to the design of the digital domain, towards the trend of higher speed and higher frequency, it has been proposed to use the electromagnetic energy gap structure (Electromagnetic Band G叩, · brain) to suppress the ground noise of the power layer or the ground layer in the high frequency band. The method uses a complete electromagnetic energy gap structure for the entire power supply layer or ground plane. Please refer to "Fig. 2" for a schematic diagram of the electromagnetic (four) junction ride in the multilayer printed circuit board, as shown in =, on the multilayer printed circuit board. On 2〇1, the entire power layer or the ground plane (10) is an electromagnetic energy gap structure, and its disadvantage is that the self-impedance (5) coffee handsome coffee will be significantly larger than the power layer or ground layer that does not make the (four) Wei riding structure, and transfer Impedance (Transfer-ImpecW) will also be less than a few hundred shame or less.
結構的電源層或接地層。 b|A 【發明内容】 為了解決上述關題，本發_露_種多層印刷電路板之* 計，係利时完全叫雜猶魏層或接地層二 低多層印刷電路板的自阻抗與轉移阻抗。 牛 本發明之技術手段係在於電源践接地層上之第—積體電路 200808136 的連接點至第二龍電路的連接闕傳輸雜上使㈣磁能隙結 構，電源層或接地層其餘之區j:或係為不具有電磁能隙結構之; 面，於此，相較於完全使用電磁能隙結構之電源層或接地層則择 加了層面面積。 」曰The power or ground plane of the structure. b|A [Summary of the Invention] In order to solve the above problems, the present invention is a self-impedance and transfer of a multi-layer printed circuit board. impedance. The technical means of the invention is that the connection point of the first integrated circuit 200808136 on the power supply grounding layer to the connection of the second dragon circuit, the transmission of the hybrid (4) magnetic energy gap structure, the power supply layer or the remaining area of the ground layer j: Or the structure does not have an electromagnetic energy gap structure; surface, here, compared to the power layer or ground layer completely using the electromagnetic energy gap structure, the layer area is added.曰
可 二猎由本發明之技術手段，於頻率5〇〇MHz以上，降低轉移阻 抗之改唇越雖大約略同習知技術之完全使用電磁能隙結構，但 =自，抗之改善效能方面，同解麵下，本發明相較於習知技 衡之完全使用電磁能贿構以及完全抑電磁能騎構相比， 得到較穩定的自阻抗值。 、一=上之關於本發_容之說明及以下之實施方式之說明係用 二不範赌釋本利之精神與棘，並且提供本發明之專利 範圍更進一步之解釋。 月 【實施方式】 以下在實施方式巾詳細敘述本發明之詳細特徵以及優點，其 •喊足以使任何熟f侧技藝者了解本發明之技軸容並據以實 ▲也且根據本娜書所揭露之内容、申請專利範圍及圖式，任 热習相關技·可輕祕理解本發_關之目的及伽。 、本翻是细改變電源層或接地層之電磁㈣結構之面積， 進而降低乡層物電路板之自眺鄕移阻抗的大小。 請參照「第3圖」’係為本發明之電磁能隙結構示意圖，如圖 所不，多層印刷電路板3〇1是由多個平行層板愿合而成，其中 ，少包括有層板随與層板3〇12，如習知圖式「第i圖」所示， 夕層印刷電路板3〇1之外層（圖中未標示）同多層印刷電路板朗 7 200808136 ^外層設置有多個電子元件，其中此電子树包括有積體電路盘 去輕合電容，而層板贿與層板·可為平行板對，即當其中、 之一為電源層時，另一個則為接地層。 根據本發明之-具體實施例，係在多層印刷電路板則之外 層至少設置有第-電子元件與第二電子元件（圖中未標示），第一 電子70件與第二電子元件為了與層板3〇11電性連接，因而從外層 貫穿導孔至層板期’透料孔使得第1子元件與第二電子^ 件各自之接腳可與層板則有電性連接，於層板刪上^性 連接點分別為連接點304與連接點3〇5。 本發明之技術手段在於僅使用電魏隙結構於層板3011上 ^連接點304至連接點305的直線傳輪路握上，於層板3〇11中， .接點3G4與連接點3G5之間的直線路徑區域或包含其附近之區 域係利用電磁能隙結構叫冓成整個層板3〇ιι : 板=技術將電源層則完全使用電磁能隙結構，本發明僅於層 之局部區域使用電磁能隙結構，因而增加層板 積。 卿照「第4圖」’縣本發日狀使用電磁鎌結構平面後之 j阻軸，賴村_愤解時，使用 -磁完全電磁能隙結構平面的轉移阻抗曲線403相較於盔 ^ 平面的轉移阻抗曲線有較小的轉移阻抗，於頻 i =明Z時，她於完全電磁能隙結構平面的轉移阻抗曲線 有月_車父小的轉移阻抗。 200808136 请麥照「第5圖」’係為本發明之使用電磁能隙結構平面後之 自阻抗曲線圖’如圖所示，於頻率2.03GHz以下時，使用完全電 磁能，結構平面的自阻抗曲線5〇2導致自阻抗的變化量甚大二 :硯察到本發明之非完全電磁能隙結構平面的自阻抗曲線默有 較小的阻抗變化量’並且於頻率2 〇3GHz以上時，本發明之電磁 能隙結構平面的自阻抗曲線5G3相較於無電磁能隙結構平面的自 阻抗曲線則與完全電磁能隙結構平面的自阻抗曲線逝有較 • 定的自阻抗值。 ^ 雖然本發_前述之實施例減如上，然其並_以限定本 ^ ^林麟本购之精神和範_，所為之更動與潤飾，均 所發明之專利保護範圍。關於本發明所界定之保護範圍請 所附之申請專利範圍。 " 【圖式簡單說明】 21圖係為習知多層印刷電路板設置去輕合電容之示意圖； 第二圖係為習知多層印刷電路板中具有電磁能二源 層之不意圖，· ^ 7 第3圖係為本發明之電磁能隙結構示意圖； 線圖；及 第4圖係為本發明之使用電磁能隙結構平面後之轉移阻抗曲 圖 第5圖係為本發明之制電磁紐結構平面後之自 阻抗曲線 【主要元件符號說明】 1〇1，201，301······多層印刷電路板 200808136 1011,2011..........電源層 1012, 2012..........接地層 104......................積體電路 105…........…·.······去耦合電容 3011，3012.......…層板 304, 305....................連接點 401 ..........................無電磁能隙結構平面的轉移阻抗曲線 402 .......................凡全電磁能隙結構平面的轉移阻抗曲線 403 ......................本杳明之非完全電磁能隙結構平面的轉移 阻抗曲線 501 ......................無電磁能隙結構平面的自阻抗曲線 502 ..................··完全電磁能隙結構平面的自阻曲線 503 ......................本發明之非完全電磁能随構平面的自阻 抗曲線According to the technical means of the present invention, at a frequency of 5 〇〇 MHz or more, the lip change of the transfer impedance is reduced, which is slightly different from the fully used electromagnetic energy gap structure of the prior art, but the improvement effect of the self-resistance is the same. Under the solution, the present invention obtains a relatively stable self-impedance value compared to the conventional use of electromagnetic energy bribes and complete electromagnetic energy riding. The description of the present invention and the description of the following embodiments are based on the spirit and the spine of the patent and provide further explanation of the scope of the patent of the present invention. [Embodiment] Hereinafter, the detailed features and advantages of the present invention will be described in detail in the embodiments of the present invention, which are sufficient to enable any skilled person to understand the technical axis of the present invention and according to the teachings of Bena. The contents of the disclosure, the scope of application for patents and the schema, and the relevant skills of the enthusiasm for the essay can be understood. The turn is to change the area of the electromagnetic (four) structure of the power layer or the ground layer, thereby reducing the self-transfer impedance of the circuit board of the town. Please refer to "3rd figure" as a schematic diagram of the electromagnetic energy gap structure of the present invention. As shown in the figure, the multilayer printed circuit board 3〇1 is composed of a plurality of parallel layers, wherein less layers are included. With the laminate 3〇12, as shown in the figure “i”, the outer layer of the printed circuit board 3〇1 (not shown) and the multilayer printed circuit board 朗 7 200808136 ^ Electronic components, wherein the electronic tree includes an integrated circuit board to lightly combine capacitors, and the layer of briquettes and laminates can be parallel plate pairs, that is, when one of them is a power layer and the other is a ground layer . According to a specific embodiment of the present invention, at least the first electronic component and the second electronic component (not shown) are disposed on the outer layer of the multilayer printed circuit board, and the first electronic component 70 and the second electronic component are The board 3〇11 is electrically connected, so that the through hole from the outer layer to the laminating period allows the respective pins of the first sub-element and the second electronic component to be electrically connected to the lamination, in the lamina The connection points are respectively connected to the connection point 304 and the connection point 3〇5. The technical means of the present invention resides in that only the electric warp structure is used to hold the line 304 to the connecting point 305 on the layer 3011, in the layer 3〇11, the contact point 3G4 and the connection point 3G5 The linear path region or the region in the vicinity thereof is called the entire laminate by the electromagnetic energy gap structure. 3〇ιι: plate=technology, the power supply layer is completely used with the electromagnetic energy gap structure, and the present invention is only used in the partial region of the layer. The electromagnetic energy gap structure thus increases the layer stack. Qing Zhao "Fig. 4" 'The county's current use of the electromagnetic 镰 structure plane after the j-axis, Lai Cun _ anger, the use of - magnetic full electromagnetic gap structure plane transfer impedance curve 403 compared to the helmet ^ The transfer impedance curve of the plane has a small transfer impedance. When the frequency i = Ming Z, the transfer impedance curve of the plane of the complete electromagnetic energy gap structure has a small transfer impedance of the month. 200808136 Please take "Fig. 5" as the self-impedance curve of the invention using the plane of the electromagnetic energy gap structure as shown in the figure. When the frequency is below 2.03 GHz, use full electromagnetic energy, self-impedance of the structural plane. Curve 5〇2 results in a very large amount of change from self-impedance: it is observed that the self-impedance curve of the incomplete electromagnetic energy gap structure plane of the present invention has a small amount of impedance change 'and at a frequency of 2 〇 3 GHz or more, the present invention The self-impedance curve of the electromagnetic energy gap structure plane 5G3 has a self-impedance value compared with the self-impedance curve of the plane of the complete electromagnetic energy gap structure compared with the self-impedance curve of the plane without the electromagnetic energy gap structure. ^ Although the present embodiment of the present invention is reduced as above, it is intended to limit the scope of the invention and the scope of the patent protection. With regard to the scope of protection defined by the present invention, please attach the scope of the patent application. " [Simple description of the diagram] 21 is a schematic diagram of a conventional multilayer printed circuit board with a light-to-light capacitor; the second diagram is a conventional multi-layer printed circuit board with a non-intentional electromagnetic energy source, ^ 7 is a schematic diagram of the electromagnetic energy gap structure of the present invention; the line diagram; and the fourth diagram is the transfer impedance curve after using the plane of the electromagnetic energy gap structure of the present invention. FIG. 5 is the electromagnetic button of the present invention. Self-impedance curve after structure plane [Main component symbol description] 1〇1,201,301······Multilayer printed circuit board 200608136 1011,2011..........Power layer 1012, 2012. ......... Grounding layer 104......................Integrated circuit 105.............. ······ Decoupling capacitors 3011, 3012..........Layer 304, 305....................Connection point 401 .. ........................Transfer impedance curve 402 without electromagnetic energy gap structure plane ............... ........transfer impedance curve of the plane of the total electromagnetic energy gap structure 403 .......................................................................................................... Transfer impedance curve of the structural plane 501 .................... .. self-impedance curve 502 without electromagnetic energy gap structure plane ..................·Complete electromagnetic energy gap structure plane self-resistance curve 503 ...... ................The self-impedance curve of the incomplete electromagnetic energy with the plane of the invention