200807660 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種結合積體電路（ic)整合基板與載板之結 構及其製造方法、與電子裝置之製造方法，尤有關於一種藉由差 異附著處理所製造之結合1C整合基板與載板之結構及其製造方 法，與電子裝置之製造方法。 【先前技術】 隨著資訊、通訊及消費性電子等產品朝向輕、薄、短、小及 搭配多功能化之趨勢發展，晶片的線寬、線間距與尺寸日益微型 化’且晶片所要求的傳輸速度愈來愈快，因此也相對應地提高晶 片電連接到外部之構裝技術的要求，以產生高密度細導線與導線 間距。因此，晶片構裝的技術從引腳插入型漸漸轉進到表面黏著 型，，導線架打金線的連接型態漸漸轉進到使用凸塊之方式，電 路板從PCB硬板、軟性印刷電路板jppc漸漸轉進到多層薄膜 一般六層晴質的PCB硬板重約4克，厚度#因== ①曲’而軟性印刷電路板在厚度約5〇卿的情況下，僅能製 ^線，相對的，在厚度觸A —情況下，多層薄膜基板可以^ 士:6層内連曰線丄總重量約0.2這，因此多層薄膜基板的可繞‘ J ，並且最輕薄。此外在内連線密度上，PCB硬板與軟性印刷200807660 IX. Description of the Invention: [Technical Field] The present invention relates to a structure for integrating a substrate and a carrier board with an integrated circuit (ic), a method for fabricating the same, and a method for manufacturing the electronic device, and more particularly to The structure and manufacturing method of the 1C integrated substrate and the carrier plate manufactured by the differential adhesion treatment, and the manufacturing method of the electronic device. [Prior Art] With the trend toward light, thin, short, small and versatile products such as information, communication and consumer electronics, the line width, line spacing and size of wafers are becoming increasingly miniaturized. The transmission speed is getting faster and faster, so the requirements for the electrical connection of the wafer to the outside are also correspondingly increased to produce a high-density fine wire-to-wire spacing. Therefore, the technology of the wafer assembly is gradually transferred from the pin-inserted type to the surface-adhesive type, and the connection pattern of the lead frame gold-plated wire is gradually transferred to the way of using the bumps, and the circuit board is from the PCB hard board and the flexible printed circuit. The board jppc gradually turns into the multi-layer film. Generally, the six-layer sunny PCB hard board weighs about 4 grams, and the thickness #因==1曲' and the flexible printed circuit board can only be made in the case of a thickness of about 5 〇. In contrast, in the case of the thickness touch A, the multilayer film substrate can be: the total weight of the 6-layer inner twisted turn is about 0.2, so that the multilayer film substrate can be wound around, and is the lightest. In addition to the interconnect density, PCB hard board and soft printing
It的?孔最小需為5Q"m，通孔焊墊最/]、需為漏_，線寬 j間距取小需為25/zm，而相對的，多層薄膜基板的通孔最小兩 ’、、、通孔焊墊最小需為25_，線寬與線間距最小需為^ 多層細基板可域增蝴魏密度。由於其可撓特性， 對於體積有特殊限制或結構中有可撓設計的產品尤其適合W ，而s ’上述多層薄膜基板主要是作為IC封裝用承载 角/aCpIg^SUbStrate) ’傳統上僅扮演電氣訊號傳送與介面接合的 角色。隨者電子產品需求畅高关：白勺 裝置高密度化發展，^ _^速化及電路 夕曰，專Μ基板將因具有如電容、電阻等功能 200807660 $之2裝置、驅動IC、或TFT等半導體裝置而大幅提 人美板予多層薄膜基紐術更大的成長空間。以下將以Ic整 合基板來絲此等高魏性之乡·麟板。 ^ 化二、半導體產業中，隨著IC整合基板尺寸的縮小 其的各種功能性電子裝置數量亦隨之遽增，對於ic整人 =提高，IC整合基板的製造程序也面臨； ίΐΐΐϋ有南功能性之1c整合基板已成為產業競爭力之一 ί基板Ϊ尺ΐΐΐί製造之其中—關鍵技術在於製造程序中1C整 性。f知的—種解決方法是在—剛性載板上進 人美衣作，猎由載板較佳的尺寸安定性而來增加1C整 安定性，但是在1c整合基板製作完成後要 7將c正口基板與載板分離是此類技術的一大課題。 所第44_8號中，其先將雙層薄膜基板形成於由I呂 載板上，接著再用鹽酸將鋁載板去除。此外，在美國專 内ί L2L917 ’揭露—種以犧牲載板製造技術來製作^多t It 薄膜基板的方法，其在載板上製作多層内連線 載板的熱祕係數小於多層内連線結構，接著進行硬化， 、降溫的程序中使得載板與多仙連線結構之間產生足夠 ，二®再31持裝置吸附在多層内連線結構上及酸液浸儀的方 式將多層内連線結構與載板分離開。 I且ίί Ϊ5258236號中’揭露—種以f射剝離法分離載板 :了有夕層内連線結構之多層薄膜基板的方法，如圖丨所示，其中 f 2合物層2、金屬層3與多層内連線結構4的次序依序地形&在 載板1上之後’再以雷射紫外光透過透明載祀照射在聚合物 上2上來分解聚合物層2，而使得透明載板说触其他部分結構分 離開。 然而，上述習知技術的分離方法非常繁瑣、複雜。因此，如 何提供—個方法與結構，能_時製作尺寸精密度高的職合基 200807660 =又絲*增加生產成本的情況下，㈣使lc整合基板與 刀離’仍是ic整合基板製造工藝目前所努力追尋的目標 【發明内容】 直制in之目的在於提供—種結合職合基板與載板之結構及 ' ΐϊ子裝置之製造方法，其中IC整合基板與載板的 刀離疋間早、快速且低成本的。The minimum hole of the It needs to be 5Q"m, the most common through-hole pad/], the need to be drain_, the line width j spacing should be as small as 25/zm, and the opposite, the multilayer film substrate has a minimum of two through holes. The minimum through-hole pad needs to be 25_, and the minimum line width and line spacing need to be ^ multi-layer fine substrate to increase the density of the butterfly. Due to its flexible nature, it is especially suitable for products with special restrictions on volume or flexible design in the structure, and s 'the above-mentioned multilayer film substrate is mainly used as a bearing angle for IC package/aCpIg^SUbStrate) 'Traditionally only plays electric The signal transmits the role of the interface. The demand for electronic products is high: the high-density development of the device, ^ _ ^ speeding and circuit 曰, the dedicated substrate will have functions such as capacitance, resistance, etc. 200807660 $ 2 device, driver IC, or TFT Such as semiconductor devices and greatly enhance the growth of the US board to the multilayer film base technology. In the following, the Ic integrated substrate will be used to make such a high-grade township. ^ In the semiconductor industry, as the size of the IC integrated substrate is reduced, the number of various functional electronic devices has also increased. For the IC, the manufacturing process of the IC integrated substrate is also faced; The 1c integrated substrate has become one of the industrial competitiveness. The substrate is one of the key technologies in manufacturing. The key technology lies in the 1C integrity of the manufacturing process. f knows that the solution is to enter the beautiful fabric on the rigid carrier board, the hunting is better by the better dimensional stability of the carrier to increase the 1C stability, but after the 1c integrated substrate is completed, it will be 7 The separation of the substrate from the carrier is a major issue in this type of technology. In No. 44_8, a two-layer film substrate was first formed on an Ilu carrier, and then the aluminum carrier was removed with hydrochloric acid. In addition, in the United States ί L2L917 'exposure - a method of fabricating a multi-t It film substrate at the expense of carrier manufacturing technology, the heat-history coefficient of the multi-layer interconnect carrier on the carrier is less than the multilayer interconnection The structure, followed by hardening, cooling, and the process of making the carrier and the multi-sinus connection structure are sufficient. The two-way device is adsorbed on the multi-layer interconnect structure and the acid immersion device is connected in multiple layers. The wire structure is separated from the carrier. I and ίί Ϊ 5258236, 'Exposure - a method for separating a carrier by a f-peel stripping method: a method for a multilayer film substrate having a wiring structure in the inner layer, as shown in Fig. ,, wherein the f 2 layer 2, the metal layer 3 and the order of the multilayer interconnect structure 4 is sequentially topographically & after the carrier 1 is then 'lasered ultraviolet light is transmitted through the transparent carrier 祀 on the polymer 2 to decompose the polymer layer 2, so that the transparent carrier Say that the other parts of the structure are separated. However, the separation method of the above prior art is very cumbersome and complicated. Therefore, how to provide a method and structure, can produce a high-precision job-based base 200807660 = and increase the production cost of the wire * (4) to make the lc integrated substrate and knife away 'still ic integrated substrate manufacturing process The goal of the current efforts [invention] The purpose of the direct system is to provide a combination of the structure of the substrate and the carrier plate and the manufacturing method of the tweezers device, wherein the IC integrated substrate and the carrier plate are separated from each other. Fast and low cost.
槿，it之一實施態樣提供一種結合ic整合基板與載板之結 效入3: 一載板及一位於該載板上之IC整合基板，其中該1C 二:載板間之介面具有一特定區域’該特定區域上之介 面附者力相異於該介面之其餘區域。 構之施祕提供—種結合IC整合基板與載板之結 包含下列步驟：提供—載板；對該載板進行差異 付者處理，及在該載板上形成—IC整合基板，其中該 合基板與該載板間之介面形成—特定區域’，、該特ί 區或上之；|面附著力相異於該介面之其餘區域。 本發明之另一實施態樣提供一種電子裝置之赞 以下步驟：提供一載板；對該載板進行差異 ▲在 合基板，其+__理=== ^=之;|面形成—特定區域，該特定區域上之介面附著力相 义^幻丨面之其餘區域；及切割該忙整合基板， 合基板與該載板自然分離而形成電子裝置。 J後之c正 在本發明巾’「職合基板」係與魏封仙之多膜 有，不同。具體而言，本發明之職合基板 構、或至少一半導體裝置，例如被動装= 電子置、_電晶體(TF·置及其它電抒”、或麵 糟由本發_技射段，她㈣知技術須以 ，複的方式來將多層薄膜基板與載板分離 ^、兵 速且低成本的方式將職合基板與載板分離，二 200807660 連線結構、具有至少—半導«置、或其組合之電子褒置。 【實施方式】 捧統現if Γ關歧日林發明之實猶彳以促賴本發明之徹底 例。因此，本發明並不而性之範 技藝者所瞭㈣繼涛找含熟習此項 結構2圖一實施例，結合職合基板30與細1之 #千豆炉立圖圖2之上半部表不整個結構之俯視圖，下半部則 二之C圖2可看出’結構2G係包含載板21與形成於其 有一周ΐΐίΓ^ίϊ在載板21與1⑶合基板30間之介面上具 區域不因m周圍區域23上之介面附著力與該介面之其餘 ϋ πιιέϋ11，處理時’方便將載板21與IC整合基板30 刀離周圍區域23之介面附著力可大於其餘區域。 本實施例所例示之忙整合基板3〇包含至少一 為被練置、，鶴電子裝置、_電晶體(TFT)tt、^ 二j子|置等。須注意在圖2巾，僅 ^忙 此徽藝人何知， 可在後績製程利用切割而製作成數百數千個電子 \ΐί僅為了方便表示與說明而將其結構加以簡化。 如圖3= ΐ 百先，在圖从中，提供載板21。接著， 之^人先對餘21進行差異畴處理，再將職合基板3〇 :;之=〜圍區域23之介面附著力大於=之其== 實所ί英Ϊ使得載板21與底部介電層31在周圍區域U產生 二者在其餘區域實質不附著。此處需了解，本 ^ 只貝付者」代表一接觸表面牢固貼合，不會因後續製程 200807660 中所產生之應力而互相 在不施加外力或施加対卜 *、嘗7自然刀離，亦即 式)=況下即可將ΐ::=ΐ ^ 板間之》產處2广J指可使載板與IC整合基 娜c整合=理，處理方式可視载 板進行全_附著處理之 从止丨Ϊ本貝把例中，載板21之材料為石夕晶圓，而底部介電厣31之 所 (小於 所不PH*基1 η由於此一材料間之附著力非常微弱（亦即「實 2貝3^ 3本實施例之「差異附著處理」僅針對周圍區域 其處理方式係於載板21的周_域23塗^ 的附著增強劑(杜邦公司所生產之模651)以增加載板= 間之附著力’而載板21的其餘區域則不做任何處 理，再將底口h電層31旋轉塗佈在載板2卜如匕 底部介電層31顧，域織生實_著。遭觀顺 其後，如圖3C所示，在底部介電層31上形成半導體裝置之其 他部分，如閘極32、源極33、汲極34、介電層35 '半導體層36等、， 藉此形成具有半導體裝置之1(：整合基板3G。最後，如圖3D所示， 在1C整合基板30之適當位置進行糊，此時由於職合基板3〇(底 部介電層31)與載板21僅在周圍區域23實質附著，其餘區域為實 質不附著的狀態，因此切割後之電子裝置38可與載板21自然分 離，舉例來説，其一者可在不施加外力的情況下分離或可藉由直 空吸取裝置將其二者分離。 〃 如上所述’相較於習知技術須以溶劑、雷射等繁複的方式將工。 200807660 :口土板與載板分離以形成電子裝置，本實施例可以簡單、 白、方式將ic整合基板與載板分離，以製作尺寸精密度高、輕薄、、 且可撓性佳之具有至少一半導體裝置之電子裝置。 工彳 41夕f據本發明之另—實施例，結合職合基板50與載板 上圖。與圖2類似’結構4G包含載板41與形成於其 丨面附著力大於該介面之其餘區域。其兩者不同 於本貫施例之1。整合基板5〇具有-多仙連線結構，且2 板’即正面與f面皆電氣連接至外部。在此雙面基;反 曰甘AU 土 f正面係電連接至基板背面，但多層内連線結構也可以 7 „接方式，如同^ ^ _連接或其他各種情形，此外， ^内連線結制層數也沒有限制，可依各種·來作適當的變 煙ίίΪΐ例中’載板Μ係使时日日日®，載板41上依序交疊介 層⑽成具有多相連線結構之IC整合基板5G，其中 二彳·二f I Μ 5 π是選用低介電係數(小於4)的聚醯亞胺 j ΓΪΓί ’上金屬層52與下金屬層56選用Cr/Cu/Ni/Au結構之凸 接^^中^^麗^^吨峨此㈣’以作為後續錫球電連 _ Β孟屬^54選用Cr/CU/Cr多層金屬線。在多層内連線 3入3刻方法或雷射鐵孔方法貫通介電層53、55、57， 使U 2連線可赠此電氣連接，或·連接至外部。 之材時’由於載板41 (㈣圓）與介電層51 (ΡΙ) 微弱（亦即「實質不附著」），因此，本實 :者S之:金二Τ反=電層51在周圍區域43產以附 在1C整。基板50之適纽置進行蝴，此時由於^合基板糾介 10 200807660 3 僅在周圍區域43實質附著，其餘區域為實質不 割:吏=子裝置可與载板41自然分離，舉: 置將其在秘加外力的情況下分離或可藉由真空吸取裳 同樣地，相較於習知技術須以溶劑、命 層薄膜基板與載板分離以形成電子裝置，本實施例以=:= 速的方式將ic整合基板與載板分離，以製尺 '夫 且可撓性佳之具有多層内連線結構之^^指讀回、_、 ㈣須ΐί在本發明中:載板可以是所有的固體材料，包含金屬、 雷#舰5、f晶圓、贿石基板、魏鎵、練亞胺等等。介 开衣丁烯BCB(b_-CyCl〇butene)、聚甲基丙稀酸甲酯 ' ^^^^^LCPdiquidcrysta! 此外’針對以上材料，本發明之「姜里基 式可在特定區域進行附著強化處理，其ί 特”升士面能的方式’如以電漿處理等，，、或利用加 ^面分子交聯與交纏的材料，如塗佈發甲烧系的增鋪 ^ 式來達成。表-顯示各種不同載板材料與介電 選用 附著強化處理方式的示例，但不限於此。㈣j〜用的 表一 ·· 載板材料 矽 二氧化石夕 玻璃 氮化矽 鋁 介電層材料 聚醯亞胺 苯并環丁烯 著強化處理區域 塗佈石夕甲烧系的增強 劑 ~ ----- 其餘區g____ — 不處理 矽 1 fe亞胺 t 處理步驟： _______ 五應專，在電槳 11 200807660 ^^~---- 本开環丁烯 1.塗佈特殊聚醯亞胺 (Fujifilm生產之 Durimide 9005) 2·硬化聚醯亞胺 3.全面性電聚處理 處理時也不需要 用遮罩遮擋 矽 —氧化梦 玻璃 氮化矽 鋁 陶瓷 ---—- 聚醯亞胺 苯并環丁烯 以物理氣相沉積 (PVD)法沉積鉻膜 不處理，鑛鉻膜 時需用遮罩遮擋 以域襞進行全面性處理，如此可達成全 ^編接料噴墨或轉方式，在特定區域塗佈石夕曱 ===:，烤之後再塗佈介電層。由卿= 區附ίΐίΐ，—實施例中，差異附著處理可先對載板進行全 :恭相，再對特定區域進行減弱附著處理。舉例來說， 矣而涂欲且t電層材料為聚醢亞胺，則可先在載板整個 ，附著增強齡降絲聚 力 減弱f杖區域之附著力（亦即減弱附著處理)者力因此可 ^發明之又另—實施例中，差異附著處理亦可針對牿定F 著處理。舉例來說，若載板材料為石夕 ^佈，接著再塗佈内含石夕甲烧系的附著增強域 上述貝施例僅為例示性而非 = 之目的在賊做攸整錢朗讀_力/生^^」 12 200807660 之實施例Ϊ里求而任意調整。此外，在圖2與圖4 形態，如離狀、ίΓΛΙ：貫例之朋區域，其可以是各種 氣泡等各種缺陷即；r 後續各種製程中產生脫層、 狀的情形，圖_示本發域為網格 新穎教示讀狀ϋ 雜雌’在獨縣發明之 改。因此，財此類修改應視為包含於本發日狀專化修 【圖式簡單說明】 ^11㉝示種習知以雷射剝離法分離載板與電子裳置的方 /¾ 圖2顯不根據本發明—實， 之冗整合基板與載板之結構的示意圖。 料體裝置 圖3A〜3D顯示根據本發明之一實施例，結合具有至少 合基板與載板之結構的製造方法與電子裝置的製造 圖示根據本發明之另—實施，結合具有乡層内連線级槿 之1C整合基板與載板之結構的示意圖。 。冓 圖5顯示如本發明之差異附著處理區域為網格狀。 圖6顯示如本發明之差異附著處理區域為點狀。 【元件符號說明】 1 透明載板 2 聚合物層 3 金屬層 4 多層内連線結構 13 200807660 20 21 23 30 31 32 33 34 35 36 38 40 41 43 50 51 52 53 54 55 56 57 結合1C整合基板與載板之結構 載板 周圍區域 1C整合基板 底部介電層 閘極 源極 沒極 介電層 半導體層 電子裝置 結合1C整合基板與載板之結構 載板 周圍區域 1C整合基板 介電層 金屬層 介電層 金屬層 介電層 金屬層 介電層 14之一, one of the implementation aspects provides a combination of an ic integrated substrate and a carrier board into a 3: a carrier board and an IC integrated substrate on the carrier board, wherein the 1C 2: interposer has a mask The specific area 'the interface attachment force on this particular area is different from the rest of the interface. The combination of the IC-integrated substrate and the carrier plate comprises the steps of: providing a carrier plate; performing differential treatment on the carrier plate, and forming an IC integrated substrate on the carrier plate, wherein the combination The interface between the substrate and the carrier forms a specific region, the region or the top surface; the surface adhesion is different from the remaining regions of the interface. Another embodiment of the present invention provides an electronic device as follows: providing a carrier; performing a difference on the carrier ▲ on the substrate, +__ rational === ^=; | face formation - specific The area, the interface adhesion on the specific area is the same as the remaining area of the phantom surface; and the busy integrated substrate is cut, and the substrate is naturally separated from the carrier to form an electronic device. The c after the J is different from the multi-film of Wei Fengxian in the "clothing substrate" of the present invention. Specifically, the structure of the present invention, or at least one semiconductor device, such as passive device = electronic device, _ transistor (TF and other devices), or the surface of the hair _ technology segment, she (four) The technology must separate the multilayer film substrate from the carrier plate in a complex manner, and separate the occupational substrate from the carrier plate in a manner that is low-cost and low-cost. The second 200807660 wiring structure has at least a semi-conductive arrangement, or The electronic device of the combination. [Embodiment] The present invention is indispensable for promoting the invention. Therefore, the present invention is not intended to be a technical expert. Tao seeks to understand the structure of this structure. Figure 1 shows an example. The top half of Figure 2 is combined with the top of the work board 30 and the thin one. The top half of the figure is not the top view of the whole structure, and the lower part is the top view of the second figure. It can be seen that the 'structure 2G system includes the carrier 21 and the interface formed between the carrier 21 and the 1 (3) substrate 30 with a region that does not have an interface adhesion on the region 23 around the m and the interface. The rest ϋ πιιέϋ11, when processing 'conveniently, the carrier board 21 and the IC integrated substrate 30 knife away from the week The adhesion of the interface of the region 23 may be greater than that of the remaining regions. The busy integrated substrate 3 例 exemplified in the embodiment includes at least one of being configured, the crane electronic device, the _ transistor (TFT) tt, the ^jj| It should be noted that in Figure 2, only the busy Hui artist knows how to make hundreds of thousands of electronic uses in the post-production process. The structure is simplified for convenience of presentation and explanation. 3 = ΐ 百先, in the figure from the above, the carrier 21 is provided. Then, the person first performs the differential domain processing on the remaining 21, and then the adhesion of the interface substrate 3 〇:; Its == 实 ί Ϊ Ϊ 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载 载Fit, will not be due to the stress generated in the subsequent process 200807660, no external force or application of rubbing *, taste 7 natural knife away, that is, the formula) = can be ΐ:: = ΐ ^ between the plates The production area of the 2 wide J refers to the integration of the carrier board and the IC Jinna c integration = rational, the processing method can be carried out by the carrier plate In the case of the treatment, the material of the carrier 21 is the stone wafer, and the bottom dielectric is 31 (less than the PH* base 1 η due to the adhesion between the materials) Weak (that is, "Different adhesion treatment" in this embodiment is only for the surrounding area, and the treatment method is applied to the adhesion enhancer of the periphery of the carrier 21 (the mold produced by DuPont). 651) to increase the adhesion between the carrier plates = while the rest of the carrier 21 is not treated, and then the bottom layer of the electrical layer 31 is spin-coated on the carrier 2, such as the bottom dielectric layer 31, After that, as shown in FIG. 3C, other portions of the semiconductor device such as the gate 32, the source 33, the drain 34, and the dielectric layer 35 are formed on the bottom dielectric layer 31. The semiconductor layer 36 or the like is used to form the semiconductor device 1 (the integrated substrate 3G). Finally, as shown in FIG. 3D, the paste is applied at the appropriate position of the 1C integrated substrate 30. At this time, since the occupation substrate 3 (the bottom dielectric layer 31) and the carrier 21 are substantially adhered only to the surrounding area 23, the remaining areas are substantially In the non-adherent state, the electronic device 38 after cutting can be naturally separated from the carrier 21, for example, one of them can be separated without applying an external force or can be separated by a direct air suction device. 〃 As mentioned above, it is necessary to work in a complicated manner such as solvent or laser compared to conventional techniques. 200807660: The earth plate is separated from the carrier to form an electronic device. In this embodiment, the ic integrated substrate can be separated from the carrier in a simple, white manner, so as to have a high precision, lightness, and flexibility, at least one. An electronic device of a semiconductor device. According to another embodiment of the present invention, the upper substrate 50 and the carrier are combined. Similar to Fig. 2, the structure 4G includes the carrier plate 41 and the remaining regions formed on the surface of which the adhesion is greater than the interface. The two are different from the first embodiment. The integrated substrate 5 has a multi-single connection structure, and the two plates 'ie, the front side and the f-side are electrically connected to the outside. In this double-sided base; the front side of the 曰 AU AU soil is electrically connected to the back of the substrate, but the multilayer interconnection structure can also be connected, like ^ ^ _ connection or other various situations, in addition, ^ interconnection knot There is no limit to the number of layers, and it is possible to make appropriate smoke changes according to various types. In the example, the carrier plate is used to make the day and day, and the carrier layer 41 is sequentially overlapped (10) to have a multi-connection structure. The IC integrates the substrate 5G, wherein the 彳·2 f I Μ 5 π is a polythene imine which has a low dielectric constant (less than 4). The upper metal layer 52 and the lower metal layer 56 are selected from Cr/Cu/Ni/ The convex structure of the Au structure ^^中^^^^^峨(4)' is used as the subsequent solder ball connection _ Β孟属^54 selects Cr/CU/Cr multilayer metal wire. In the multilayer interconnection line 3 into 3 The method or the laser iron hole method penetrates the dielectric layers 53, 55, 57, so that the U 2 connection can be provided with the electrical connection, or connected to the outside. When the material is used, the carrier plate 41 ((4) circle) and the dielectric layer 51 (ΡΙ) is weak (that is, "substantially not attached"), therefore, this is true: the person S: the gold two Τ reverse = the electric layer 51 is produced in the surrounding area 43 to be attached to the 1C. The substrate 50 is placed in a suitable state for the butterfly. At this time, since the substrate correction 10 200807660 3 is only substantially adhered to the surrounding area 43, the remaining area is substantially uncut: the 吏 = sub-device can be naturally separated from the carrier 41, Separating it under the external force of the secret or by vacuum suctioning the same, compared with the prior art, the solvent and the film substrate are separated from the carrier to form an electronic device. This embodiment uses =:= The speed of the ic integrated substrate is separated from the carrier, and the ruler is flexible and has a multi-layer interconnect structure. The readback, _, (4) must be in the present invention: the carrier can be all Solid materials, including metal, mine #船5, f wafer, bribe stone substrate, Wei gallium, and imine. In addition to the above materials, the "Jiang Liji type can be adhered and strengthened in a specific area". The method of "extraordinary energy" can be achieved by plasma treatment, etc., or by using a cross-linked and entangled material, such as a coating of a hair-fired system. Table - shows examples of various carrier materials and dielectric selection adhesion enhancement treatments, but is not limited thereto. (4) Table 1 used for j~··························································································· ---- The remaining area g____ — does not process 矽 1 fe imiline t Treatment steps: _______ Five should be specialized in the electric paddle 11 200807660 ^^~---- This open-ring butene 1. Coating special polyimine (Durimide 9005 produced by Fujifilm) 2. Hardened polyimine 3. Does not need to be covered by a mask during comprehensive electropolymerization treatment - Oxidation dream glass yttrium aluminum nitride ceramic ----- Polyimine benzene The cyclopentene is deposited by physical vapor deposition (PVD) method without treatment. The chrome film needs to be covered with a mask to perform comprehensive treatment with the domain ,, so that the inkjet or transfer mode can be achieved. Coating a stone in the specific area ===:, and then coating the dielectric layer after baking. In the embodiment, the differential adhesion treatment can be performed on the carrier plate first: the phase is opposite, and then the specific region is weakened and attached. For example, if the material of the t-layer is poly-imine, the adhesion of the p-rod area can be weakened (ie, the adhesion treatment is weakened). Therefore, in another embodiment, the differential attachment process can also be performed for the determination of F. For example, if the carrier material is Shi Xi ^ cloth, and then coated with the adhesion enhancement field of the stone-containing burning system, the above-mentioned shell example is only for illustrative purposes, not for the purpose of reading the thief. Force/Life ^^" 12 200807660 The embodiment is arbitrarily adjusted. In addition, in the form of FIG. 2 and FIG. 4, such as a detachment, a punctual area, which may be various defects such as various bubbles, i. The domain is a novel teaching of the grid, and the reading of the idiots is invented in the county. Therefore, such amendments should be considered as included in this issue of the specialization of the day [simplified description of the schema] ^1133 shows that the separation of the carrier and the electronic skirt by the laser stripping method / 3⁄4 Figure 2 shows A schematic diagram of the structure of the redundant integrated substrate and the carrier according to the present invention. FIG. 3A to 3D show a manufacturing method and an electronic device manufacturing method according to an embodiment of the present invention, in combination with a structure having at least a substrate and a carrier, according to another embodiment of the present invention, combined with a township interconnection Schematic diagram of the structure of the 1C integrated substrate and the carrier board of the line level. .冓 Fig. 5 shows that the differential adhesion treatment region as in the present invention has a grid shape. Fig. 6 shows that the differential adhesion treatment region as in the present invention is punctiform. [Description of component symbols] 1 Transparent carrier 2 Polymer layer 3 Metal layer 4 Multi-layer interconnection structure 13 200807660 20 21 23 30 31 32 33 34 35 36 38 40 41 43 50 51 52 53 54 55 56 57 Combined 1C integrated substrate Integrated with the surrounding area of the carrier board 1C, the bottom layer of the dielectric layer, the gate source, the electrodeless dielectric layer, the semiconductor layer, the electronic device, the 1C integrated substrate, and the structure of the carrier, the surrounding area of the carrier, 1C, the integrated dielectric layer, the metal layer. Dielectric layer metal layer dielectric layer metal layer dielectric layer 14