200803344 九、發明說明： 【發明所屬之技術領域】 Η本發明係有關於一種微波發射機，更明確地說，本發 明=關於一種適用於各種無線通訊系統發射機規格而達到 多模傳輸功能之微波發射機及其方法。 【先前技術】 在無線通訊手持設備中，主要的直流功率消耗來自於 射=功率放大器。因此，使射頻功率放大器既能具有高線 性广而不致讓放大訊號失真，並能同時具有高效率以延長 通訊時間，-直是射頻功率放大器設計之研究重點。尤盆 在未來無線通訊系統中所將廣為採用之正交頻分多^ (OFDM)數位調制技術具有明顯的時變波包特性，其峰值與 平均功率比值(PAPR)遠較現有的無線通訊系統為高，換^ 之其波包對時間變化較為劇烈，因此對射頻功率放大哭的 線性度要求也會比較高。 w 依先前技術，傳統類型的射頻功率放大器設計會依循 其線性度與效率互為取捨關係，線性度的要求增加必然造 成效率的降低。尤其傳統微波發射機功率控制在小功^輸 出時，仍會維持大功率輸出時之直流偏壓，因而造成直产 ^率的過度消耗，使得射頻功率放大器的動態操作效率^ 針對此問題，在中華民國公告第578369號發明專利揭 露-種高效率之功率放大器系統，係依據功率輪出大小動 態調整射頻功率放大器供應電麼，以降低直流偏屋在小功 率輸出時所造成的功率消耗。然而對要放大具有時變 .的射頻調制載波而言，則必須還要進一步做到射頻功率放 6 200803344 mi緊隨著輸出射頻調制載波之波包幅度變化做 调整，^能大幅提升其動S操佩率。 機加ϋ文獻中廣為人知的波包消除重建(eer)發射 /ί放女ir甘七刀換式射頻功率放大器，如D類、E類或 入輸出射頻载波振幅正比於供應電壓之特性， 以义日=制載^之波包訊號與具有相位訊息的載波予 相二亍t別傳送至射頻功率放大器的供應電壓端及射200803344 IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a microwave transmitter, and more particularly to a multimode transmission function for a transmitter specification applicable to various wireless communication systems. Microwave transmitter and method therefor. [Prior Art] In wireless communication handheld devices, the main DC power consumption comes from the radiation = power amplifier. Therefore, the RF power amplifier can have a high linearity without distorting the amplified signal, and can simultaneously have high efficiency to prolong the communication time, which is the research focus of the RF power amplifier design. Orthogonal Frequency Division Multiple (OFDM) digital modulation technology, which is widely used in future wireless communication systems, has obvious time-varying wave packet characteristics, and its peak-to-average power ratio (PAPR) is much higher than existing wireless communication. The system is high, and the wave packet change time is more severe, so the linearity requirement for RF power amplification crying will be higher. w According to the prior art, the traditional type of RF power amplifier design will follow the linearity and efficiency of each other, and the increase of linearity will inevitably lead to the decrease of efficiency. In particular, the power control of the traditional microwave transmitter still maintains the DC bias voltage at the time of high power output, resulting in excessive consumption of the direct output rate, which makes the dynamic operation efficiency of the RF power amplifier. The Republic of China Announcement No. 578369 discloses a high-efficiency power amplifier system that dynamically adjusts the power supply of the RF power amplifier according to the power wheel size to reduce the power consumption caused by the DC partial house at a low power output. However, in order to amplify the RF-modulated carrier with time-varying, it is necessary to further improve the RF power amplifier. 6 200803344 mi Follow the change of the amplitude of the wave packet of the output RF modulation carrier, and ^ can greatly improve its dynamic S Penetration rate. The well-known wave packet elimination reconstruction (eer) transmission / 放 female ir Gan seven-knife RF power amplifier, such as Class D, Class E or input and output RF carrier amplitude is proportional to the characteristics of the supply voltage. Day = carrier wave packet signal and carrier phase signal with phase information are transmitted to the supply voltage terminal of the RF power amplifier
n 3波包δίΐ就能動態調制供應電壓端而使射頻功 率放=益達^高動態操作效率之目的。 访恭=1第_"7圖’顯示1EER發射機架構之方塊圖， \術以類比電路分離波包訊號與相位調制載波， 之ΐ有時變動波包的射頻調制載波經過波包偵測 :二f艮制器102後’便可分離為低頻之波包訊號1〇3 皮包㈣之相位調制魏104,其中波包減1〇3經s ，調制器105以調制切換式射頻功率放大器應之供應電 而相位調制載波⑽因已不具有波包變動，可由切 二二.頻功率放大器、1G6卩高效率操作方式予以功率放 大。精由切換式射頻功率放大器1〇6之輸出射頻載波振幅 正比於直流供輕壓之雜將波包訊號減威之相位調 制載波相結合，而在發射機輪出端可以得雜大後具有原 時變波包之射頻調制載波1〇7。 —如第二圖所示方塊圖，S類調制器105架構包括脈衝 見^调制|§ 201、切換式放大器2〇2與低通濾波器2〇3，脈 衝見度调制器201將輸入之波包訊號轉換為二階式脈衝訊 號’其，衝寬度正比於輸人之波包訊號幅度，並經過切換 式放大态202放大後，再通過低通濾波器2〇3即可獲得放 大後之波包訊號，此架構可同時具有高線性度與高效率的 7 200803344 特性，但只適合放大低頻之波包訊號103。由於EER發射 機所用之切換式射頻功率放大器1〇6及S類調制器105均 具有高效率之特性，能有效降低直流功率之消耗’所以相 當適合應用在各種無線通訊手持設備上。 然而’依先前技術，EEr發射機使用類比技術分離波 包訊號103與相位調制載波1〇4，最後在輸出端重建所得 之射頻調制載波107其調制準確度不如傳統微波發射機利 用IQ調制技術處理般精確。波包訊號1〇3經過s類調制器 馨 105之低通濾波器2〇3後，其高頻成份會部分遭到濾除， 導致放大後的波包訊號在具有高頻成分的低電壓區會有失 真情形’如第三圖所示，無法重現該區域原來極深的凹陷 處位置’這會使得輸出端之射頻調制載波107產生頻譜重 增長現象’而難以符合無線通訊系統輸出頻譜的規範。此 外’脈衝寬度調制器2〇1需要用到能夠產生三角波之訊號 源’也會提尚系統實現之複雜度並增加輸出端射頻調制載 波107失真的機會。 。曰為了要有更好的調制準確度，美國發明專利第6377784 _ 號k出種極座標調制架構，如第四圖所示。此一架構是 以基頻數位技術實現直角座標至極座標轉換器4〇1，能讓 之1Q讯號精確地轉換成為相對應之波包訊號與相位 訊號、’波包訊號在做數位類比轉換後送入線性電壓調制器 02以用來隨波包變動幅度動態調整射頻功率放大器 21f包，。另外，相位訊號則送入具有相位調制功能的 生器403產生相位調制載波，再送入射頻功率放大 二；!04之射頻輸入端。相較於eer發射機架構，極座標調 采用基頻數位技術精確分離波包與相位，在輸出端 所產生之射頻調制載波可因而獲得較高的調制準確度。但 8 200803344 所使用的線性電壓調制器 有高效率的特性，所以路亚不如S類調制器105般具 除此之外，#遇到且x右^政率通常不及EER發射機。 等之調制訊號’在訊號向量或QAM 度急劇的變化’此時具純調 ^相位會有⑽ 頻寬通常不足以產生如此相 此之須干產生器403其 故極座標調制架構目前只成功；2,的相位調制載波’ _統上，譬… 仍無法適祕制具有零交越 射故’但 統發射機中，譬如2G侧與； 4咖發射她射，當切換式_功率m〇6 之:壓供應端遇眺大的波包訊號1Ό3電壓時，其射 入端需要輸入較大的相位調制載波1〇4功率，好^襄曰二 能切換在飽和區與截止區，維持切換式射頻功率放^曰曰^ 操作於高效率模式。然而在電壓供應端遇到較小的f包訊 號103電壓時，輸入同樣大之相位調制载波1〇4功率反而 造成切換式射頻功率放大器1〇6增益與效率皆降低，同時 也會導致射頻輸入端之相位調制載波104洩漏至輸出端^ 影響到輸出端射頻調制載波107的品質。所以，美國發曰月 專利第6256482號一種針對EER發射機架構提出視波包幅 度動態調整射頻輸入端相位調制載波功率的方法，可以^ 效改善EER發射機動態操作效率，但在上述有關EER架 構欠缺調制準確度的問題上，則沒有提供解決的辦法。 【發明内容】 有鑑於傳統微波發射機所使用的射頻功率放大器需要 在線性度與效率之間做取捨，而採用EER發射機架構的優 9 200803344 = :::兼顧高線性气與高效率’但其主要的铁點包括 直、fii aΓ不足、脈衝見度調制器處理波包訊號容易失 ”、疋載波輸入功率會導致動態操作效率下降以 題，,然而目前所提出的改#方法都無法完全克服 ^因此本發明提供一種創新微波發射機架構，係大幅产 導^基頻數位處理技術，称可提高訊賴fij精確度= 易適應各種無線通訊系統調制規格而達到多模^輸之 本發明之目的在提供一種微波發射機架構，改 =二,架構，利用大幅度導入基頻數位處理技術二 k升各製化積體電路設計的程度。 本發明之目的在提供一種微波發射機架構，改 利用基頻數位差異積分調制技術提二 放大效率，利用預先失真之1㈣制載波 使/、具有受動波包特性，而能彈性調整载波輸入功老， 以改善動態操作效率以及載波洩漏等問題。 卞曰 σσ為達到上述目的，本發明微波發射機對射頻功率放大 1§的供應電壓端與射頻輸入端施予雙端動態調制，調制方 式可包含波包調制、相位調制與IQ調制，其中供應電壓端 的调制訊號可為波包訊號，預先失真波包訊號或含有波包 成份之調制訊號；射頻輸入端的調制訊號可為〗 5周制載波、或含有波包成分之相位調制戴波。 本發明微波發射機之波包訊號由基頻數位處理 ^生’處理波包訊號所需之脈衝寬度調制器則 兴積分調制器取代，差異積分調制器不需要三角波 200803344 源，易於整合至基頻數位電路尹。 此=，本發明微波發射機對於射 包幅度之相位調制載波則二= i載7代，讓翻财變動__能彈性調 η題，二^ ’猎以改善動態操作效率以及载波茂漏等 調制載波由於經過預先失真處理，當與波包 大後U :: ’在射頻功率放大器輸出端重建所得功率放 、^、凋制載波不會因而產生任何失真現象。 ，據本發明所實現之微波發射機或依本發明教示 二：Ϊ通訊手持設備，以基頻數位技術改進現有EER發 之缺點’不同於傳統微波發射機之高效率與高線 ==捨_。除健有兼顧高雜度與高效率之特 才品作明並進一步強化其輸出射頻調制載波品質與動態 二卞’而且更容易適應各種無線通訊系統調制規格而 達到多模傳輸之功能。 【實施方式】 +、fit發明將麥閱含有本發明較佳實施例之所附圖式 这’但在此描述之前應瞭解熟悉本行之人士可 多2在本文中所描述之發明，同時獲致本發明之功效。因 ί之須瞭解1下之描述對熟悉本行技藝之人士而言為-廣 播之曷不’當可應用本發明之結構於不同微波發射機架 本^日f之應用當不僅限於以下所述之較佳實施例。 首先茶考第五圖，顯示本發明多模微波發射機架構之 tif。在本發明的較佳實施例中，發射機架構共有兩路 =〜处理路杈，其—路徑為波包訊號處理，另一路徑為預 失/、Q凋制讯號處理，該兩路徑同時對射頻功率放大器 11 200803344 的供應電壓端與射頻輸入端施予雙端動態調制。在波包訊 號處理路徑上，本發明發射機架構包含··波包產生器5〇1、 差異積分調制器502、切換式放大器503以及低通濾波器 504 ’本發明將輸入之IQ訊號經過波包產生器501產生相 對應之波包訊號，基頻波包訊號可以下列數學式表示：The n 3 wave packet δίΐ can dynamically modulate the supply voltage terminal and make the RF power amplifier = Yida ^ high dynamic operation efficiency. Visit Gong 1 = _"7 map' shows the block diagram of the 1EER transmitter architecture, \ is used to separate the wave packet signal and phase modulation carrier by analog circuit, and then the RF modulation carrier of the wave packet is sometimes detected by wave packet detection. : After the second 艮 102 102 102 102 102 102 102 102 102 102 102 102 102 102 102 102 102 102 102 102 102 102 102 102 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 The power supply and the phase-modulated carrier (10) can be power amplified by the two-frequency power amplifier and the 1G6-high-efficiency operation mode because there is no fluctuation of the wave packet. The output RF carrier amplitude of the switched-type RF power amplifier 1〇6 is proportional to the phase-modulated carrier of the DC-packed signal, and the phase-modulated carrier of the wave packet signal is reduced. The RF modulated carrier of the time-varying wave packet is 1〇7. - As shown in the block diagram of the second figure, the S-type modulator 105 architecture includes pulse see modulation | § 201, switched amplifier 2〇2 and low-pass filter 2〇3, and the impulse modulator 201 will input the wave The packet signal is converted into a second-order pulse signal, which is proportional to the amplitude of the wave packet signal input, and is amplified by the switched amplification state 202, and then obtained through the low-pass filter 2〇3 to obtain the amplified wave packet. Signal, this architecture can simultaneously have high linearity and high efficiency 7 200803344 features, but only suitable for amplifying low frequency wave packet signal 103. Since the switching RF power amplifiers 1〇6 and S-type modulators 105 used in EER transmitters have high efficiency and can effectively reduce the DC power consumption, they are suitable for use in various wireless communication handheld devices. However, according to the prior art, the EER transmitter uses the analogy technique to separate the wave packet signal 103 from the phase modulation carrier 1〇4, and finally reconstructs the resulting RF modulated carrier 107 at the output. The modulation accuracy is not as good as that of the conventional microwave transmitter using the IQ modulation technique. As precise. After the wave packet signal 1〇3 passes through the low-pass filter 2〇3 of the s-type modulator Xin 105, the high-frequency component is partially filtered, resulting in the amplified wave packet signal in the low-voltage region with high-frequency components. There will be distortions. As shown in the third figure, it is impossible to reproduce the original deep depression position in the area. This will cause the RF modulation carrier 107 at the output to generate a spectrum re-growth phenomenon, which is difficult to meet the specifications of the output spectrum of the wireless communication system. . In addition, the 'pulse width modulator 2〇1 requires a signal source capable of generating a triangular wave', which also increases the complexity of the system implementation and increases the distortion of the RF modulation carrier 107 at the output. . In order to have better modulation accuracy, the US invention patent No. 6377784 _ k produces a polar coordinate modulation architecture, as shown in the fourth figure. This architecture implements a rectangular coordinate to polar coordinate converter 4〇1 based on the fundamental frequency digital technology, which enables the 1Q signal to be accurately converted into a corresponding wave packet signal and phase signal, and the 'wave packet signal is converted into a digital analogy. The linear voltage modulator 02 is fed to dynamically adjust the RF power amplifier 21f packet with the fluctuation amplitude of the wave packet. In addition, the phase signal is sent to the phase modulating function generator 403 to generate a phase modulated carrier, and then sent to the RF power amplifier 2; Compared with the eer transmitter architecture, the polar modulation uses the fundamental frequency digital technology to accurately separate the wave packet and phase, and the RF modulated carrier generated at the output can thus obtain higher modulation accuracy. However, the linear voltage modulator used in 200803344 has high efficiency characteristics, so Luya is not as good as the S-type modulator 105. In addition, the encountered and x-right regimen is usually not as good as the EER transmitter. The modulation signal 'a sharp change in the signal vector or QAM degree' will have a pure tone phase at this time. (10) The bandwidth is usually not enough to produce such a coherent generator 403. The polar coordinate modulation architecture is currently only successful; , the phase modulation carrier ' _ on the system, 譬 ... still can not be made to have a zero crossover shot 'but but the transmitter, such as 2G side with; 4 coffee launch her shot, when switching _ power m 〇 6 When the voltage supply terminal encounters a large wave packet signal 1Ό3 voltage, the input end needs to input a large phase modulation carrier 1〇4 power, so that the switch can be switched between the saturation region and the cutoff region to maintain the switching RF. The power amplifier is operated in high efficiency mode. However, when the voltage supply terminal encounters a small voltage of the f-package signal 103, the input of the same large phase modulation carrier 1 〇 4 power causes the switching RF power amplifier 1 〇 6 gain and efficiency are reduced, and also causes the radio frequency input. The phase modulation carrier 104 of the terminal leaks to the output terminal ^ which affects the quality of the RF modulation carrier 107 at the output. Therefore, U.S. Patent No. 6,256,482 proposes a method for dynamically adjusting the phase modulation carrier power of the RF input terminal for the amplitude of the optical wave packet for the EER transmitter architecture, which can effectively improve the dynamic operation efficiency of the EER transmitter, but in the above-mentioned EER architecture. There is no solution to the problem of lack of modulation accuracy. SUMMARY OF THE INVENTION In view of the fact that the RF power amplifier used in the conventional microwave transmitter needs to make a trade-off between linearity and efficiency, the superior EER transmitter architecture is used. 200803344 = ::: Considering high linearity and high efficiency' The main iron points include straight, fii aΓ insufficient, the pulse visibility modulator is easy to lose the wave packet signal, and the carrier input power will cause the dynamic operation efficiency to drop. However, the proposed method cannot be completely completed. Overcoming ^ Therefore, the present invention provides an innovative microwave transmitter architecture, which is a large-scale production and control of the fundamental frequency digital processing technology, which can improve the accuracy of the signal processing = easy to adapt to various wireless communication system modulation specifications to achieve multi-mode transmission of the invention The purpose of the present invention is to provide a microwave transmitter architecture, which is to change the degree of design of the two-kilometer integrated circuit by using a large-scale introduction of the fundamental frequency digital processing technology. The object of the present invention is to provide a microwave transmitter architecture. Change the amplification efficiency by using the fundamental frequency difference integral modulation technique, and use the pre-distortion 1 (four) carrier to make /, have the dynamic wave packet characteristics The carrier input function can be flexibly adjusted to improve dynamic operation efficiency and carrier leakage. 卞曰σσ To achieve the above purpose, the microwave transmitter of the present invention applies a double to the supply voltage terminal and the RF input terminal of the RF power amplification 1 § The terminal dynamic modulation, the modulation mode may include wave packet modulation, phase modulation and IQ modulation, wherein the modulation signal at the supply voltage end may be a wave packet signal, a pre-distortion wave packet signal or a modulation signal containing a wave packet component; the modulation signal at the RF input end may be It is a 5-week carrier, or a phase-modulated wave with a wave packet component. The wave packet signal of the microwave transmitter of the present invention is processed by the fundamental frequency digital processing to generate a pulse width modulator required for processing the wave packet signal. In place of the device, the differential-integral modulator does not require a triangular wave 200803344 source, and is easy to integrate into the baseband digital circuit. This =, the phase modulation carrier of the microwave transmitter of the present invention for the amplitude of the packet is 2 = i for 7 generations, allowing for the change of the fortune __ can adjust the η problem elastically, and the second ‘hunting improves the dynamic operation efficiency and the carrier wave carrier and other modulated carriers Processing, when the wave packet is large, U: 'reconstruction of the resulting power at the output of the RF power amplifier does not cause any distortion phenomenon. The microwave transmitter or the invention according to the present invention Teaching 2: Ϊ communication handheld equipment, using the fundamental frequency digital technology to improve the shortcomings of the existing EER's different from the traditional microwave transmitter's high efficiency and high line == 舍. In addition to health and high complexity and high efficiency It also enhances its output RF modulation carrier quality and dynamics and further adapts to the modulation specifications of various wireless communication systems to achieve multi-mode transmission. [Embodiment] +,fit invention will contain the invention The drawings of the preferred embodiments are described herein, but it should be understood that those skilled in the art can more than 2 the inventions described herein while achieving the effects of the invention. The description of 1 is necessary for those who are familiar with the skill of the art - the broadcast is not 'when the structure of the present invention can be applied to different microwave transmitting racks, the application is not limited to the following Preferred embodiment. First, the fifth chart of the tea test shows the tif of the multimode microwave transmitter architecture of the present invention. In a preferred embodiment of the present invention, the transmitter architecture has two paths = ~ processing path, wherein the path is a wave packet signal processing, and the other path is a pre-loss / Q signal processing, and the two paths are simultaneously The double-ended dynamic modulation is applied to the supply voltage terminal and the RF input terminal of the RF power amplifier 11 200803344. In the wave packet signal processing path, the transmitter architecture of the present invention includes a wave packet generator 5〇1, a differential integral modulator 502, a switched amplifier 503, and a low pass filter 504. The present invention passes the input IQ signal through the wave. The packet generator 501 generates a corresponding wave packet signal, and the baseband wave packet signal can be expressed in the following mathematical formula:
上式（1)_所得的E即為極座標中的振幅大小，亦代表 輸入IQ訊號相對應之波包訊號，其中平方與開平方根之運 异不谷易以數位電路直接實現，可參考Ray Andraka在1998 年 2 汽 22-24 B 於 FPGA r98. Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays 的第 191-200 頁所揭露的 CORDIC演算法，係以疊代法逐次逼近所要求得之波包大 小，所得到之數位波包訊號再通過一差異積分調制器5〇2 轉換為二階式訊號，差異積分調制器5〇2之架構可參考第 =圖所示，而差異積分調制器可為類比式差異積分調制 裔、類比式脈衝寬度調制器、類比式多級或多階差異積分 凋制裔、數位式差異積分調制器、數位式脈衝寬度調制器、 數位式多級或多階差異積分調制器。 、該第六圖中所示為一階差異積分調制，輸入訊號X經 過積分後，由量化器之判斷為超過量化準位則輸出，，反 之則為並將輸出結果負回授至輸人端，此即差分之動 作，其轉移函數可表示如下式： Y = X^(l-z'l)e 、 （2) 其中Μ戈表置化器所引入之量化雜訊，從上式可發現輸 出訊號Υ等於輸人訊號X加上差分後之量化_，而差分 12 200803344 在頻域上等同於將訊號能量推往高頻之動作，所得輸出端 之訊號γ為二階式之脈波訊號，可應用於高效率之切換式 放大斋503將訊號放大，待其經過低通濾波器504將已被 推往高頻之量化雜訊濾除後，即可獲得為放大後之輸入波 包波形。此一放大波包訊號輸入至射頻功率放大器5〇8之 供應電壓端’使得射頻功率放大器508輸出載波被來自供 應電壓端之變動波包訊號施予振幅調制。 在預先失真IQ調制訊號處理路徑上，本發明發射機架 構包含：第一預先失真器5〇5、數位-類比轉換器5〇6以及 IQ調制器507，本發明將輸入之jq訊號經過數位第一預 先失真态505，並經由數位-類比轉換器5〇6將預先失真後 的IQ訊號轉變為相對應之類比訊號，再藉由IQ調制器/5〇7 七生jQ調制後之載波作為射頻功率放大器5〇8的射頻輸入 此舉是讓輸人之載波因具有變動波包特性而能彈 =整载波輸人功率，藉以改善動態操作效率以及載波茂 ς ^題’但此IQ調制載波由於經過預先失真處理，當鱼 ，^號相結合後，在射頻功率放Α||谓輸出端重建所 大後之射頻調制载波不會因而產生任何失真現 不同實施例中，輪入之1q減亦可先經過 5〇1 Λ 505 ’其輸出訊號再分別輸入波包產生器 501與數位-類比轉換器506。 利用itr，波發射機架構中，第-預先失真請 ==!發射機輪入與輸出訊號間之非線性關 ΐ 來自於射頻功率放大器508的非線性^ 0象:：=率放大謂可為Α類、Β類、ΑΒ類、C類灵 D痛、E類或F類等放大器電路。、 電路功能包含改變IQ基頻卿 減失—505的 琥、波包訊號、相位訊號或射 13 200803344 頻載波振幅’用以補償發射機電路所含元件之非線性現 象’藉以謀求改善輸出端射頻調制載波之調制準確度與線 性度參數。 苐七圖頒示本發明發射機操作概念之示意圖，發射機 之輸出訊號振幅對波包振幅變化特性如特性701所示，在 低波包振幅時會因輸入端射頻載波訊號洩漏至輸出端，而 使輸出訊號振幅有一固定下限，而在高波包振幅時則與輸 出訊號振幅呈現線性關係。而預先失真器能使發射機之輸 _ 出訊號振幅對預先失真後IQ調制訊號產生如特性702之關 係’在低輸出訊號振幅時呈現線性關係，在高輸出訊號振 幅時則促成其飽和而有一固定上限。特性7〇2與703剛好 呈現出乘法形式之相互補償關係，故當兩路徑訊號會合於 射頻功率放大器508時，可得到輸出訊號振幅對輸入訊號 振幅之元美線性關係，如特性所示。 本發明實施例在硬體實現的好處包括所採用波包產生 器501、差異積分調制器502及第一預先失真器505是以 基頻數位處理方式加以實現，高效率之切換式放大器503 • 及低通濾波器504可利用基頻類比訊號處理技術予以實 現，而數位-類比轉換器506則是利用基頻混合訊號處理技 術，以上所有電路可統稱為提升多模操作效率基頻處理器 509。由於現有基頻訊號處理晶片設計其功能可以相當強 大’谷易滿足各種然線通訊糸統調制規格’故因此本發明 技術適合應用在多模無線系統。如果將提升多模操作致率 基頻處理器509之功能給禁能（disable)，則剩下之IQ調制 器507及射頻功率放大器508，則合組成低效率但具有高 線性度之傳統IQ調制微波發射機架構510，如果將提升多 模操作效率基頻處理器509之功能給致能(enable)，則改良 14 200803344 f為兼具高效率與高線性度之多模微波發射機架構。這意 明傳統IQ調制微波發射機架構可視為本實施例之一項特 例，並可由此延伸出以下實現本發明發射機之兩種無線手 持設備收發機晶片架構，進一步說明如下。 考第八圖，顯示實現本發明發射機的無線手持設 ，收晶片之一種方塊圖。根據本發明的教示，傳統無 線手持没備收發機晶片中所採用低效率發射機架構可由原 土 jrt路加以擴充而成為本發明高效率發射機架構。無線 ^又備收發機晶片包括基頻處理器⑽卜射頻處理器802 ^頻功率放大器，三部份，射頻功率放大器803輸出 ::钟^2，將訊號發射出去。基於基頻訊號處理晶片 t l功ΐ，只要將本發明提升多模操作效率基頻處 丰二约锯貫現在基頻處理器801中即可大幅提升無線 寸=來老ΐ射機效率，並且同時適合多模操作。 備收發機晶片改變傳統無線手持設 模操作效率芙賴声木構根據本叙明的教示可將提升多 率基頻處理開發成為提升多模操作效 配益崎丰;片901。如弟九圖所示，該晶片901可搭 配了、表手^備收發機晶片9() 之發射機效率一様且亡产夕^ 從…果予持5又備 點。 1具有在多杈刼作下可以大幅提升的優 - 1 9GHZPC^ ^例在硬體貫作上’本發明已完成 功安批在丨士处。貝段應用於CDMA2000 1X系統，而且具有 以料減發射機，其巾基賴位技術是 產品實現i。他混合訊號及類比電路是以現有的1C Λ見在發射機整合測試上，以FPGA產生一資料 200803344 二二、^ Msymb〇ls/s之（^烈尺調制訊號作為基頻輪入 1，放大波包訊號之切換式放大器503其直流供 疋值與發射機輸出功率大小有關，因域大的輸 ^卞而要越大的波包幅度，所以也需要越大的直流供應 電壓值。 第十圖頒不當該直流供應電壓值設定在3·3 V時，適 合發射，率從13 dBm至22 dBm控制範圍情況下之測試結 果。測試參胃數包括衡量調制準確度所用之錯誤向量幅度 (EVMj，衡量線性度所用之鄰近通道功率比例(ACpR)，以 及衡量發射機效率所用之直流功率轉換成射頻功率之轉換 效率（ConvEff)。第十圖中EVM值約為5·8〇/〇，ACpR值約 為48 dBc，皆滿足CDMA2000 lx系統之規範要求，若能 持續調整第一預先失真器505,則可讓EVM與ACpR值繼 績改善。在所指定的功率控制範圍内c〇nvEff值接近48%， 換算成功率增加效率(PAE)約45%,表現上皆遠優於現有產 品的發射機效率。 此外，從第十圖中可發現本發明發射機重要的特徵r φ 即EVM值、ACPR值與ConvEff值幾乎與輸出功率無關， 而對傳統微波發射機架構這些電性參數卻會與輸出功'率^呈 現緊密的相關性，而且是EVM值與ACPR值相對於二率 (ConvEff或PAE)是互為取捨關係。故本發明微波發射機二 優點在面對不同操作模態而要求不同輸出功率時，皆能# 持固定的電性參數品質。 ' 請參考第十一圖’顯示本發明增加波包頻寬微波發射 機架構之方塊圖。本實施例為改良第五圖所示實施例，<吏 得微波發射機得以增加傳輸速率，發射機架構同樣I有# 路§fl5虎處理路徑’其一路徑為波包訊5虎處理，另一路彳a為 16 200803344 預先失真與延遲IQ調制訊號處理，該兩路徑同時對射頻功 率放大器的供應電流與射頻輸入端施予雙端動態調制。在 波包訊號處理路徑上，本發明發射機架構包含：波包產生 器111、第一預先失真器及延遲控制單位112、差異積分調 制态113、至少一位元控制電流源114以及低通濾波器 115，本發明將輸入之IQ訊號經過波包產生器m產生相 對應之波包訊號，所得到之數位波包訊號經過第一預先失 真态及延遲控制單位112再通過一差異積分調制器113轉 換f至少二階式訊號，此一至少二階式輸出之差異積分調 制器113，可以減少在差異積分中所需要的超取樣率，所以 對於相同工作頻率的差異積分調制器113而言，越 更適合用於馬資料傳輸速率之通訊系統上；The E obtained by the above formula (1)_ is the amplitude of the polar coordinates, and also represents the wave packet signal corresponding to the input IQ signal. The square and the square root of the operation are directly realized by the digital circuit, and can be referred to Ray Andraka. The CORDIC algorithm disclosed in 1998, 2, 22-24 B, FPGA, r98. Proceedings of the 1998 ACM/SIG, symposium on Field programmable gate arrays, 191-200, is required by iterative approximation. The obtained wave packet size, the obtained digital wave packet signal is converted into a second-order signal by a differential integral modulator 5〇2, and the structure of the differential integral modulator 5〇2 can be referred to as shown in FIG. The device can be analog-like differential integration modulation, analog pulse width modulator, analog multi-level or multi-order differential integration, digital difference integral modulator, digital pulse width modulator, digital multi-level or more Order difference integral modulator. The sixth figure shows the first-order difference integral modulation. After the input signal X is integrated, it is output by the quantizer as exceeding the quantization level, and vice versa, and the output result is negatively fed back to the input end. This is the action of the difference, and its transfer function can be expressed as follows: Y = X^(l-z'l)e, (2) The quantization noise introduced by the 表戈表置器 can be found from the above formula. The output signal Υ is equal to the input signal X plus the difference quantization _, and the difference 12 200803344 is equivalent to the action of pushing the signal energy to the high frequency in the frequency domain, and the signal γ at the output end is a second-order pulse signal. The switch can be applied to the high-efficiency switching amplifier 503 to amplify the signal, and after it is filtered by the low-pass filter 504 to the high-frequency quantization noise, the amplified input wave packet waveform can be obtained. The amplified wave packet signal is input to the supply voltage terminal of the RF power amplifier 5〇8 such that the RF power amplifier 508 output carrier is amplitude modulated by the varying wave packet signal from the supply voltage terminal. In the pre-distorted IQ modulation signal processing path, the transmitter architecture of the present invention comprises: a first predistorter 5〇5, a digital-to-analog converter 5〇6, and an IQ modulator 507, and the present invention passes the input jq signal through the digital number a predistortion state 505, and converting the pre-distorted IQ signal into a corresponding analog signal via the digital-to-analog converter 5〇6, and then using the IQ modulator/5〇7 seven-joy jQ-modulated carrier as the RF power The RF input of the amplifier 5〇8 is to enable the input carrier to be able to play the variable carrier input power because of the variable wave packet characteristics, so as to improve the dynamic operation efficiency and the carrier ς 题 但Pre-distortion processing, when the fish, the ^ number is combined, the radio frequency modulation carrier is reconstructed after the RF power is discharged from the RF output || the output is not generated. Therefore, in different embodiments, the 1q reduction of the round can also be The output signal is first input to the wave packet generator 501 and the digital-to-analog converter 506 through 5 〇 1 Λ 505 ′. Using itr, the wave transmitter architecture, the first pre-distortion please ==! The nonlinear relationship between the transmitter wheel and the output signal. The nonlinearity from the RF power amplifier 508 ^:::= rate amplification can be Amplifier circuits such as terpenoids, terpenoids, terpenoids, C-type D-pain, E-class or F-class. The circuit function includes changing the IQ base frequency loss-505's amber, wave packet signal, phase signal or shot 13 200803344 frequency carrier amplitude 'to compensate for the nonlinear phenomenon of the components contained in the transmitter circuit', in order to improve the output RF The modulation accuracy and linearity parameters of the modulated carrier. Figure 7 is a schematic diagram showing the operation concept of the transmitter of the present invention. The output signal amplitude of the transmitter and the amplitude variation of the wave packet are as shown by the characteristic 701. When the amplitude of the low wave packet is exceeded, the RF carrier signal of the input terminal leaks to the output end. The output signal amplitude has a fixed lower limit, and the high wave packet amplitude has a linear relationship with the output signal amplitude. The predistorter can cause the transmitter's output signal amplitude to produce a linear relationship with the predistorted IQ modulated signal as characteristic 702 'at a low output signal amplitude, and a high output signal amplitude to cause saturation. Fixed upper limit. The characteristics 7〇2 and 703 just show the mutual compensation relationship of the multiplication form, so when the two path signals are combined with the RF power amplifier 508, the linear relationship between the output signal amplitude and the input signal amplitude can be obtained, as shown by the characteristic. The benefits realized by the hardware in the embodiment of the present invention include that the wave packet generator 501, the differential integration modulator 502 and the first predistorter 505 are implemented by a fundamental frequency digital processing method, and the high efficiency switching amplifier 503 is provided. The low pass filter 504 can be implemented using a baseband analog signal processing technique, while the digital to analog converter 506 utilizes a baseband mixed signal processing technique. All of the above circuits can be collectively referred to as a boosted multimode operational efficiency baseband processor 509. Since the existing baseband signal processing chip design can be quite powerful, the system can be applied to multi-mode wireless systems. If the function of the multimode operation rate baseband processor 509 is disabled, the remaining IQ modulator 507 and RF power amplifier 508 are combined to form an inefficient but high linearity conventional IQ modulation. The microwave transmitter architecture 510, if the function of the multi-mode operation efficiency baseband processor 509 is enabled, is improved. The 200803344 f is a multi-mode microwave transmitter architecture with high efficiency and high linearity. This means that the conventional IQ modulated microwave transmitter architecture can be seen as a specific example of the present embodiment, and thus the following two wireless handheld device transceiver chip architectures embodying the transmitter of the present invention are further extended as follows. In the eighth diagram, a block diagram of a wireless handheld device and a receiving chip for implementing the transmitter of the present invention is shown. In accordance with the teachings of the present invention, the low efficiency transmitter architecture employed in conventional wireless handheld transceiver chips can be augmented by the native jrt path to form the high efficiency transmitter architecture of the present invention. The wireless transceiver chip includes a baseband processor (10), a radio frequency processor, an 802-frequency power amplifier, and a three-part, RF power amplifier 803 output: clock^2, which transmits the signal. Based on the fundamental frequency signal processing chip tl function, as long as the present invention improves the multi-mode operation efficiency, the fundamental frequency is widely seen in the baseband processor 801, which can greatly improve the wireless inch = the efficiency of the old projector, and at the same time Suitable for multi-mode operation. The transceiver chip changes the traditional wireless handheld design operation efficiency. According to the teachings of this description, the enhanced multi-frequency fundamental frequency processing can be developed to improve the multi-mode operation efficiency. As shown in the figure of the nine, the chip 901 can be equipped with the transmitter of the transceiver chip 9 () and the efficiency of the transmitter is smashed. 1 has the advantage that it can be greatly improved under multiple operations - 1 9GHZPC ^ ^ example in the hard work" The invention has been completed in the gentleman's office. The Bayer segment is applied to the CDMA2000 1X system, and has a material-reduction transmitter, and its towel-based positioning technology is a product realization i. His mixed signal and analog circuit is based on the existing 1C 在 in the transmitter integration test, and the FPGA generates a data of 200303344 22, ^ Msymb 〇 ls / s (^ intensity modulation signal as the base frequency wheel 1 into, The switching amplifier 503 of the wave packet signal has a DC supply value which is related to the output power of the transmitter. The larger the wave packet amplitude due to the large field transmission, the larger the DC supply voltage value is also required. If the DC supply voltage is set at 3·3 V, it is suitable for emission test results with a control range from 13 dBm to 22 dBm. The test reference number includes the error vector magnitude used to measure the modulation accuracy (EVMj) , the adjacent channel power ratio (ACpR) used to measure linearity, and the conversion efficiency (ConvEff) of DC power used to measure transmitter efficiency to RF power. The EVM value in Figure 10 is about 5.8 〇/〇, ACpR The value is about 48 dBc, which meets the specifications of the CDMA2000 lx system. If the first predistorter 505 can be continuously adjusted, the EVM and ACpR values can be improved. The c〇nvEff value is within the specified power control range. Nearly 48%, the conversion success rate increase efficiency (PAE) is about 45%, which is far superior to the transmitter efficiency of existing products. In addition, the important characteristics of the transmitter of the present invention, r φ , ie EVM value, can be found from the tenth figure. The ACPR value and the ConvEff value are almost independent of the output power. However, the electrical parameters of the traditional microwave transmitter architecture are closely related to the output power rate, and the EVM value and the ACPR value are relative to the second rate (ConvEff). Or PAE) is a mutual trade-off relationship. Therefore, the advantages of the microwave transmitter of the present invention are capable of maintaining a fixed electrical parameter quality when faced with different operating modes and requiring different output powers. 'Please refer to FIG. 11' The block diagram of the architecture of the invention for increasing the bandwidth of the wave packet is shown in the embodiment of the present invention. In this embodiment, the embodiment shown in the fifth figure is improved, and the transmission frequency of the microwave transmitter is increased, and the transmitter architecture has the same path. The fl5 tiger processing path 'one path is wave packet 5 tiger processing, the other channel 为 a is 16 200803344 pre-distortion and delay IQ modulation signal processing, the two paths simultaneously supply the RF power amplifier and the RF input terminal The dual-end dynamic modulation. On the wave packet signal processing path, the transmitter architecture of the present invention comprises: a wave packet generator 111, a first predistorter and delay control unit 112, a differential integral modulation state 113, and at least one bit control current. The source 114 and the low pass filter 115, the present invention generates the corresponding wave packet signal by the input IQ signal through the wave packet generator m, and the obtained digital wave packet signal passes through the first predistortion state and the delay control unit 112. A difference integral modulator 113 converts f at least a second order signal, and the difference integral modulator 113 of the at least second order output can reduce the oversampling rate required in the differential integration, so the difference integral modulator 113 for the same operating frequency In terms of the more suitable for the communication system of the horse data transmission rate;
輸出可以帶，更高的資料傳輸速率，所以可以讓此一架構 在預先失真與延遲IQ調制訊號處理路徑上 射機架構包含·· 預先失真器及The output can be used with a higher data transfer rate, so this architecture allows the pre-distortion and delay IQ modulation signal processing path to include the predistorter and
y|上，本發明發 ^遲控制單位112、數On y|, the present invention sends a delay control unit 112, a number
117 ’本發明將輸入之 空制單位112，並經由 免延遲校正後的IQ訊 IQ調制器117產生IQ 17 200803344 調制後之載波作為射頻功率放大器1丨8的射頻輸入端訊 號，此舉是讓輸入之載波因具有變動波包特性而能彈性碉 整載波輸入功率，藉以改善動態操作效率以及載波茂漏°等 問題，但此IQ調制載波由於經過預先失真處理，當與波包 訊號相結合後，在射頻功率放大器118輸出端重建所得功 率放大後之射頻調制載波不會因而產生任何失真現象:f 述延遲控制單位是用以協調兩路訊號處理，使得兩路徑的 訊號達到同步。在本發明的不同實施例中，輸入之訊號 亦可先經過第一預先失真器，其輸出訊號再分別輸入波包 產主器與數位-類比轉換器。 由於製造過程的製程飄移，使得每一個元件具有些許的 差異性，同時在電路的使用過程中，溫度往往因為&境及 操作時間的改變而有所變化。在種種外在環境的變化下， 電路的特性也會有顯著的變化，因此在穩健的要求下，可 將射頻功率放大器之輸出再回柃釗箱止止士 ...117 'The present invention will input the air unit 112, and generate the IQ 17 200803344 modulated carrier as the RF input signal of the RF power amplifier 1丨8 via the delay-corrected IQ signal IQ modulator 117. The input carrier can flexibly adjust the carrier input power due to the variation of the wave packet characteristics, thereby improving the dynamic operation efficiency and the carrier leakage. However, the IQ modulation carrier is combined with the wave packet signal due to the pre-distortion processing. The RF-modulated carrier after the power amplification is reconstructed at the output of the RF power amplifier 118 does not cause any distortion: f The delay control unit is used to coordinate the two-way signal processing so that the signals of the two paths are synchronized. In various embodiments of the present invention, the input signal may also pass through the first predistorter, and the output signal is input to the wave packet generator and the digital-to-analog converter, respectively. Due to the drift of the manufacturing process, each component has a slight difference, and during the use of the circuit, the temperature often changes due to changes in the environment and operating time. Under the changes of various external environments, the characteristics of the circuit will also change significantly, so under the rigorous requirements, the output of the RF power amplifier can be returned to the ...
微丹啕一 回授控制微波發射 使得微波發射 線性度。發射機架 方塊圖。在本發明此一實施例中， 回授控制以改善功率放大器 200803344 構具有兩路訊號# 一路徑為延遲1〇铜 徑，其一路徑為波包訊號處理，另 放大器的供應電^^號處理，該兩路徑同時對射頻功率 包訊號處理路=與射頻輸人端施予雙端動態·。在ΐ 12卜延遲控制單位$發明f射機架構包含：波包產生器 器124。本發明將、差異積分調制器123與S類調制 單位122再通過一 s 數位波包訊號經過延遲控制 號，最後_ 8類‘丨，上調制11 123轉換為二階式訊 ^^ ϋ t M ^ ^ t s i!；„ ,. ^ ^ ^ A 28 · 如前述第—0ik輦^ ，、°D制态i24與差異積分調制器123 與#圖之說明，在此不再贅述。 人在延遲IQ調制訊號處理路徑上 明 含··延遲控制單位122、齡你相丄綠i 械構包 127、可啁辦只放*的nQ ·頜比鈐換器126、IQ調制器 口周曰凰放大态128及回授控制單元14〇，盆 授控制單元140包含波句偵測哭】 /、中及回 魅mo 卜類比數位轉換器142 二弟-預先失真$ 143 ’該波包偵測器141偵測射頻功率 =大器128’之輸出端以產生回授波包訊號，經 換器M2而將該回授波包訊號數位化，由第二預先失直= 143接收數位化的回授波包訊號與該波包產生器經延遲^ 數位波包訊號。 本發明將输入之IQ訊號經過延遲控制單位122，並叙由 數位-類比轉換器Π6將延遲校錢的IQ訊號轉變為^對 應之類比訊號，再藉由IQ調制器127產生][Q調制後之載 波，經可調增篮放大裔128放大後作為射頻功率放大器 128’的射頻輸入端訊號。 σσ 上述可調增盈放大态128之增益由第二預先失真器μ] 的輸出所決定，该第一預先失真器143接收類比數位轉換 200803344 器142的輪出訊號(數位化的回授波包訊號）與波包產生哭 121的輸出經延遲之訊號(數位波包訊號），以產生一栌^ 該可調增益放大器128的增益。在本發明的：同 貫鈀例中，輪入之:[Q訊號亦可先經過延遲控制單元，豆 出讯唬再分別輸入波包產生器與數位_類比轉換器。八， 、唐勺=第十三圖’顯示本發明具有回授控制以及增加 中所使得，射機具有-回授控制二二 Γ二i機架構具有兩路訊號處理路徑，其-路徑為 另一路徑為延遲1Q調制訊號處理，該兩路 :動能柄率放大器的供應電流與射頻輸入端施予雙 ϊ: 1、延遲㈣單位 上二；位兀控制電流源134以及低通濾波咖 應之波=輸經過波包產生器131產生相對 132再通過、田所件到之數位波包訊號經過延遲控制單位 八牙貝刀凋制态133輸出端之訊號 ”應電流’待其經過低通濾波器135濾除 ΐΐ r 訊後，即可獲得為放大後之輸入波包 ν ^ 波包5凡说為射頻功率放大器13 8 ’之供應電流， 利用控制供應電流的方式來達成控制射頻功率放’大Ί 的目的’使得射頻功率放大器138，輸出載波 流端之變動波包訊號施予振幅調制。 " 在延遲IQ調制訊號處理路徑上，本發明發射機架構包 3 .延遲控制單位132、數位·類比轉換器136、I(j調制器 20 200803344 137、可調增盈放大器138及回授控制單元15〇，其中該回 授，制單元150包含波包偵測器151、類比數位棒換器152 與第一預先失真器153，該波包偵測器151偵測射頻功率 放大器138’之輸出端以產生回授波包訊號，經類比數位轉 ‘ 換裔152而將該回授波包訊號數位化，由第二預先失真器 15 3搔收數位化的回授波包訊號與該波包產生器經延遲的 數位波包訊號。 本發明將輸入之IQ訊號經過延遲控制單位132,並經由 _ 數位·類比轉換器136將延遲校正後的iq訊號轉變為相對 應之類比訊號，再藉由IQ調制器137產生IQ調制後之载 波，經可調增益放大器138放大後作為射頻功率放大器 138’的射頻輸入端訊號。上述可調增益放大器138之增益 由第二預先失真器153的輪出所決定，該第二預先失直哭 153接收類比數位轉換器152的輸出訊號(數位化的回授^ 包Λ號）與波包產生為131的輸出經延遲之訊號(數位波包 訊號），以產生一控制訊號控制該可調增益放大器138的 增益。在本發明的不同實施例中，輸入之IQ訊號亦可先經 ⑩過預先失真器，其輸出訊號再分別輸入波包產生器與數位-類比轉換器。在本發明的不同實施例中，输入之1(3訊號亦 可先經過延遲控制單位，其輸出訊號再分別輸入波包產生 器與數位_類比轉換器。 在詳細說明本發明的較佳實施例之後，熟悉談項技術 人士可清楚的暸解，在不脫離下述申請專利範圍與精神下 可進行各種變化與改變，而本發明亦不受限於說明書之所 舉實施例的實施方式。 200803344 【圖式簡單說明】 第-圖為-波包消除重建(腿)發射 第二圖為第-圖所示s類調制器之=之方塊圖。 ΐ三圖為經8類調制器並放大後波包4上圖±: =四圖為習知極座標調制架構之方塊圖。^圖。 ，五圖為本發明發射機架構之方塊圖。 第六圖為本發明處理波包訊號所需 之架構圖。 左，、#貝分調制器The micro-dandelion feedback controls the microwave emission to make the microwave emit linearity. Launch rack block diagram. In this embodiment of the present invention, the feedback control is used to improve the power amplifier 200803344 to have two paths # a path for delaying 1 〇 copper path, one path is wave packet signal processing, and the other amplifier is supplied with power processing The two paths simultaneously apply dual-end dynamics to the RF power packet signal processing path and the RF input terminal. In the ΐ 12 卜 delay control unit $ invention f-frame architecture includes: wave packet generator 124. In the present invention, the difference integral modulator 123 and the S-type modulation unit 122 pass the delay control number through an s-bit digital packet signal, and finally the _8 class '丨, the upper modulation 11 123 is converted into a second-order signal ^^ ϋ t M ^ ^ tsi!; „ , . ^ ^ ^ A 28 · As described above - 0ik 辇 ^, °D state i24 and the difference integral modulator 123 and # diagram description, no longer repeat here. People in delay IQ modulation The signal processing path is clearly included in the delay control unit 122, the age of you, the green i-mechanical package 127, the nQ that can be placed only * the jaw ratio converter 126, the IQ modulator mouth 曰 放大 放大 128 128 And the feedback control unit 14〇, the pottery control unit 140 includes a wave sentence detection crying], the middle and the enchantment mo, the analog digital converter 142, the second brother - the pre-distortion $ 143 'the wave packet detector 141 detects RF power = the output of the bulk 128' to generate the feedback wave packet signal, digitize the feedback packet signal through the converter M2, and receive the digitized feedback packet signal by the second pre-straight = 143 And the wave packet generator is delayed by the digital bit wave signal. The invention passes the input IQ signal through the delay control unit 122, and The digital-to-analog converter Π6 converts the delayed IQ signal into a corresponding analog signal, and then generates it by the IQ modulator 127] [Q-modulated carrier, which is amplified by the amplified basket and amplified by 128 as the RF The RF input signal of the power amplifier 128'. σσ The gain of the above-described adjustable gain amplification state 128 is determined by the output of the second predistorter 143, which receives the analog digital conversion 200803344 142 wheel The output signal (digitalized feedback packet signal) and the wave packet generate a delayed signal (digital wave packet signal) of the crying 121 to generate a gain of the adjustable gain amplifier 128. In the present invention: In the case of coherent palladium, the wheel is inserted: [Q signal can also pass through the delay control unit first, and then the bean packet is sent to the wave packet generator and the digital _ analog converter respectively. Eight, Tang spoon = the thirteenth picture It is shown that the present invention has a feedback control and an increase, and the shooter has a feedback control control system having two signal processing paths, and the path is another path for delay 1Q modulation signal processing, the two Road: kinetic energy rate The supply current of the amplifier and the RF input terminal are double-turned: 1. The delay (four) unit is two; the position control current source 134 and the low-pass filter coffee wave=transmission through the wave packet generator 131 to generate the relative 132 re-pass, the field The digital wave packet signal is delayed by the unit of the eight-toothed knives. The signal of the output of the 133 output is "should be current" and filtered by the low-pass filter 135 to obtain the amplified input. The wave packet ν ^ wave packet 5 is said to be the supply current of the RF power amplifier 13 8 ', and the control of the supply current is used to achieve the purpose of controlling the RF power amplifier 'big 使得' so that the RF power amplifier 138, the output carrier stream changes The wave packet signal is subjected to amplitude modulation. " In the delayed IQ modulation signal processing path, the transmitter architecture package 3. Delay control unit 132, digital to analog converter 136, I (j modulator 20 200803344 137, adjustable gain amplifier 138 and feedback control The unit 15 is configured to include a wave packet detector 151, an analog digital converter 152 and a first predistorter 153. The packet detector 151 detects the output of the RF power amplifier 138'. The terminal generates a feedback wave packet signal, digitizes the feedback wave packet signal by analogy digits, and digitizes the feedback packet signal and the wave packet by the second predistorter 15 3 . The generator delays the digital wave packet signal. The invention passes the input IQ signal through the delay control unit 132, and converts the delayed corrected iq signal into a corresponding analog signal via the _digital/analog converter 136, and then The IQ modulator 137 generates an IQ modulated carrier that is amplified by the adjustable gain amplifier 138 to be the RF input signal of the RF power amplifier 138. The gain of the adjustable gain amplifier 138 is derived by the second predistorter 153. As determined by the rotation, the second pre-deficient crying 153 receives the output signal of the analog-to-digital converter 152 (the digitized feedback packet) and the output of the wave packet is 131. The delayed signal (digital wave packet signal) In order to generate a control signal, the gain of the adjustable gain amplifier 138 is controlled. In different embodiments of the present invention, the input IQ signal may also pass through the 10 pre-distorter, and the output signal is separately input to the wave packet generator and Digital-to-analog converter. In different embodiments of the present invention, the input 1 (3 signal can also pass through the delay control unit first, and the output signal is separately input into the wave packet generator and the digital-to-analog converter. Various changes and modifications can be made without departing from the scope and spirit of the invention, and the present invention is not limited to the embodiments described in the specification. 200803344 [Simple description of the diagram] The first picture is - wave packet elimination reconstruction (leg) emission The second picture is the block diagram of the s type modulator shown in the figure - Figure 3 The modulator and the amplified wave packet 4 are shown above: ± Four graphs are block diagrams of the conventional polar coordinate modulation architecture. Figure 5. The fifth diagram is a block diagram of the transmitter architecture of the present invention. The architecture diagram required for the signal. Left, #贝分 modulator
第七圖為本發明發射機操作概念之示意圖。 第八圖為根據本發明的教示所實施的無線手 發機晶片之一種方塊圖。 、 第九圖為根據本發明的教示所實施的無線手持設備枚 發機晶片之另一種方塊圖。 第十圖為根據本發明的教示所實施的硬體實作完成董士 錯誤向量幅度(EVM)、鄰近通道功率比例（ACPR)以及直旋 功率轉換成射頻功率之轉換效率（ConvEff)之測試圖。 弟十一圖為本發明增加波包頻寬發射機架構之方i鬼 圖。 第十二圖為本發明具有回授控制發射機架構之方i鬼 圖。 第十三圖為本發明具有回授控制以及增加波包頻寬發 射機架構之方塊圖。 【主要元件符號說明】 101···波包偵測器 1()2…限制器 103···波包訊號 104···相位調制載波 22 200803344 105· •S類調制器 106· 107- ill· • 112· 113· 114· 115· 116· ® 117· 118· 121· 122· 123· 124· 126· 127· 128· 128, 131· 132· 133· 134· 135· 136· 137· 138· •切換式射頻功率放大器 •射頻調制載波 •波包產生器 .第一預先失真器及延遲控制單元 •差異積分調制器 •至少一位元控制電流源 •低通濾波器 •數位-類比轉換器 •IQ調制器 •射頻功率放大器 •波包產生器 •延遲控制單元 •差異積分調制器 •S類調制器 •數位-類比轉換器 •IQ調制器 •可調增益放大器 …射頻功率放大器 •波包產生器 •延遲控制單元 •差異積分調制器 •至少一位元控制電流源 •低通濾、波器 •數位-類比轉換器 •IQ調制器 ••可調增益放大器 23 200803344 138’…射頻功率放大器 140· •回授控制單元 141· 142· • 143· 150· 151· 152· 153· ® 201· 202· 203· 401. 402· 403· 404· 501· 502· 503· 504· 505· 506· 507· 508· .509· 510· 701· •波包偵測器 •類比-數位轉換器 •第二預先失真器 •回授控制單元 •波包偵測器 •類比-數位轉換器 •第二預先失真器 •脈衝寬度調制器 •切換式放大器 •低通濾波器 •直角座標至極座標轉換器 •線性電壓調制器 •頻率產生器 •射頻功率放大器 •波包產生器 •差異積分調制器 •切換式放大器 •低通濾波器 •第一預先失真器 •數位·類比轉換器 •IQ調制器 •射頻功率放大器 •基頻處理器 •IQ調制微波發射機架構 ••輸出訊號振幅對波包振幅之特性 24 200803344 702…輸出訊號振幅對預先失真後IQ調制訊號振幅之特 性 7 0 3…輸出訊號振幅對輸入訊號振幅之線性特性 801…基頻處理器 802…射頻處理器 803…射頻功率放大器 804…天線 901…提升多模操作效率基頻處理器晶片 902…手持設備收發機晶片The seventh figure is a schematic diagram of the operation concept of the transmitter of the present invention. Figure 8 is a block diagram of a wireless hand-held wafer implemented in accordance with the teachings of the present invention. The ninth diagram is another block diagram of a wireless handset printer chip implemented in accordance with the teachings of the present invention. The tenth figure is a test diagram of the hardware implementation of the Dongshi error vector magnitude (EVM), the adjacent channel power ratio (ACPR), and the conversion efficiency of the direct-turn power into the radio frequency (ConvEff) implemented according to the teachings of the present invention. . The eleventh figure is a method for adding the wave packet bandwidth transmitter architecture of the present invention. The twelfth figure is a diagram of the present invention having a feedback control transmitter architecture. Figure 13 is a block diagram of the present invention having feedback control and an increase in the bandwidth of the wave packet. [Description of main component symbols] 101···Bag packet detector 1()2...limiter 103···wave packet signal 104···phase modulation carrier 22 200803344 105·•S-type modulator 106· 107- ill · • 112· 113· 114· 115· 116· ® 117· 118· 121· 122· 123· 124· 126· 127· 128· 128, 131· 132· 133· 134· 135· 136· 137· 138· • Switched RF Power Amplifier • RF Modulated Carrier • Wave Packet Generator. First Predistorter and Delay Control Unit • Differential Integral Modulator • At least one bit control current source • Low pass filter • Digital to analog converter • IQ Modulators • RF Power Amplifiers • Wave Packet Generators • Delay Control Units • Differential Integral Modulators • Class S Modulators • Digital - Analog Converters • IQ Modulators • Adjustable Gain Amplifiers... RF Power Amplifiers • Wave Packet Generators • Delay Control Unit • Differential Integral Modulator • At least one bit control current source • Low pass filter, wave • Digital to analog converter • IQ modulator • Adjustable gain amplifier 23 200803344 138'... RF power amplifier 140· Feedback control unit 141· 142· • 143· 150· 151· 152· 153· ® 201· 202· 203· 401. 402· 403· 404· 501· 502· 503· 504· 505· 506· 507· 508· .509· 510· 701· • Wave packet detector • Analog-to-digital converter • Second predistorter • Feedback control unit • Wave packet detector • Analog-to-digital converter • Second predistorter • Pulse Width Modulator • Switching Amplifier • Low Pass Filter • Right Angle Coordinate to Polar Coordinate Converter • Linear Voltage Modulator • Frequency Generator • RF Power Amplifier • Wave Packet Generator • Differential Integrator • Switching Amplifier • Low Pass Filter • First predistorter • Digital and analog converter • IQ modulator • RF power amplifier • Baseband processor • IQ modulation microwave transmitter architecture • Output signal amplitude vs. wave packet amplitude characteristics 24 200803344 702... Output signal The amplitude vs. the characteristic of the amplitude of the IQ modulated signal before the distortion 7 0 3...the linear characteristic of the output signal amplitude to the amplitude of the input signal 801...the baseband processor 802...the RF processor 803...the RF power Amplifier 804 ... 901 ... antenna enhance the operating efficiency of multimode baseband processor wafer handheld device transceiver 902 ... wafer
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