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Application filed by Powerchip Semiconductor CorpfiledCriticalPowerchip Semiconductor Corp
Priority to TW95120523ApriorityCriticalpatent/TWI302741B/en
Publication of TW200746399ApublicationCriticalpatent/TW200746399A/en
Application grantedgrantedCritical
Publication of TWI302741BpublicationCriticalpatent/TWI302741B/en
A NAND type non-volatile memory having a plurality of memory unit rows is provided. Each of the memory unit rows includes a source region, a drain region, a plurality of memory units, a plurality of pass gates, a first select transistor and a second select transistor. The source region and the drain region are disposed in the substrate. Memory units are disposed between the source region and the drain region on the substrate. Each of memory units has a memory cell and a transistor. The memory cell and the transistor are arranged with parallel connection. The pass gates are disposed between two adjacent memory units on the substrate to connect memory units in series. The first and the second select transistor are disposed on the sidewall of the outermost two memory units and adjacent to the source region and the drain region respectively.
TW95120523A2006-06-092006-06-09Nand type non-volatile memory and manufacturing method and operstion method thereof
TWI302741B
(en)
An isolation-less, contact-less array of nonvolatile memory cells each having a floating gate for storage of charges, and methods of manufacturing, and operating therefor