TW200721496A - A method of manufacturing a thin film transistor matrix substrate - Google Patents

A method of manufacturing a thin film transistor matrix substrate

Info

Publication number
TW200721496A
TW200721496A TW094141354A TW94141354A TW200721496A TW 200721496 A TW200721496 A TW 200721496A TW 094141354 A TW094141354 A TW 094141354A TW 94141354 A TW94141354 A TW 94141354A TW 200721496 A TW200721496 A TW 200721496A
Authority
TW
Taiwan
Prior art keywords
channel region
thin film
manufacturing
film transistor
matrix substrate
Prior art date
Application number
TW094141354A
Other languages
Chinese (zh)
Other versions
TWI290372B (en
Inventor
Chih-Chun Yang
Liu-Chung Lee
Tung-Yu Chen
Original Assignee
Au Optronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Au Optronics Corp filed Critical Au Optronics Corp
Priority to TW94141354A priority Critical patent/TWI290372B/en
Publication of TW200721496A publication Critical patent/TW200721496A/en
Application granted granted Critical
Publication of TWI290372B publication Critical patent/TWI290372B/en

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  • Thin Film Transistor (AREA)

Abstract

A method of manufacturing a thin film transistor matrix substrate is provided. The method at least comprises forming a channel region on the gate dielectric lying on the gate electrode, wherein the gate electrode is wider than the channel region. Thereafter, at least two contact holes are formed in the insulation layer covering the channel region to expose a portion of the channel region surface. An ion implantation process is performed to form ohmic contact on the exposed channel region. A conformal transparent conductive layer is formed covering on all structures. A lithographic/etching process is performed to define source/drain, pixel, gate electrode pad and data electrode pad.
TW94141354A 2005-11-24 2005-11-24 A method of manufacturing a thin film transistor matrix substrate TWI290372B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW94141354A TWI290372B (en) 2005-11-24 2005-11-24 A method of manufacturing a thin film transistor matrix substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW94141354A TWI290372B (en) 2005-11-24 2005-11-24 A method of manufacturing a thin film transistor matrix substrate

Publications (2)

Publication Number Publication Date
TW200721496A true TW200721496A (en) 2007-06-01
TWI290372B TWI290372B (en) 2007-11-21

Family

ID=39301433

Family Applications (1)

Application Number Title Priority Date Filing Date
TW94141354A TWI290372B (en) 2005-11-24 2005-11-24 A method of manufacturing a thin film transistor matrix substrate

Country Status (1)

Country Link
TW (1) TWI290372B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI576646B (en) * 2015-04-30 2017-04-01 群創光電股份有限公司 Display device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101506304B1 (en) 2009-11-27 2015-03-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Semiconductor device and method for manufacturing the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI576646B (en) * 2015-04-30 2017-04-01 群創光電股份有限公司 Display device
US10325931B2 (en) 2015-04-30 2019-06-18 Innolux Corporation Display device
US10957715B2 (en) 2015-04-30 2021-03-23 Innolux Corporation Display device

Also Published As

Publication number Publication date
TWI290372B (en) 2007-11-21

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees