TW200717523A - Data input device for use in semiconductor memory device - Google Patents

Data input device for use in semiconductor memory device

Info

Publication number
TW200717523A
TW200717523A TW095123960A TW95123960A TW200717523A TW 200717523 A TW200717523 A TW 200717523A TW 095123960 A TW095123960 A TW 095123960A TW 95123960 A TW95123960 A TW 95123960A TW 200717523 A TW200717523 A TW 200717523A
Authority
TW
Taiwan
Prior art keywords
synchronization
data
data input
semiconductor memory
memory device
Prior art date
Application number
TW095123960A
Other languages
Chinese (zh)
Other versions
TWI307889B (en
Inventor
Beom-Ju Shin
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of TW200717523A publication Critical patent/TW200717523A/en
Application granted granted Critical
Publication of TWI307889B publication Critical patent/TWI307889B/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10—Aspects relating to interfaces of memory device to external buses
    • G11C2207/107—Serial-parallel conversion of data or prefetch

Abstract

A data input device for use in a semiconductor memory device includes a synchronization control unit for receiving a data strobe signal with which a data is synchronized in order to generate a synchronization signal in response to a driving signal; and a synchronization unit for storing internal data input sequentially one-bit by one-bit into a plurality of synchronous storing elements and asynchronous storing elements and for outputting the stored data as parallel-typed aligned data all at once in synchronization with the synchronization signal.
TW095123960A 2005-09-29 2006-06-30 Data input device for use in semiconductor memory device TWI307889B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20050090882 2005-09-29
KR1020060026483A KR100798794B1 (en) 2005-09-29 2006-03-23 Semiconductor memory device of data input device

Publications (2)

Publication Number Publication Date
TW200717523A true TW200717523A (en) 2007-05-01
TWI307889B TWI307889B (en) 2009-03-21

Family

ID=37959251

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095123960A TWI307889B (en) 2005-09-29 2006-06-30 Data input device for use in semiconductor memory device

Country Status (3)

Country Link
KR (1) KR100798794B1 (en)
CN (1) CN100580808C (en)
TW (1) TWI307889B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008132065A1 (en) * 2007-04-28 2008-11-06 Mediastack Group Ltd. Compact communication apparatus
KR101132800B1 (en) 2010-06-09 2012-04-02 주식회사 하이닉스반도체 Data input circuit

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3394111B2 (en) * 1995-05-25 2003-04-07 株式会社 沖マイクロデザイン Data input circuit of semiconductor memory device
KR0186102B1 (en) * 1995-12-12 1999-04-15 문정환 Data input circuit of semiconductor memory
KR100239713B1 (en) * 1996-12-28 2000-01-15 김영환 Data input circuit for semiconductor memory
KR100575860B1 (en) * 1999-06-28 2006-05-03 주식회사 하이닉스반도체 Data input control circuit in synchronous memory device
KR100543915B1 (en) * 2003-05-16 2006-01-23 주식회사 하이닉스반도체 Data input circuit in memory device

Also Published As

Publication number Publication date
CN1941189A (en) 2007-04-04
CN100580808C (en) 2010-01-13
TWI307889B (en) 2009-03-21
KR100798794B1 (en) 2008-01-29
KR20070036593A (en) 2007-04-03

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees