TW200713519A - Non-volatile memory and the fabricating method thereof - Google Patents

Non-volatile memory and the fabricating method thereof

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Publication number
TW200713519A
TW200713519A TW094133514A TW94133514A TW200713519A TW 200713519 A TW200713519 A TW 200713519A TW 094133514 A TW094133514 A TW 094133514A TW 94133514 A TW94133514 A TW 94133514A TW 200713519 A TW200713519 A TW 200713519A
Authority
TW
Taiwan
Prior art keywords
substrate
volatile memory
trench
fabricating method
doped region
Prior art date
Application number
TW094133514A
Other languages
Chinese (zh)
Other versions
TWI281729B (en
Inventor
Hsin-Heng Wang
Sheng-Fu Yang
Original Assignee
Powerchip Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Powerchip Semiconductor Corp filed Critical Powerchip Semiconductor Corp
Priority to TW94133514A priority Critical patent/TWI281729B/en
Publication of TW200713519A publication Critical patent/TW200713519A/en
Application granted granted Critical
Publication of TWI281729B publication Critical patent/TWI281729B/en

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  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

A method of fabricating non-volatile memory is described. First, a substrate is provided. Next, a first doped region which is at a distance from the substrate is formed in the substrate. Then, a trench which the bottom of reveals the first doped region is formed in the substrate. Later on, a charge storage layer is formed on the both sides of the trench, and the top of the charge storage layer is lower than that of the substrate. Afterwards, a gate is formed in the trench. Then, a second doped region is formed in the top of the substrate on the both sides of the trench.
TW94133514A 2005-09-27 2005-09-27 Non-volatile memory and the fabricating method thereof TWI281729B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW94133514A TWI281729B (en) 2005-09-27 2005-09-27 Non-volatile memory and the fabricating method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW94133514A TWI281729B (en) 2005-09-27 2005-09-27 Non-volatile memory and the fabricating method thereof

Publications (2)

Publication Number Publication Date
TW200713519A true TW200713519A (en) 2007-04-01
TWI281729B TWI281729B (en) 2007-05-21

Family

ID=38751637

Family Applications (1)

Application Number Title Priority Date Filing Date
TW94133514A TWI281729B (en) 2005-09-27 2005-09-27 Non-volatile memory and the fabricating method thereof

Country Status (1)

Country Link
TW (1) TWI281729B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9385240B1 (en) 2015-03-03 2016-07-05 Macronix International Co., Ltd. Memory device and method for fabricating the same
TWI556412B (en) * 2015-03-03 2016-11-01 旺宏電子股份有限公司 Memory device and method for fabricating the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9385240B1 (en) 2015-03-03 2016-07-05 Macronix International Co., Ltd. Memory device and method for fabricating the same
TWI556412B (en) * 2015-03-03 2016-11-01 旺宏電子股份有限公司 Memory device and method for fabricating the same

Also Published As

Publication number Publication date
TWI281729B (en) 2007-05-21

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees