TW200709280A - Method of smoothening dielectric layer - Google Patents

Method of smoothening dielectric layer

Info

Publication number
TW200709280A
TW200709280A TW095102785A TW95102785A TW200709280A TW 200709280 A TW200709280 A TW 200709280A TW 095102785 A TW095102785 A TW 095102785A TW 95102785 A TW95102785 A TW 95102785A TW 200709280 A TW200709280 A TW 200709280A
Authority
TW
Taiwan
Prior art keywords
dielectric layer
smoothening
chamber
precursors
substrate
Prior art date
Application number
TW095102785A
Other languages
English (en)
Other versions
TWI294643B (en
Inventor
Wen-Long Lee
Jun Wu
Shih-Chi Lin
Chyi-Tsong Ni
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Publication of TW200709280A publication Critical patent/TW200709280A/zh
Application granted granted Critical
Publication of TWI294643B publication Critical patent/TWI294643B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
TW095102785A 2005-08-23 2006-01-25 Method of smoothening dielectric layer TWI294643B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/208,612 US7635651B2 (en) 2005-08-23 2005-08-23 Method of smoothening dielectric layer

Publications (2)

Publication Number Publication Date
TW200709280A true TW200709280A (en) 2007-03-01
TWI294643B TWI294643B (en) 2008-03-11

Family

ID=41429261

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095102785A TWI294643B (en) 2005-08-23 2006-01-25 Method of smoothening dielectric layer

Country Status (2)

Country Link
US (1) US7635651B2 (zh)
TW (1) TWI294643B (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8709551B2 (en) * 2010-03-25 2014-04-29 Novellus Systems, Inc. Smooth silicon-containing films
US9028924B2 (en) 2010-03-25 2015-05-12 Novellus Systems, Inc. In-situ deposition of film stacks
US8741394B2 (en) * 2010-03-25 2014-06-03 Novellus Systems, Inc. In-situ deposition of film stacks
US9165788B2 (en) 2012-04-06 2015-10-20 Novellus Systems, Inc. Post-deposition soft annealing
US9117668B2 (en) 2012-05-23 2015-08-25 Novellus Systems, Inc. PECVD deposition of smooth silicon films
US9388491B2 (en) 2012-07-23 2016-07-12 Novellus Systems, Inc. Method for deposition of conformal films with catalysis assisted low temperature CVD
US8895415B1 (en) 2013-05-31 2014-11-25 Novellus Systems, Inc. Tensile stressed doped amorphous silicon

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4681653A (en) * 1984-06-01 1987-07-21 Texas Instruments Incorporated Planarized dielectric deposited using plasma enhanced chemical vapor deposition
US4572841A (en) * 1984-12-28 1986-02-25 Rca Corporation Low temperature method of deposition silicon dioxide
US5252520A (en) * 1991-10-31 1993-10-12 At&T Bell Laboratories Integrated circuit interlevel dielectric wherein the first and second dielectric layers are formed with different densities
US5591681A (en) * 1994-06-03 1997-01-07 Advanced Micro Devices, Inc. Method for achieving a highly reliable oxide film
US5605859A (en) * 1995-07-05 1997-02-25 Taiwan Semiconductor Manufacturing Company, Ltd. Method of making insulator structure for polysilicon resistors
US5792705A (en) * 1996-06-28 1998-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Optimized planarization process for SOG filled vias
US5786278A (en) * 1996-08-27 1998-07-28 Watkins-Johnson Company Method of stress-relieving silicon oxide films
US5741740A (en) * 1997-06-12 1998-04-21 Taiwan Semiconductor Manufacturing Company, Ltd. Shallow trench isolation (STI) method employing gap filling silicon oxide dielectric layer
US6194038B1 (en) * 1998-03-20 2001-02-27 Applied Materials, Inc. Method for deposition of a conformal layer on a substrate
US6218288B1 (en) * 1998-05-11 2001-04-17 Micron Technology, Inc. Multiple step methods for forming conformal layers
US20040067631A1 (en) * 2002-10-03 2004-04-08 Haowen Bu Reduction of seed layer roughness for use in forming SiGe gate electrode
US6808748B2 (en) * 2003-01-23 2004-10-26 Applied Materials, Inc. Hydrogen assisted HDP-CVD deposition process for aggressive gap-fill technology

Also Published As

Publication number Publication date
US7635651B2 (en) 2009-12-22
US20060189149A1 (en) 2006-08-24
TWI294643B (en) 2008-03-11

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees