TW200703425A - Circuit board and method for fabricating the same - Google Patents

Circuit board and method for fabricating the same

Info

Publication number
TW200703425A
TW200703425A TW094122282A TW94122282A TW200703425A TW 200703425 A TW200703425 A TW 200703425A TW 094122282 A TW094122282 A TW 094122282A TW 94122282 A TW94122282 A TW 94122282A TW 200703425 A TW200703425 A TW 200703425A
Authority
TW
Taiwan
Prior art keywords
layer
composite metal
circuit
metal layer
bumps
Prior art date
Application number
TW094122282A
Other languages
Chinese (zh)
Other versions
TWI305373B (en
Inventor
Ching-Fu Horng
Wu-Chou Hsu
Original Assignee
Advanced Semiconductor Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW94122282A priority Critical patent/TWI305373B/en
Publication of TW200703425A publication Critical patent/TW200703425A/en
Application granted granted Critical
Publication of TWI305373B publication Critical patent/TWI305373B/en

Links

Abstract

A circuit board and method for fabricating the same are provided with following steps. First, a core sheet, a first composite metal layer, a second composite metal layer, a first dielectric layer and a second dielectric layer are provided. Wherein, a first patterned circuit layer and a second patterned circuit layer is disposed respectively on the upper and lower surface of the core sheet, and the first dielectric layer and the second dielectric layer possess a plurality of through holes. Then, the first composite metal layer and the second composite metal layer are patterned to form a plurality of fist bumps and the second bumps, respectively. After that, compress the first composite metal layer, the second composite metal layer, the first dielectric layer, the second dielectric layer and the core sheet together. Next, the metal layers of the surfaces of the first composite metal layer and the second composite metal layer are patterned to form a third circuit layer and fourth circuit layer, respectively. Wherein, the third circuit layer is electrically connected to the first circuit layer through the first bumps, and the fourth circuit layer is electrically connected to the second circuit layer through the second bumps.
TW94122282A 2005-07-01 2005-07-01 Circuit board and method for fabricating the same TWI305373B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW94122282A TWI305373B (en) 2005-07-01 2005-07-01 Circuit board and method for fabricating the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW94122282A TWI305373B (en) 2005-07-01 2005-07-01 Circuit board and method for fabricating the same

Publications (2)

Publication Number Publication Date
TW200703425A true TW200703425A (en) 2007-01-16
TWI305373B TWI305373B (en) 2009-01-11

Family

ID=45071132

Family Applications (1)

Application Number Title Priority Date Filing Date
TW94122282A TWI305373B (en) 2005-07-01 2005-07-01 Circuit board and method for fabricating the same

Country Status (1)

Country Link
TW (1) TWI305373B (en)

Also Published As

Publication number Publication date
TWI305373B (en) 2009-01-11

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