TW200625097A - Data file storing multiple date types with controlled data access - Google Patents

Data file storing multiple date types with controlled data access

Info

Publication number
TW200625097A
TW200625097A TW094139530A TW94139530A TW200625097A TW 200625097 A TW200625097 A TW 200625097A TW 094139530 A TW094139530 A TW 094139530A TW 94139530 A TW94139530 A TW 94139530A TW 200625097 A TW200625097 A TW 200625097A
Authority
TW
Taiwan
Prior art keywords
storing multiple
file storing
data file
data
date types
Prior art date
Application number
TW094139530A
Other languages
English (en)
Inventor
Erdem Hokenek
Mayan Moudgill
C John Glossner
Michael J Schulte
Original Assignee
Sandbridge Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sandbridge Technologies Inc filed Critical Sandbridge Technologies Inc
Publication of TW200625097A publication Critical patent/TW200625097A/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30112—Register structure comprising data of variable length
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Executing Machine-Instructions (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
TW094139530A 2004-11-17 2005-11-11 Data file storing multiple date types with controlled data access TW200625097A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US62864704P 2004-11-17 2004-11-17

Publications (1)

Publication Number Publication Date
TW200625097A true TW200625097A (en) 2006-07-16

Family

ID=36615365

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094139530A TW200625097A (en) 2004-11-17 2005-11-11 Data file storing multiple date types with controlled data access

Country Status (5)

Country Link
US (1) US20090276432A1 (zh)
EP (1) EP1825383B1 (zh)
KR (2) KR20070097024A (zh)
TW (1) TW200625097A (zh)
WO (1) WO2006071385A2 (zh)

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US8074051B2 (en) * 2004-04-07 2011-12-06 Aspen Acquisition Corporation Multithreaded processor with multiple concurrent pipelines per thread
EP2069947A4 (en) * 2006-09-26 2013-10-09 Qualcomm Inc APPLICATION OF MATRIX INVERSION SOFTWARE IN A WIRELESS COMMUNICATION SYSTEM
WO2008060948A2 (en) * 2006-11-10 2008-05-22 Sandbridge Technologies, Inc. Method and system for parallelization of pipelined computations
EP2602710A1 (en) * 2007-11-05 2013-06-12 Aspen Acquisition Corporation Method of encoding register instruction fields
US7979681B2 (en) * 2007-11-20 2011-07-12 Qualcomm Incorporated System and method of selectively accessing a register file
KR20100120133A (ko) * 2008-01-30 2010-11-12 샌드브리지 테크놀로지스, 인코포레이티드 멀티-프로세서 동기화를 활성화하는 방법
KR20100126690A (ko) * 2008-02-18 2010-12-02 샌드브리지 테크놀로지스, 인코포레이티드 널-종료 문자열 동작을 가속화하는 방법
KR20100133964A (ko) * 2008-03-13 2010-12-22 아스펜 액퀴지션 코포레이션 유효 어레이를 비활성화함으로써 전력을 절약하기 위한 방법
CN101324837B (zh) * 2008-07-21 2010-06-23 北京大学 一种微处理器内部寄存器堆的设计和访问方法
WO2010017263A1 (en) 2008-08-06 2010-02-11 Sandbridge Technologies, Inc. Haltable and restartable dma engine
KR101700405B1 (ko) * 2010-03-22 2017-01-26 삼성전자주식회사 레지스터, 프로세서 및 프로세서 제어 방법
KR101801920B1 (ko) 2010-12-17 2017-12-28 삼성전자주식회사 동적 클러스터링이 가능한 레지스터 파일 및 동적 클러스터링이 가능한 레지스터 파일을 이용한 재구성 가능 컴퓨팅 장치
KR101949417B1 (ko) 2011-12-02 2019-02-20 삼성전자주식회사 프로세서, 명령어 생성 장치 및 방법
US9996353B2 (en) 2015-02-26 2018-06-12 International Business Machines Corporation Universal history buffer to support multiple register types
US9971604B2 (en) 2015-02-26 2018-05-15 International Business Machines Corporation History buffer for multiple-field registers
US10067766B2 (en) * 2015-02-26 2018-09-04 International Business Machines Corporation History buffer with hybrid entry support for multiple-field registers
US10909015B2 (en) * 2016-12-30 2021-02-02 Intel Corporation Apparatus and method for generating performance monitoring metrics
US11327733B2 (en) * 2020-05-27 2022-05-10 Blaize, Inc. Method of using multidimensional blockification to optimize computer program and device thereof

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US6370623B1 (en) * 1988-12-28 2002-04-09 Philips Electronics North America Corporation Multiport register file to accommodate data of differing lengths
US5590352A (en) * 1994-04-26 1996-12-31 Advanced Micro Devices, Inc. Dependency checking and forwarding of variable width operands
US5819057A (en) * 1995-01-25 1998-10-06 Advanced Micro Devices, Inc. Superscalar microprocessor including an instruction alignment unit with limited dispatch to decode units
US6006315A (en) * 1996-10-18 1999-12-21 Samsung Electronics Co., Ltd. Computer methods for writing a scalar value to a vector
US6272257B1 (en) * 1997-04-30 2001-08-07 Canon Kabushiki Kaisha Decoder of variable length codes
US6061782A (en) * 1997-11-29 2000-05-09 Ip First Llc Mechanism for floating point to integer conversion with RGB bias multiply
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US6343356B1 (en) * 1998-10-09 2002-01-29 Bops, Inc. Methods and apparatus for dynamic instruction controlled reconfiguration register file with extended precision
US6668316B1 (en) * 1999-02-17 2003-12-23 Elbrus International Limited Method and apparatus for conflict-free execution of integer and floating-point operations with a common register file
US6889312B1 (en) * 2001-04-02 2005-05-03 Advanced Micro Devices, Inc. Selective zero extension based on operand size
US6948051B2 (en) * 2001-05-15 2005-09-20 International Business Machines Corporation Method and apparatus for reducing logic activity in a microprocessor using reduced bit width slices that are enabled or disabled depending on operation width
US6968445B2 (en) * 2001-12-20 2005-11-22 Sandbridge Technologies, Inc. Multithreaded processor with efficient processing for convergence device applications
EP1499957B1 (en) * 2002-04-10 2009-09-23 Nxp B.V. Data processing system with multiple register banks
US6912623B2 (en) * 2002-06-04 2005-06-28 Sandbridge Technologies, Inc. Method and apparatus for multithreaded cache with simplified implementation of cache replacement policy
US6990557B2 (en) * 2002-06-04 2006-01-24 Sandbridge Technologies, Inc. Method and apparatus for multithreaded cache with cache eviction based on thread identifier
US6904511B2 (en) * 2002-10-11 2005-06-07 Sandbridge Technologies, Inc. Method and apparatus for register file port reduction in a multithreaded processor
US6925643B2 (en) * 2002-10-11 2005-08-02 Sandbridge Technologies, Inc. Method and apparatus for thread-based memory access in a multithreaded processor
US6842848B2 (en) * 2002-10-11 2005-01-11 Sandbridge Technologies, Inc. Method and apparatus for token triggered multithreading
US6971103B2 (en) * 2002-10-15 2005-11-29 Sandbridge Technologies, Inc. Inter-thread communications using shared interrupt register
JP2006529043A (ja) * 2003-05-09 2006-12-28 サンドブリッジ テクノロジーズ インコーポレーテッド 飽和あり、または飽和なしで、オペランドの積和を実行するプロセッサ簡約ユニット
US7428567B2 (en) * 2003-07-23 2008-09-23 Sandbridge Technologies, Inc. Arithmetic unit for addition or subtraction with preliminary saturation detection
US7251737B2 (en) * 2003-10-31 2007-07-31 Sandbridge Technologies, Inc. Convergence device with dynamic program throttling that replaces noncritical programs with alternate capacity programs based on power indicator
US7797363B2 (en) * 2004-04-07 2010-09-14 Sandbridge Technologies, Inc. Processor having parallel vector multiply and reduce operations with sequential semantics
US7475222B2 (en) * 2004-04-07 2009-01-06 Sandbridge Technologies, Inc. Multi-threaded processor having compound instruction and operation formats
US8074051B2 (en) * 2004-04-07 2011-12-06 Aspen Acquisition Corporation Multithreaded processor with multiple concurrent pipelines per thread

Also Published As

Publication number Publication date
US20090276432A1 (en) 2009-11-05
KR20070097024A (ko) 2007-10-02
KR20120135442A (ko) 2012-12-13
WO2006071385A2 (en) 2006-07-06
EP1825383A4 (en) 2009-12-23
WO2006071385A3 (en) 2009-04-09
EP1825383A2 (en) 2007-08-29
KR101371931B1 (ko) 2014-03-10
EP1825383B1 (en) 2015-04-15

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