TW200612342A - Methods and apparatus for task management in a multi-processor system - Google Patents

Methods and apparatus for task management in a multi-processor system

Info

Publication number
TW200612342A
TW200612342A TW094105114A TW94105114A TW200612342A TW 200612342 A TW200612342 A TW 200612342A TW 094105114 A TW094105114 A TW 094105114A TW 94105114 A TW94105114 A TW 94105114A TW 200612342 A TW200612342 A TW 200612342A
Authority
TW
Taiwan
Prior art keywords
methods
processor
processor system
task management
tasks
Prior art date
Application number
TW094105114A
Other languages
English (en)
Chinese (zh)
Inventor
Keisuke Inoue
Tatsuya Iwamoto
Masahiro Yasue
Original Assignee
Sony Computer Entertainment Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Computer Entertainment Inc filed Critical Sony Computer Entertainment Inc
Publication of TW200612342A publication Critical patent/TW200612342A/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5038—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/48—Indexing scheme relating to G06F9/48
    • G06F2209/483—Multiproc
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/48—Indexing scheme relating to G06F9/48
    • G06F2209/484—Precedence
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
  • Exchange Systems With Centralized Control (AREA)
TW094105114A 2004-02-20 2005-02-18 Methods and apparatus for task management in a multi-processor system TW200612342A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/783,246 US7614053B2 (en) 2004-02-20 2004-02-20 Methods and apparatus for task management in a multi-processor system

Publications (1)

Publication Number Publication Date
TW200612342A true TW200612342A (en) 2006-04-16

Family

ID=34861183

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094105114A TW200612342A (en) 2004-02-20 2005-02-18 Methods and apparatus for task management in a multi-processor system

Country Status (7)

Country Link
US (1) US7614053B2 (cg-RX-API-DMAC7.html)
EP (1) EP1716486B1 (cg-RX-API-DMAC7.html)
JP (1) JP4526412B2 (cg-RX-API-DMAC7.html)
AT (1) ATE431943T1 (cg-RX-API-DMAC7.html)
DE (1) DE602005014540D1 (cg-RX-API-DMAC7.html)
TW (1) TW200612342A (cg-RX-API-DMAC7.html)
WO (1) WO2005081105A2 (cg-RX-API-DMAC7.html)

Cited By (1)

* Cited by examiner, † Cited by third party
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CN102341780A (zh) * 2009-03-17 2012-02-01 高通股份有限公司 实时多线程调度器及调度方法

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CN102341780B (zh) * 2009-03-17 2015-11-25 高通股份有限公司 实时多线程调度器及调度方法
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Also Published As

Publication number Publication date
ATE431943T1 (de) 2009-06-15
DE602005014540D1 (de) 2009-07-02
US7614053B2 (en) 2009-11-03
JP2005235228A (ja) 2005-09-02
WO2005081105A3 (en) 2006-08-10
US20050188373A1 (en) 2005-08-25
WO2005081105A2 (en) 2005-09-01
EP1716486A2 (en) 2006-11-02
WO2005081105B1 (en) 2006-09-28
EP1716486B1 (en) 2009-05-20
JP4526412B2 (ja) 2010-08-18

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