TW200607057A - Lead frame base for semiconductor packaging process - Google Patents

Lead frame base for semiconductor packaging process

Info

Publication number
TW200607057A
TW200607057A TW093124007A TW93124007A TW200607057A TW 200607057 A TW200607057 A TW 200607057A TW 093124007 A TW093124007 A TW 093124007A TW 93124007 A TW93124007 A TW 93124007A TW 200607057 A TW200607057 A TW 200607057A
Authority
TW
Taiwan
Prior art keywords
lead frame
frame base
predetermined areas
packaging process
semiconductor packaging
Prior art date
Application number
TW093124007A
Other languages
Chinese (zh)
Other versions
TWI246752B (en
Inventor
Pei-Yi Lin
Hsung-Zen Hung
Chia-Pin Chung
Chin-Fa Chen
Kun-Ming Huang
Original Assignee
Siliconware Precision Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siliconware Precision Industries Co Ltd filed Critical Siliconware Precision Industries Co Ltd
Priority to TW093124007A priority Critical patent/TWI246752B/en
Application granted granted Critical
Publication of TWI246752B publication Critical patent/TWI246752B/en
Publication of TW200607057A publication Critical patent/TW200607057A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)

Abstract

A lead frame base for a semiconductor packaging process is used to remove resin residues in an encapsulation mold. The lead frame base includes a body having a plurality of predetermined areas for being filled with a resin, wherein the predetermined areas correspond to a plurality of mold cavities of the encapsulation mold respectively; a plurality of first openings each formed substantially at a central position of each of the predetermined areas; a plurality of second openings each formed at a corner position of each of the predetermined areas; and a plurality of flash cavities connected to the second openings and corresponding to a plurality of air vents of the encapsulation mold respectively. This lead frame base has improved performance on resin removal as compared to a conventional lead frame base.
TW093124007A 2004-08-11 2004-08-11 Lead frame base for semiconductor packaging process TWI246752B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW093124007A TWI246752B (en) 2004-08-11 2004-08-11 Lead frame base for semiconductor packaging process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW093124007A TWI246752B (en) 2004-08-11 2004-08-11 Lead frame base for semiconductor packaging process

Publications (2)

Publication Number Publication Date
TWI246752B TWI246752B (en) 2006-01-01
TW200607057A true TW200607057A (en) 2006-02-16

Family

ID=37193819

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093124007A TWI246752B (en) 2004-08-11 2004-08-11 Lead frame base for semiconductor packaging process

Country Status (1)

Country Link
TW (1) TWI246752B (en)

Also Published As

Publication number Publication date
TWI246752B (en) 2006-01-01

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees