TW200536242A - High-efficiency high-boost-ratio DC/DC converter with reduced peak switch voltage stress - Google Patents

High-efficiency high-boost-ratio DC/DC converter with reduced peak switch voltage stress Download PDF

Info

Publication number
TW200536242A
TW200536242A TW93111433A TW93111433A TW200536242A TW 200536242 A TW200536242 A TW 200536242A TW 93111433 A TW93111433 A TW 93111433A TW 93111433 A TW93111433 A TW 93111433A TW 200536242 A TW200536242 A TW 200536242A
Authority
TW
Taiwan
Prior art keywords
circuit
voltage
efficiency
output
converter
Prior art date
Application number
TW93111433A
Other languages
Chinese (zh)
Other versions
TWI239136B (en
Inventor
Rong-Jong Wai
Rou-Yong Duan
Chung-You Lin
Original Assignee
Wai Zheng Zhong
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wai Zheng Zhong filed Critical Wai Zheng Zhong
Priority to TW93111433A priority Critical patent/TWI239136B/en
Application granted granted Critical
Publication of TWI239136B publication Critical patent/TWI239136B/en
Publication of TW200536242A publication Critical patent/TW200536242A/en

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/56Power conversion systems, e.g. maximum power point trackers

Abstract

The aim of this invention is to develop a high-efficiency high-boost-ratio DC/DC converter with reduced peak switch voltage stress. In general, a high-boost-ratio DC/DC converter is employed for many applications via the power source of low-voltage batteries. For examples, a high intensity discharge (HID) lamp, the high-voltage dc bus of an uninterruptible power supply (UPS), a travelling wave tube amplifier (TWTA), etc. In order to satisfy the requirement of high-voltage demand, a high-efficiency high-boost-ratio converter is one of the essential mechanisms in power supply systems with low-voltage sources. The high-efficiency high-boost-ratio DC/DC converter with reduced peak switch voltage stress utilizes a three-winding coupled transformer for providing a high conversion ratio without the extreme switch duty-cycle. This three-winding coupled inductor is also facilitated to reduce peak switch voltage stress for decreasing the conduction loss, and to reduce the turn-off rate of the output diode for alleviating the reverse-recovery problem. It can achieve the property of high-efficiency power conversion. The high-efficiency high-boost-ratio DC/DC converter with reduced peak switch voltage stress can be used for low-voltage sources, such as conventional batteries, fuel cells, photovoltaic and wind energy, to further increase the energy utility rate.

Description

200536242 玫、發明說明: 【發明所屬之技術領域】 許多電源應用場合,例如氣體放電式頭燈、不斷電系 統中反流器之高壓直流匯流排、寬頻行波管放大器…等5 均需要高壓直流電源供應,然而一般使用傳統蓄電池作為 電力來源,因此發展高昇壓比換流器為必要之電源轉換機 制。本發明之具減低開關耐壓效能之高效率高昇壓比換流 器,可以將傳統蓄電池、燃料電池、太陽能發電以及風力 發電之低輸出電壓,轉換為高電壓直流電源供電系統,大 幅提昇能源利用率及增加供電穩定度。本發明所涉及之技 術領域包含電力電子、直流/直流換流技術及能源科技之 範疇,雖然本發明所牽涉之技術領域廣泛,但其主要在於 發展具減低開關耐壓效能之高效率高昇壓比換流裝置,以 改善習用換流器之缺失。 【先前技術】 傳統昇壓式換流器,可藉由調整開關之責任週期(Duty Cycle),控制輸出電壓昇壓比例,當應用於高昇壓比之情 況下,責任週期需要調整至極大值,然而換流器中電感之 等效電阻(ESR)導致昇壓比有所限制,無法操作於昇壓比 例超過7倍以上之情況且轉換效率不彰。再者,當該昇壓 式換流器之功率半導體開關截止時,兩端電壓值為輸出電 壓,此高於輸入電壓數倍之跨壓,迫使功率半導體開關需 選擇高耐壓之MOSFET,然而其具有較大導通阻抗值 (Rds(〇n)),形成較高之導通損失。除此之夕卜,傳統昇壓式 200536242 換流器中二極體存在逆向回復(Reverse_Rec〇very)之問題, 當功率半導體開關導通之暫態期間,二極體必須以瞬間大 電流以建立逆偏電壓,此電流流經功率半導體開關,引起 嚴重之切換損失與低轉換致率。基於以上所述,傳統昇壓 式換流為並未具有高昇壓比功能,因此,其侷限於昇壓7 倍以下之直流電源轉換應用上,並且無法達成高效率之電 源轉換機制。 因此許多專家學著提出昇壓換流技術,改善上述傳統 幵壓式換SlL為缺點。以下將目前世界上領先之昇壓換流技 術彙整比較,以更進一步凸顯本發明之具減低開關耐壓效 能之高效率高昇壓比換流器技術突破之優點。 1· C. W· Roh,S. H· Han,M. J· Y〇un,“Dual coupled inductor fed isolated boost converter for low input voltage applications,’’ Electronics Letters, vol. 35, pp. 1791-1792, 1999. 2· n· S. da Silva,L. dos Reis Barbosa,J. B· Vieira,Jr·,L· C. de Freitas, and V. J. Farias, ccAn improved boost PWM soft-single-switched converter with low voltage and current stresses/5 IEEE Transactions on Industrial Electronics, vol. 48? pp. 1174-1179, 2001. 3. Q· Zhao,and F· C· Lee,“High-efficiency,high step-up DC-DC converters/5 IEEE Transactions on Power Electronics, vol. 18, pp. 65-73, 2003. 4· D. C. Lu,D· K. W· Cheng,and Y· S· Lee, “A single-switch continuous-conduction-mode boost converter with reduced 200536242 reverse-recovery and switching losses/^ IEEE Transactions on Industrial Electronics, vol. 505 pp. 767-776, 2003. 5. K. Himchi,and M. Nakaoka, UUPS circuit configuration incorporating buck-boost chopper circuit with two magnetically coupled coils,59 Electronics Letters, vol. 395 pp. 1345-1346, 2003. 6· C· M. C· Duarte,and I· Barbi,“An improved family of ZVS-PWM active-clamping DC-to-DC converters/5 IEEE Transactions on200536242 Description of the invention: [Technical field to which the invention belongs] Many power supply applications, such as gas-discharge headlamps, high-voltage DC busbars of inverters in uninterruptible power systems, wideband traveling wave tube amplifiers, etc. 5 require high voltage DC power supply, however, traditional batteries are generally used as the power source, so the development of high boost ratio converters is a necessary power conversion mechanism. The high efficiency and high boost ratio converter with reduced switching withstand voltage performance of the present invention can convert the low output voltages of traditional storage batteries, fuel cells, solar power and wind power to high voltage DC power supply systems, which greatly improves energy utilization. Rate and increase power supply stability. The technical field covered by the present invention includes the fields of power electronics, DC / DC converter technology and energy technology. Although the technical field involved in the present invention is extensive, it mainly lies in the development of high efficiency and high boost ratio with reduced switching withstand voltage performance. Converter devices to improve the lack of conventional converters. [Previous technology] The traditional boost converter can control the boost ratio of the output voltage by adjusting the duty cycle of the switch. When it is applied to a high boost ratio, the duty cycle needs to be adjusted to a maximum value. However, the equivalent resistance (ESR) of the inductor in the converter causes the boost ratio to be limited. It cannot operate in a situation where the boost ratio exceeds 7 times and the conversion efficiency is poor. In addition, when the power semiconductor switch of the boost converter is turned off, the voltage value at both ends is the output voltage, which is a voltage that is several times higher than the input voltage. This forces the power semiconductor switch to choose a MOSFET with a high withstand voltage. However, It has a large on-resistance value (Rds (On)), resulting in a higher on-conduction loss. In addition to this, there is a problem of reverse recovery (Reverse_Reverver) in the diode of the traditional step-up 200536242 converter. During the transient state of the power semiconductor switch, the diode must use an instantaneous high current to establish the reverse Bias voltage, this current flows through the power semiconductor switch, causing severe switching losses and low conversion efficiencies. Based on the above, the traditional boost converter does not have a high boost ratio function. Therefore, it is limited to DC power conversion applications with a boost of 7 times or less, and cannot achieve a high-efficiency power conversion mechanism. Therefore, many experts have learned to propose a boost commutation technology to improve the above-mentioned traditional pressure-type commutation SlL as a disadvantage. The following is a comparison of the world's leading boost converter technologies to further highlight the advantages of the invention's breakthrough in high efficiency and high boost ratio converter technology with reduced switching withstand voltage performance. 1. C. W. Roh, S. H. Han, M. J. Youn, "Dual coupled inductor fed isolated boost converter for low input voltage applications," Electronics Letters, vol. 35, pp. 1791-1792 , 1999. 2 ···· S. Da Silva, L. dos Reis Barbosa, J. · B · Vieira, Jr ·, L · C. De Freitas, and VJ Farias, ccAn improved boost PWM soft-single-switched converter with low voltage and current stresses / 5 IEEE Transactions on Industrial Electronics, vol. 48? pp. 1174-1179, 2001. 3. Q · Zhao, and F · C · Lee, "High-efficiency, high step-up DC-DC converters / 5 IEEE Transactions on Power Electronics, vol. 18, pp. 65-73, 2003. 4 · DC Lu, D · K. W · Cheng, and Y · S · Lee, "A single-switch continuous-conduction-mode boost converter with reduced 200536242 reverse-recovery and switching losses / ^ IEEE Transactions on Industrial Electronics, vol. 505 pp. 767-776, 2003. 5. K. Himchi, and M. Nakaoka, UUPS circuit configuration incorporating buck-boost chopper circuit with two magnetically coupled co ils, 59 Electronics Letters, vol. 395 pp. 1345-1346, 2003. 6 ·····························, ·, Duarte, and I ·· Barbi, "An improved family of ZVS-PWM active-clamping DC-to-DC converters / 5 IEEE Transactions on

Power Electronics, vo\. 17?pp. l-7? 2002. 參 考 文 獻 輸入 電壓 輸出 電壓 輸出 容量 轉換 效率 電路架構 優缺點比較 [1] 12V 150V 90W 87% 雙耦合電感 優點·南昇壓比 缺點:架構複雜 [2] 80V 200V 400W 97.5% 變壓器 優點:具柔性切換 缺點:昇壓比最多四倍 [3] 60V 380V lkW 91.8% 李馬合籍制 ^憂點:架構簡單及使用 較低導通損零件 (250V開關) 缺點:昇壓比無法大幅 提昇、電壓低時 效率不彰及無法 克服線路電感突 L___波 [4] 100V 150V 200W 95% _馬合諧振 優點:具柔性切換 缺點:昇壓比低及電感 容量大 [5] 48V 340V 700W 86% 不斷電系統 ——- ^ y v. 優點:單級直流昇壓轉 交流 缺點:無法用於電壓變 200536242 及開關耐壓南 [6] 300V 400V 1.6kW 98% 主動箝制 優點:具柔性切換 缺點:昇壓比低及箝制 電壓高 本發明所揭示之具減低開關耐壓效能之高效率高昇壓 比換流器,運用三繞組之耦合電感,使得鐵粉芯更有效率 地全域操作,不需要增加功率半導體開關之責任週期,即 可大幅度提高傳統昇壓式換流器之昇壓比例,並且有助於 減低開關之耐壓規格,減少導通損失,另一方面,由於耦 · 合電感具有洩漏電感之特性,減低輸出端二極體逆向回復 之突波電流,達成高效率低壓直流電源轉換成高壓直流電 源之目的。 【發明内容】 圖1表示本發明所揭示具減低開關财壓效能之高效率 高昇壓比換流器方塊圖。本發明乃利用直流輸入電源,經 所揭示之具減低開關耐壓效能之高效率高昇壓比換流器電 | 源轉換後,大幅提昇直流輸入電壓γ之位準,可應用於高 電壓需求時之場合;當一次侧電路102之功率半導體開關 S導通時,先將直流輸入電壓源之能量儲存於一次侧電路 102之耦合電感一次侧,以及透過耦合電感將直流輸入電 壓源之能量儲存於三次侧電路104之電容C3中;當一次側 電路102之功率半導體開關S截止時,將直流輸入電壓源、 耦合電感一次侧、二次側電路103之電容C2以及三次側電 路104之電容C3w者串聯之能量,於直流輸出電路105之 11 200536242 二極體A導通時,以電流型式傳導至直流輸出電路i〇5, 提昇換流器之直流輸出電壓;此時二次侧電路103之電容 C2及三次侧電路104之電容C3承受大部分直流輸出電路 105之跨壓,直流輸出電壓與該跨壓之差值,即為一次侧 電路102之功率半導體開關S兩端所承受之電壓,該電壓 遠小於直流輸出電壓,故一次侧電路102之功率半導體開 關具低耐壓之效能;耦合電感一次侧電流開始下降逐漸變 為零過程中,因鐵粉芯磁通連續特性,表現於耦合電感二 _ 次侧電流103由零交越上升,接近峰值時,開始對二次側 電路103之電容C2充電,因此電容C2之電壓在一週期内達 成平衡。 本發明改善先前技術之原理及對照功效如下: 1. 一次侧電路102、二次側電路103及三次側電路104之 結合,具提高昇壓比例、減低功率半導體開關S之耐壓 規格之效能·利用柄合電感區數與電壓成比倒之特性’ 本發明之裝置具高昇壓比之特性,提供較高於傳統昇壓 _ 式換流器之昇壓比例;二次側電路103之電容C2以及三 次侧電路104之電容C3上電壓,分擔一次側電路103之 功率半導體開關S兩端之跨壓,使此電壓低於直流輸出 電路105之輸出電壓&。 2. 減低功率半導體開關5耐壓規格降低導通損失:一次側 電路102之功率半導體開關S兩端之跨壓被限制於低壓 範圍,可以選用較低耐壓值之MOSFET,因其具較低之 導通阻抗可減低導通損失,進而提升轉換效率。 12 200536242 3. 耦合電感增加鐵粉芯利用率:運用三繞組之耦合電感, 當功率半導體開關導通S時,耦合電感三次侧之電流對 三次侧電路104之電容C3充電,類似傳統順向式換流器 之工作原理;當功率半導體開關S截止時,儲存於耦合 電感上能量透過耦合電感二次侧,對負載端釋放能量, 再對二次侧電路103之電容C2充電,此工作原理與傳統 返驰式換流器雷同;基於以上所述,三繞組之耦合電感 在全域操作之下,增加該耦合電感鐵粉芯之利用率。 0 4. 耦合電感之漏感減少輸出端二極體逆向回復之問題:當 一次側電路102之功率半導體開關截止時,輸出端二極 體導通5二極體電流斜率為搞合電感之漏感函數’其電 流遞減至零而截止,減少其逆向回復之問題,不造成反 向電流突波,減少元件發熱與功率消耗,進而提升轉換 效率。 5. 閉迴路控制機制:一般直流輸入電路101之直流輸入電 壓γ易隨負載變化,可以藉由閉迴路控制機制106穩定 _ 直流輸出電路105之直流輸出電壓&。 【實施方式】 圖2表示本發明所揭示之具減低開關耐壓效能之高效 率高昇壓比換流器等效電路,其中三繞組耦合電感利用一 組一對二之理想變壓器、激磁電感&及等效漏感4表示, 且此理想變壓器之匝數為以及TV3,其匝數比七及 可表示如下: ⑴ n2 ~ 13 200536242 義人側馬覆為,假設二次側電路之電容q及 一人測电吩104之電容C3夠大可視為定電壓源,其電壓分 別為匕2與匕3,並且將直流輸入電路101簡化為定電壓源 ,圖3表7F本發明所揭示之換流器電遷及電流波形時序。 圖4表示本發明工作模式,其說明如下: 模式一丨ϋ j : …當時間广^時,功率半導體開關s導通,二極體q、 2逆偏一極體A導通,此時直流輸入電壓透過耦合電 ϋ三次侧電路104之電容C3充電,經由克希荷夫電壓電 =律可推導出電容充電電流^3、激磁電感電 輕合電感-次侧電⑹之變化率如下所示: - (3) dt <Lk a-vs dt — 0+Ά -h dt 且激磁電感上電壓 (4) n^Lm (5)Power Electronics, vo \. 17? Pp. L-7? 2002. References Input Voltage Output Voltage Output Capacity Conversion Efficiency Circuit Architecture Comparison of Advantages and Disadvantages [1] 12V 150V 90W 87% Advantages of Dual Coupling Inductor • Disadvantages of South Boost Ratio: Complex structure [2] 80V 200V 400W 97.5% Advantages of transformer: Flexible switching Disadvantages: Up to four times the boost ratio [3] 60V 380V lkW 91.8% Lima joint system ^ Worry points: Simple structure and use of low conduction loss parts (250V switch) Disadvantages: The step-up ratio cannot be greatly improved, the efficiency is not good when the voltage is low, and the inductive L_wave of the line can not be overcome. [4] 100V 150V 200W 95% _Mahe resonance Advantage: Flexible switching Disadvantage: Boost ratio Low and large inductance capacity [5] 48V 340V 700W 86% Uninterruptible power system ——- ^ y v. Advantages: Single-stage DC boost to AC Disadvantage: Cannot be used for voltage transformer 200536242 and switch withstand voltage south [6] 300V 400V 1.6kW 98% active clamping Advantages: Flexible switching Disadvantages: Low boost ratio and high clamping voltage The disclosed high-efficiency high boost ratio converter with reduced switching withstand voltage efficiency disclosed by the present invention uses three-winding coupling This makes the iron powder core operate more efficiently and globally. Without increasing the duty cycle of the power semiconductor switch, the boost ratio of the traditional boost converter can be greatly improved, and it can help reduce the voltage withstand specifications of the switch. In order to reduce the conduction loss, on the other hand, because the coupling and coupling inductors have the characteristics of leakage inductance, the surge current at the output diode is reversely reversed, and the purpose of converting a high-efficiency low-voltage DC power source into a high-voltage DC power source is achieved. [Summary of the Invention] FIG. 1 shows a block diagram of a high-efficiency, high-boost-ratio converter with reduced switching voltage performance disclosed by the present invention. The present invention utilizes a DC input power supply, and after the disclosed high-efficiency and high-boost-ratio converter converter with reduced switching withstand voltage performance, the level of the DC input voltage γ is greatly improved after the source conversion, which can be applied to high-voltage demand Occasions; when the power semiconductor switch S of the primary circuit 102 is turned on, the energy of the DC input voltage source is first stored in the coupling inductor primary side of the primary circuit 102, and the energy of the DC input voltage source is stored three times through the coupling inductor. In the capacitor C3 of the side circuit 104, when the power semiconductor switch S of the primary circuit 102 is turned off, the DC input voltage source, the coupled inductor primary side, the capacitor C2 of the secondary side circuit 103, and the capacitor C3w of the tertiary side circuit 104 are connected in series. When the DC output circuit 105-11200536242 diode A is turned on, it is conducted to the DC output circuit i05 in a current mode to increase the DC output voltage of the converter. At this time, the capacitance C2 of the secondary circuit 103 and The capacitor C3 of the tertiary-side circuit 104 withstands the cross-voltage of most DC output circuits 105. The difference between the DC output voltage and this cross-voltage is the primary side. The voltage on both ends of the power semiconductor switch S of the circuit 102 is much smaller than the DC output voltage. Therefore, the power semiconductor switch of the primary circuit 102 has a low withstand voltage performance; the primary current of the coupling inductor begins to decrease and gradually becomes zero. Due to the continuous magnetic flux characteristics of the iron powder core, the second-side current 103 of the coupled inductor rises from zero crossing. When it approaches the peak value, the capacitor C2 of the secondary-side circuit 103 starts to be charged. Reach balance within the cycle. The principles and comparative effects of the present invention to improve the prior art are as follows: 1. The combination of the primary circuit 102, the secondary circuit 103, and the tertiary circuit 104 has the effect of increasing the boost ratio and reducing the withstand voltage specifications of the power semiconductor switch S. Utilizing the characteristic that the number of handle inductors is proportional to the voltage 'The device of the present invention has a high step-up ratio and provides a step-up ratio higher than that of a conventional step-up converter; the capacitor C2 of the secondary circuit 103 And the voltage on the capacitor C3 of the tertiary circuit 104 shares the voltage across the power semiconductor switch S of the primary circuit 103 so that this voltage is lower than the output voltage & of the DC output circuit 105. 2. Reduce the power semiconductor switch 5 withstand voltage specification to reduce the conduction loss: the voltage across the two ends of the power semiconductor switch S of the primary circuit 102 is limited to the low voltage range. A MOSFET with a lower withstand voltage can be selected because it has a lower voltage. The on-resistance can reduce the conduction loss, which improves the conversion efficiency. 12 200536242 3. Coupling inductance increases utilization rate of iron powder core: Using the three-winding coupling inductance, when the power semiconductor switch is turned on, the current on the third side of the coupling inductor charges the capacitor C3 on the third-side circuit 104, similar to the traditional forward commutation. The working principle of the current transformer; when the power semiconductor switch S is turned off, the energy stored in the coupled inductor passes through the secondary side of the coupled inductor, releases energy to the load end, and then charges the capacitor C2 of the secondary side circuit 103. This working principle is traditional Flyback converters are similar; based on the above, the coupling inductance of the three windings under full-range operation increases the utilization of the iron core of the coupled inductor. 0 4. The leakage inductance of the coupled inductor reduces the problem of reverse recovery of the output diode: When the power semiconductor switch of the primary circuit 102 is turned off, the output diode is turned on. 5 The current slope of the diode is the leakage inductance of the inductor. The function 'its current decreases to zero and cuts off, which reduces the problem of reverse recovery, does not cause reverse current surges, reduces component heating and power consumption, and thereby improves conversion efficiency. 5. Closed loop control mechanism: Generally, the DC input voltage γ of the DC input circuit 101 is easy to change with the load. It can be stabilized by the closed loop control mechanism 106 _ DC output voltage of the DC output circuit 105 &. [Embodiment] FIG. 2 shows an equivalent circuit of a high-efficiency and high-boost converter with reduced switching withstand voltage efficiency disclosed in the present invention, in which a three-winding coupled inductor uses a set of one-to-two ideal transformers, excitation inductors & The equivalent leakage inductance 4 is represented, and the number of turns of this ideal transformer is TV3, and the number of turns is seven and can be expressed as follows: ⑴ n2 ~ 13 200536242 The cover of the right-hand side is assumed, the capacitance q of the secondary circuit and one person The capacitance C3 of the electric test phen 104 is large enough to be regarded as a constant voltage source, the voltages of which are dagger 2 and dagger 3, respectively, and the DC input circuit 101 is simplified as a constant voltage source. Figure 3 Table 7F Migration and current waveform timing. FIG. 4 shows the working mode of the present invention, and its description is as follows: Mode 1 丨 ϋ j:… when the time is wide, the power semiconductor switch s is turned on, and the diodes q and 2 are reversed and the unipolar body A is turned on. At this time, the DC input voltage Capacitor C3 is charged through the coupling circuit of the tertiary circuit 104, and the charging current of the capacitor can be deduced via Kirchhoff voltage = law. The rate of change of the magnetizing inductance and the light-winding inductance of the secondary side is as follows:- (3) dt < Lk a-vs dt — 0 + Ά -h dt and the voltage across the magnetizing inductance (4) n ^ Lm (5)

⑹ 模式-中,直流輸人電壓對激磁電以、柄合電感漏 及三次側電路1()4之電容q充電,儲存能量於激磁電感⑹ Mode-In the DC input voltage, the magnetizing current is charged with the leakage inductance and the capacitance q of the tertiary circuit 1 () 4 to store energy in the magnetizing inductance.

An、漏感&及電容C3中。 模 14 200536242 壓:ΓΓΓΤ開關s截止,開關兩端電 逆偏二感、丄 < 电流,流經二帝 路103之電谷C2及二次侧電路1〇4之 私 理想變壓11透過縣合的方式,將激磁 傳導至理想變壓器二次側%,變麗器二次侧 流向直流輸出電路105,對負載釋出能量。利用2克;::: 電壓定律,可推導出電壓之關係式如下. 克希何夫An, leakage inductance & capacitor C3. Module 14 200536242 Voltage: ΓΓΓΤ switch s is turned off, the two ends of the switch are electrically reversed, and the current is flowing through the electric valley C2 of Erdi Road 103 and the private ideal transformer 11 of the secondary side circuit 11 through the county In a combined manner, the excitation is conducted to the secondary side of the ideal transformer, and the secondary side of the transformer goes to the DC output circuit 105 to release energy to the load. Using 2 grams of ::: voltage law, the relationship of voltage can be derived as follows. Kirchhoff

Vds (0 + ^C2 ^ ^C3 ^ Vc2=-n2^vNl(t)Vds (0 + ^ C2 ^ ^ C3 ^ Vc2 = -n2 ^ vNl (t)

VV

Lm C3 ⑺⑻ (9) 此時開關上之耐壓為 vds(〇=ys ^^m(〇-vLk(t) = V〇-VC2-VC3<κ 由式(10)可仔知,本換流II具減低_耐壓之效能,有助 於選取低耐壓低導通損失之半導體開關元件, 器之轉換效率。利用上述之、、 … 洲上述之為電感4及耦合電感漏感4 上电壓,可推導出電流變化率如下·· (10) ^Lrn dt ^JA dt n2Lm vs + Vc3}±(^n2) V( n2 Lk (11) C2 15 (12) (13)200536242 di 佐=- (l + n2+ Lk/LJVC2 dt n2 Lk dt ^ Π -,+ ^+^3) + (1 + n2)VC2 (14) n2Lm C3 ⑺⑻ (9) At this time, the withstand voltage of the switch is vds (〇 = ys ^^ m (〇-vLk (t) = V〇-VC2-VC3 < κ). It can be known from formula (10) that this commutation II has the effect of reducing _withstand voltage, which helps to select the semiconductor switching elements with low withstand voltage and low conduction loss, and the conversion efficiency of the device. Using the above,… The above is the voltage on the inductor 4 and the leakage inductance 4 of the coupled inductor. The current change rate can be deduced as follows: (10) ^ Lrn dt ^ JA dt n2Lm vs + Vc3} ± (^ n2) V (n2 Lk (11) C2 15 (12) (13) 200536242 di Zou =-(l + n2 + Lk / LJVC2 dt n2 Lk dt ^ Π-, + ^ + ^ 3) + (1 + n2) VC2 (14) n2

Jk_ 2 T ηΊ L 模式三[i2〜i3 J : 當時間戶G時,二次側電路之電容C2放電電流遞減至Jk_ 2 T ηΊ L Mode 3 [i2 ~ i3 J: When the time is G, the discharge current of the capacitor C2 of the secondary circuit decreases to

零值,/C2(/2) = 0,激磁電感之能量透過理想變壓器,對二 次側電路103之電容q充電,因此電容Q之電流呈現負 值,其電流變化率如式(14)所表示。另一方面,三次侧電 路1〇4之電容C*3則持續對負載放電,其電流變化率可由式 (12)所表示,與之串聯路徑之電流隨時間遞減。1 模式四[ί3〜々】:Zero value, / C2 (/ 2) = 0. The energy of the magnetizing inductance passes through the ideal transformer to charge the capacitor q of the secondary circuit 103. Therefore, the current of the capacitor Q is negative, and the current change rate is as shown in equation (14). Means. On the other hand, the capacitor C * 3 of the tertiary side circuit 104 continuously discharges to the load, and its current change rate can be expressed by equation (12), and the current of the series path decreases with time. 1 Mode Four [ί3 ~ 々]:

田日守間卜^日t,耦合電感一次侧之電流遞減至雯值 =) = 〇’粞合電感之所儲存之能量以柄合電感二摘 ::::見,寺二極體戦,電 表示,’可減輕陶端二極體. 之電流變化率如二:;0_3之電谷q充電’激磁電感 減’T則電路丨。3之電容以電電流變化;:呈驗 VC2 ^ n22 L (15 二次侧電路1〇3 2 .之一極體電流‘與激磁電感之電流^ 16 200536242 比例關係,二極體電流‘亦呈線性遞減之函數。因漏感之 電流為零’電流變化率亦為零,因此漏感上之電壓為零值, 使得功率半導體開關s電壓降低,該功率半導體開關之兩 端電壓值可表示為 (16) 假設所有元件均為理想情況下,二次側電路1〇3之電 容電壓厂ο及三次側電路1〇4之電容電壓FC3分別可表示為 Vci^-n2vLm{t), tx<t<tA (Π)Tian Ri Shoujian ^ Day t, the current on the primary side of the coupled inductor decreases to the value of Wen =) = 〇 'The stored energy of the coupled inductor is based on the combined inductor 2 ::: see, the temple diode, The electric means, 'can reduce the ceramic end diode. The current change rate is as follows: 2; 0_3 of the electric valley q charge' excitation inductance reduction 'T circuit. The capacitance of 3 varies with electric current ;: VC2 ^ n22 L (15 secondary side circuit 1023 2. One pole body current 'and the magnetizing inductor current ^ 16 200536242 proportional relationship, the diode current' also showed Linear decreasing function. Since the leakage inductance current is zero, the current change rate is also zero, so the voltage on the leakage inductance is zero, which makes the voltage of the power semiconductor switch s decrease. The voltage value across the power semiconductor switch can be expressed as (16) Assuming that all components are ideal, the capacitor voltage factory of the secondary side circuit 103 and the capacitor voltage FC3 of the tertiary side circuit 104 can be expressed as Vci ^ -n2vLm {t), tx < t < tA (Π)

Vc^(l + n3)Vs (18) 令功率半導體開關S導通之責任週期為d,利用式(6)、式 (9)、式(17)、式(18)及激磁電感上在一週期内之平均電壓 為零’可推導出昇壓比例如下: ^ = (l + „3) + _i_ + _^_,2 (19) 由式(19)可得知,此電路之昇壓比例高於傳統昇壓式換流 為’可藉由調整匝數比彌補傳統昇壓式換流器昇壓比例之 不足。 圖5表示本發明所揭示之具減低開關耐壓效能之高努 率尚幵壓比換流器實施例之一,採用之低壓電源為美匪 H_P〇體、公司所生產之燃料電池P_rPEMTM-PS250,此楚 貞定輪出功率為250瓦特’額定輸出電壓為28伏特c 電Γ:?二池輸出之電壓 具減低開關昇r選取本發明飾 之问放羊回歼壓比換流器元件,功4 17 200536242 半導體開關 S選用 IRFPS4710 (100V,RDS(ON)=14mQ),具 有較低之導通阻抗,有利於減低導通損失,大幅提升換流 器之轉換效率,二極體仏選用蕭特基二極體SR20100,亦 可減少其導通跨壓以利於提升效率,二極體乃2及乃3選用 為SFA1608,並聯緩震電路RCD於二極體乃2及乃3兩端, 以降低二極體逆偏時,因二極體之寄生電容與耦合電感二 次侧及三次側之漏感諧振所造成之電壓突波,閉迴路控制 機制106使用TL494脈波寬度調變控制晶片,功率半導 體開關元件頻率操作於100kHz,輸出功率為20〜300瓦特, 本實施例詳細之規格如下·· β ·· 27〜38V V0 : 400V R0 : 534^80000 C2 : 4.75 μ¥ C3 : 4.75 //F Ct : 2200 //F C0 : 100 //F Lx : 10.7 //H Lk : 0.6 //H n2 ·· 6.33 «3 : 5 本發明所揭示之具減低開關耐壓效能之高效率高昇壓 比換流器實施例之一,操作於輸出功率300瓦特時,量測 之效率為94.1%,並記錄實測波形響應如下所述。圖6表 18 200536242 示功率半導體開關s之電壓及電流實測波形,圖中顯示出 該功率半導體開關截止時寄生電容充電,兩端電壓上升, 由於線路漏感之影響,開關電壓具有震盪之現象,穩定時 此電壓約為60伏特。圖7表示耦合電感一次侧電流L、 耦合電感二次侧電流k及耦合電感三次侧電流k實測波 形,圖中顯示出耦合電感一次側及二次側電流在耦合電感 内能量傳遞時之響應,以及耦合電感三次側對電容C3之充 電電流。圖8 (a)、(b)與(c)分別表示二極體乃0、乃2與D3之 電壓電流波形,由圖8 (a)顯示出二極體A在截止時,幾 無反向電流突波,有效減緩其逆向回復之問題。 圖9表示直流輸出電壓匕、直流輸出電流4與燃料電 池之直流輸入電流/z.,在空載輸出功率0瓦特至滿載輸出 功率300瓦特間負載變化時之響應,在配合閉迴路控制機 制106及高頻操作下,燃料電池之直流輸入電流及直流輸 出電路105之輸出電壓之漣波很小,使燃料電池穩定工作 並輸出直流電壓400伏特。 圖10表示本發明所揭示之具減低開關耐壓效能之高 效率高昇壓比換流器實施例之一,採用燃料電池為直流輸 入電壓,操作於不同輸出功率時所對應之轉換效率,最高 轉換效率大於95%。 圖11表示本發明所揭示之具減低開關耐壓效能之高 效率高昇壓比換流器另一較佳實施例之方塊圖,圖1與圖 11最大不同處在於輔助電路1104。輔助電路1104之電容 Q具再提高直流輸出電路之輸出電壓,以及吸收線路中洩 19 200536242 漏電感造成功率半導體開關s突波電壓之功能;當功率半 導體開關s截止時,耦合電感一次侧低壓大電流經辅助電 路1104之二極體A對電容Q充電,該電容並吸收一次側 電路102線路中洩漏電感之能量,以減緩功率半導體開關 夕峰值電壓震盪情形。另一方面,由於耦合電感一次側電 流絕大部分對電容Q充電,降低流經直流輸出電路105之 二極體从電流峰值,此電流路徑亦經輔助電路1104之電 感A,該電感目的在於減小電流爬升速率,加強降低直流 _ 輸出電路105之二極體A電流峰值功能,並使此電流較為 平均,降低導通損失。 圖12表示本發明所揭示之具減低開關耐壓效能之高 效率高昇壓比換流器另一較佳實施例,採用燃料電池做為 直流輸入電壓,直流輸出電壓400V及輸出功率300W時 之實測波形;圖12(a)為直流輸出電路105之二極體ZV電 壓及電流,相較於圖8(a)之電流波形5圖12(a)顯示出電 流峰值明顯降低且平均,此電流路徑導至直流輸出電路105 φ 高壓侧,該較佳之實施例具有高電壓低電流及低電壓大電 流特性,充分運用元件之特性及容量,使輸出電壓及電流 漣波減低;圖12(b)為輔助電路1104之二極體仏電壓及電 流,顯示出當功率半導體開關S截止時,耦合電感大部分 流經輔助電路1104之二極體A,對輔助電路1104之電容 充電。 雖然本發明已以前述較佳實施例揭示,然其並非用以 限定本發明,任何熟習此技藝者,再不脫離本發明之精神 20 200536242 和範圍内,當可作各種之變動與修改,因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1表示本發明所揭示之具減低開關耐壓效能之高效率 高昇壓比換流器方塊圖。 圖2表示本發明所揭示之具減低開關耐壓效能之高效率 高昇壓比換流器等效電路圖。 圖3表示本發明所揭示之具減低開關耐壓效能之高效率鲁 高昇壓比換流器,電壓及電流之波形時序。 圖4表示本發明所揭示之具減低開關耐壓效能之高效率 高昇壓比換流器,電路工作模式圖。 圖5表示本發明所揭示之具減低開關耐壓效能之高效率 高昇壓比換流器實施例之一,使用燃料電池為電源 供應之電路圖。 圖6表示本發明所揭示之具減低開關而ί壓效能之高效率 高昇壓比換流器實施例之一,功率半導體開關S跨壓 _ 心,與電流匕之實測波形。 圖7表示本發明所揭示之具減低開關耐壓效能之高效率 高昇壓比換流器實施例之一,耦合電感一次側電流 L、耦合電感二次侧電流//)2及耦合電感三次侧電流 /D3之實測波形。 圖8表示本發明所揭示之具減低開關耐壓效能之高效率 高昇壓比換流器實施例之一,二極體電壓電流實測 波形:(a)直流輸出電路之二極體A跨壓與電流 21 200536242Vc ^ (l + n3) Vs (18) The duty cycle for turning on the power semiconductor switch S is d, using formula (6), formula (9), formula (17), formula (18) and the magnetizing inductance in a cycle The average voltage within zero can be derived as follows: ^ = (l + „3) + _i_ + _ ^ _, 2 (19) As can be seen from equation (19), the boost ratio of this circuit is high The traditional boost converter is able to compensate the deficiency of the boost ratio of the traditional boost converter by adjusting the turns ratio. Fig. 5 shows that the high rate of reducing the withstand voltage performance of the switch disclosed in the present invention is still high. One of the embodiments of the voltage ratio converter, the low voltage power source used is the American bandit H_P0 body, the fuel cell P_rPEMTM-PS250 produced by the company, and the output power of this Chu Zhen is 250 watts. The rated output voltage is 28 volts c. Γ: The voltage of the two-cell output reduces the switch riser. The inverter element of the present invention is selected. The power is 4 17 200536242. The semiconductor switch S uses IRFPS4710 (100V, RDS (ON) = 14mQ). The lower on-resistance is beneficial to reduce the on-conduction loss and greatly improve the conversion efficiency of the converter. The Schottky diode is used as the diode SR20100 can also reduce its conduction voltage to improve efficiency. Diodes 2 and 3 are selected as SFA1608. Parallel damping circuit RCD is used at the ends of diodes 2 and 3 to reduce the reverse bias of the diode. When the voltage surge is caused by the parasitic capacitance of the diode and the leakage inductance resonance of the secondary and tertiary sides of the coupled inductor, the closed-loop control mechanism 106 uses a TL494 pulse width modulation control chip, and the frequency operation of the power semiconductor switching element At 100kHz, the output power is 20 ~ 300 Watts. The detailed specifications of this embodiment are as follows: β 27 ~ 38V V0: 400V R0: 534 ^ 80000 C2: 4.75 μ ¥ C3: 4.75 // F Ct: 2200 // F C0: 100 // F Lx: 10.7 // H Lk: 0.6 // H n2 ·· 6.33 «3: 5 The embodiment of the high efficiency and high boost ratio converter with reduced switching withstand voltage efficiency disclosed by the present invention First, when operating at an output power of 300 watts, the measurement efficiency is 94.1%, and the measured waveform response is recorded as follows. Figure 18 Table 18 200536242 shows the voltage and current measured waveforms of the power semiconductor switch s. The power is shown in the figure The parasitic capacitance is charged when the semiconductor switch is turned off, The terminal voltage rises, due to the influence of line leakage inductance, the switching voltage has the phenomenon of oscillation, this voltage is about 60 volts when stable. Figure 7 shows the coupled inductor primary side current L, coupled inductor secondary side current k, and coupled inductor tertiary side current. k The measured waveform shows the response of the primary and secondary currents of the coupled inductor during the energy transfer in the coupled inductor, and the charging current to the capacitor C3 on the tertiary side of the coupled inductor. Figures 8 (a), (b), and (c) show the voltage and current waveforms of diodes 0, 2, and D3, respectively. Figure 8 (a) shows that diode A has almost no reverse direction when it is turned off. The current surge effectively reduces the problem of reverse recovery. Figure 9 shows the response of the DC output voltage, DC output current 4 and DC input current / z. Of the fuel cell when the load changes between 0 watts of no-load output power and 300 watts of full-load output power, in cooperation with the closed-loop control mechanism 106 Under high-frequency operation, the ripple of the DC input current of the fuel cell and the output voltage of the DC output circuit 105 is small, which enables the fuel cell to work stably and output a DC voltage of 400 volts. FIG. 10 shows one of the embodiments of the high-efficiency and high-boost-ratio converter with reduced switching withstand voltage efficiency disclosed by the present invention, which uses a fuel cell as a DC input voltage and operates at different output powers corresponding to the conversion efficiency, the highest conversion Efficiency is greater than 95%. FIG. 11 shows a block diagram of another preferred embodiment of the high-efficiency and high-boost-ratio converter with reduced switching withstand voltage efficiency disclosed in the present invention. The biggest difference between FIG. 1 and FIG. 11 lies in the auxiliary circuit 1104. The capacitor Q of the auxiliary circuit 1104 further increases the output voltage of the DC output circuit and absorbs the leakage in the circuit. 19 200536242 Leakage inductance causes the surge voltage of the power semiconductor switch s. When the power semiconductor switch s is turned off, the low voltage on the primary side of the coupling inductor is large. The current passes through the auxiliary circuit 1104's diode A to charge the capacitor Q, and the capacitor absorbs the energy of the leakage inductance in the line of the primary circuit 102 to reduce the peak voltage oscillation of the power semiconductor switch. On the other hand, since the primary side current of the coupled inductor charges most of the capacitor Q, the peak current of the diode flowing through the DC output circuit 105 is reduced, and this current path also passes through the inductance A of the auxiliary circuit 1104. The purpose of this inductance is to reduce The small current climbing rate strengthens the function of reducing the peak current of the diode A of the DC output circuit 105, makes the current more even, and reduces the conduction loss. FIG. 12 shows another preferred embodiment of the high efficiency and high boost ratio converter with reduced switching withstand voltage efficiency disclosed by the present invention. The fuel cell is used as a DC input voltage, a DC output voltage of 400V and an output power of 300W. Figure 12 (a) is the voltage and current of the diode ZV of the DC output circuit 105. Compared with the current waveform 5 of Figure 8 (a), Figure 5 (a) shows that the current peak is significantly reduced and averaged. This current path Lead to the high-voltage side of the 105 φ DC output circuit. This preferred embodiment has high-voltage low-current and low-voltage large-current characteristics. It fully utilizes the characteristics and capacity of the components to reduce the output voltage and current ripple; Figure 12 (b) is The voltage and current of the diode of the auxiliary circuit 1104 show that when the power semiconductor switch S is turned off, most of the coupling inductance flows through the diode A of the auxiliary circuit 1104 to charge the capacitor of the auxiliary circuit 1104. Although the present invention has been disclosed in the foregoing preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can still depart from the spirit of the present invention within the scope of 2005 200536242 and various changes and modifications. The scope of protection of the invention shall be determined by the scope of the attached patent application. [Brief description of the figure] FIG. 1 shows a block diagram of a high-efficiency high-boost converter with reduced switching withstand voltage efficiency disclosed by the present invention. FIG. 2 shows an equivalent circuit diagram of a high-efficiency, high-boost converter with reduced switching withstand voltage efficiency disclosed by the present invention. FIG. 3 shows the waveform sequence of voltage and current of the high-efficiency and high-boost converter with reduced switching withstand voltage efficiency disclosed by the present invention. FIG. 4 shows a high-efficiency, high-boost-ratio converter with reduced switching voltage withstanding efficiency, and a circuit working mode diagram of the present invention. FIG. 5 shows a circuit diagram of a high-efficiency high-boost-ratio converter with reduced switching withstand voltage efficiency disclosed by the present invention, using a fuel cell as a power supply. FIG. 6 shows one embodiment of a high-efficiency, high-boost-ratio converter with reduced switching and low voltage efficiency disclosed by the present invention, the measured waveform of the power semiconductor switch S across the voltage and the current dagger. FIG. 7 shows one of the embodiments of the high-efficiency and high-boost-ratio converter with reduced switching withstand voltage efficiency disclosed in the present invention, the coupled inductor primary-side current L, the coupled inductor secondary-side current //), and the coupled inductor tertiary-side Current / D3 measured waveform. FIG. 8 shows one embodiment of the high-efficiency and high-boost-ratio converter with reduced switching withstand voltage efficiency disclosed in the present invention. The measured voltage and current waveforms of the diodes are: (a) the voltage across the diode A of the DC output circuit and Current 21 200536242

Zw ; (b)二次侧電路之二極體A跨壓%2與電流心2 ; (C) 三次侧電路之二極體乃3跨壓vD3與電流k。 圖9 表示本發明所揭示之具減低開關耐壓效能之高效率 高昇壓比換流器實施例之一,直流輸出電壓G、直 流輸出電流忍與燃料電池之直流輸入電流Λ在負載變 化時之暫態實測波形。 圖10表示本發明所揭示之具減低開關耐壓效能之高效率 高昇壓比換流器實施例之一,操作於不同輸出功率鲁 對應之轉換效率。 圖11表示本發明所揭示之具減低開關耐壓效能之高效率 高昇壓比換流器另一較佳實施例之方塊圖。 圖12表示本發明所揭示之具減低開關耐壓效能之高效率 高昇壓比換流器另一較佳實施例,二極體電壓電流 實測波形:(a)直流輸出電路之二極體Α跨壓與電 流;(b)輔助電路之二極體跨壓與電流/仏。 圖示主要部分之編號代表意義如下: _ 101 :直流輸入電路 102 : —次侧電路 103 :二次侧電路 104 :三次側電路 105 :直流輸出電路 106 :閉迴路控制機制 1104 :輔助電路 22Zw; (b) Diode A across voltage of secondary circuit% 2 and current core 2; (C) Diode of tertiary circuit is 3 voltage across vD3 and current k. FIG. 9 shows one embodiment of a high efficiency and high boost ratio converter with reduced switching withstand voltage efficiency disclosed by the present invention. The DC output voltage G, the DC output current tolerance, and the DC input current Λ of the fuel cell when the load changes Transient measured waveform. FIG. 10 shows one embodiment of the high-efficiency high-boost-ratio converter with reduced switching withstand voltage efficiency disclosed by the present invention, which operates at different output power corresponding to the conversion efficiency. FIG. 11 shows a block diagram of another preferred embodiment of the high-efficiency high-boost-ratio converter with reduced switching withstand voltage efficiency disclosed by the present invention. FIG. 12 shows another preferred embodiment of a high-efficiency and high-boost-ratio converter with reduced switching withstand voltage efficiency disclosed by the present invention. The measured voltage and current waveforms of the diodes are: (a) Diode A span of the DC output circuit Voltage and current; (b) Diode voltage and current / 仏 of auxiliary circuit. The numbers of the main parts of the figure represent the following meanings: _ 101: DC input circuit 102: — Secondary side circuit 103: Secondary side circuit 104: Tertiary side circuit 105: DC output circuit 106: Closed-loop control mechanism 1104: Auxiliary circuit 22

Claims (1)

200536242 拾、申請專利範圍: 1。一種具減低開關耐壓效能之高效率高昇壓比換流器, 其中包含 一直流輸入電路:直流輸入電壓及輸入濾波電容所構 成; ——次側電路:一個耦合電感一次側及一個功率半導 體開關所構成; 一二次側電路:一個耦合電感二次側、一個二極體及鲁 一個電容所構成; 一三次側電路:一個耦合電感三次側、一個二極體及 一個電容所構成; 一直流輸出電路:一個二極體、輸出濾波電容及負載 所構成; 一閉迴路控制機制:由電壓命令與電壓迴授比較產生 誤差值,經比例積分控制、脈波寬度調變及驅動放大 電路,輸出為可調整責任週期比之驅動訊號,觸發及 · 截止功率半導體開關; 一次侧電路之功率半導體蹲關導通時,先將直流輸入 電壓之能量儲存於一次侧電路之耦合電感一次侧,以 高激磁電流型式儲存,並透過耦合電感將直流輸入電 壓源之能量以變壓器原理傳送至三次侧電路之電容 中;當一次侧電路之功率半導體開關截止時,將直流 輸入電壓、耦合電感一次侧、二次侧電路之電容以及 三次侧電路之電容四者串聯之能量,於直流輸出電路 23 200536242 之二極體導通時,以電流型式傳導至直流輸出電路, 提昇換流器之直流輸出電壓;此時二次側電路之電容 及三次側電路之電容承受大部分直流輸出電路之跨 壓,直流輸出電壓與該跨壓之差值,即為一次侧電路 之功率半導體開關兩端之電壓,該電壓遠小於直流輸 出電壓,故一次側電路之功率半導體開關具低耐壓之 效能;耦合電感一次侧電流開始下降逐漸變為零過程 中,因鐵粉芯磁通連續特性,表現於耦合電感二次側 電流由零交越上升,接近峰值時,開始對二次側電路 之電容充電; 本裝置之特徵為:第一點,本裝置具有高昇壓比之特 性,大幅提高直流輸出電壓位準;第二點,本裝置運 用三繞組之耦合電感,提昇高頻磁性元件鐵粉芯之利 用率;第三點,本裝置具減低開關耐壓效能,可降低 一次側電路之功率半導體開關之耐壓規格,即可選甩 較低導通阻抗之MOSFET,降低導通損失;第四點,輸 出端可省略濾波電感;第五點,直流輸出電路使用之 二極體為低壓,低導通電壓之蕭特基二極體,可降低 導通損失,弟六點’本裝置電路具低壓側大電流’南 壓侧低電流特性,可充分使用元件之規格與容量,因 此效率高於習用電路。 2.如專利申請範圍第1項所述之具減低開關耐壓效能之高 效率高昇壓比換流器,其中直流輸入電路之電容,其 材質為一般電解電容或超電容,可吸收高頻諧波能量 24 200536242 之成份5穩定直流輸入電壓。 3·如專利中請範圍第i項所述之具減低開關耐壓效能之高 效率高昇壓比換流器,其中直流輪出電路之電容,主 要功能,吸收來自二次側電路瞬間充電電流引起高頻 諧波能量之成份,並穩定直流輸出電路之輸出電壓。 4·如專:J申凊靶圍第!項所述之具減低開關耐壓效能之高 放率间昇壓比換流器,其中一次侧電路、二次側電路 及一久側電路之耦合電感能量傳遞原理,係將耦合電籲 感一次側線圈化分成三個階段提昇電壓;第一階段, 當功率半導體開關導通時,一次侧電路之耦合電感一 次侧充電,並透過變壓器操作原理,於三次侧電路之 二極體順偏時’對該電路之電容充電;第二階段,當 功率半導體開關截止時,二次側電路之二極體順偏, 儲^於轉合電感一次側之能量,依照磁通不滅定理, 以電流型式對負載釋放能量;第三階段,功率半導體 仍為截止時,儲存於耦合電感一次側之剩餘磁通φ 倉b里,依妝磁通不滅定理,對二次側電路之電容充電。 5.如專利申請範圍第丨項所述之具減低開關耐壓效能之高 效率咼昇壓比換流器,其中一次側電路、二次側電路 與二次側電路結合,具減低開關耐壓效能,限制一次 侧電路最大電壓。 6·如專利申請範圍第丨項所述之具減低開 關耐壓效能之 咼效率咼昇壓比換流器,其中直流輸入電壓源,本專 利申請範圍包括以蓄電池、太陽光電池、直流風力發 25 200536242 電機及交流風力發電機整流為直流電源,作為電源供 應。 7. 如專利申請範圍第1項所述之具減低開關耐壓效能之 高效率高昇壓比換流器,其中直流輸入電壓源,可以 並聯兩者或兩者以上不同電源供應,控制該電源輸入 功率之比例,以提高整體直流電源輸出功率。 8. 如專利申請範圍第1項所述之具減低開關耐壓效能之 高效率高昇壓比換流器,其中之直流輸出電路之負載,0 本專利申請範圍包括以本專利之直流輸出電壓,提供 反流器、交直流馬達控制裝置之前端電源或直接應用 電路裝置。 9. 一種具減低開關耐壓效能之高效率高昇壓比換流器, 其中包含 一直流輸入電路:直流輸入電壓及輸入濾波電容所構 上 . p人, ——次側電路:一個耦合電感一次側及一個功率半導鲁 體開關所構成; 一二次侧電路:一個耦合電感二次側、一個二極體及 一個電容所構成; 一三次侧電路:一個耦合電感三次側、一個二極體及 一個電容所構成; 一輔助電路:一個電容、一個電感及一個二極體所構 成。 一直流輸出電路:一個二極體、輸出滤波電容及負載 26 200536242 所構成; 一閉迴路控制機制:由電壓命令與電壓迴授比較產生 誤差值,經比例積分控制、脈波寬度調變及驅動放大 電路5輸出為可調整責任週期比之驅動訊號,觸發及 截止功率半導體開關; 本裝置之特徵為:第一點,本裝置具有高昇壓比之特 性,大幅提高直流輸出電壓位準;第二點,本裝置運 用三繞組之耦合電感,提昇高頻磁性元件鐵粉芯之利 $ 用率;第三點,本裝置具減低開關耐壓效能,可降低 一次側電路之功率半導體開關之耐壓規格,即可選用 較低導通阻抗之MOSFET,降低導通損失;第四點,輸 出端可省略濾波電感;第五點,直流輸出電路使用之 二極體為低壓,低導通電壓之蕭特基二極體,可降低 導通損失;第六點,本裝置電路具低壓側大電流,高 壓側低電流特性,可充分使用之元件規格與容量,因 此效率高於習用電路;第七點,辅助電路使用之二極鲁 體為低壓,低導通電壓之蕭特基二極體,可降低導通 損失。 10. 如專利申請範圍第9項所述之具減低開關耐壓效能之高 效率高昇壓比換流器,其中直流輸入電路之電容,其 材質為一般電解電容或超電容,可吸收高頻諧波能量 之成份,穩定直流輸入電壓。 11. 如專利申請範圍第9項所述之具減低開關耐壓效能之高 效率高昇壓比換流器,其中輔助電路具有以下功能: 27 200536242 弟一點’輔助電路之带六 壓比之功能;第二換流装置具有再提高昇 人 ”、、,輔助电路之電容及二極體之組 口、'有減>'線路上洩漏電感對開關造成之電壓突波 之功能;第三點,辅肋帝 補助私路之電谷、二極體及電感之 組合具有減低直流輪屮φ 卿出甩路之二極體電流峰值及平均 該電流之功能。200536242 Scope of patent application: A high-efficiency and high-boost converter with reduced switching withstand voltage performance, which includes a DC input circuit: a DC input voltage and an input filter capacitor;-Secondary circuit: a coupled inductor primary side and a power semiconductor switch The circuit is composed of a secondary side of a coupled inductor, a diode and a capacitor; a circuit of a tertiary side: a third side of a coupled inductor, a diode and a capacitor; Current output circuit: a diode, output filter capacitor and load; a closed-loop control mechanism: the error value is generated by comparing the voltage command with the voltage feedback, and it is controlled by proportional integral control, pulse width modulation, and the drive amplifier circuit. The output is the drive signal with adjustable duty cycle ratio, which triggers and cuts off the power semiconductor switch. When the power semiconductor of the primary circuit is turned on, the energy of the DC input voltage is stored on the primary side of the coupled inductor of the primary circuit. The field current type is stored, and the DC input voltage source is The quantity is transferred to the capacitance of the tertiary circuit based on the principle of a transformer; when the power semiconductor switch of the primary circuit is turned off, the DC input voltage, the capacitance of the coupled inductor primary, secondary circuit, and the capacitance of the tertiary circuit are connected in series. Energy, when the DC output circuit 23 200536242 is turned on, the current is conducted to the DC output circuit to increase the DC output voltage of the converter; at this time, the capacitance of the secondary circuit and the capacitance of the tertiary circuit bear most of it. The voltage across the DC output circuit. The difference between the DC output voltage and this voltage is the voltage across the power semiconductor switch of the primary circuit. This voltage is much smaller than the DC output voltage, so the power semiconductor switch of the primary circuit has a low voltage. Efficiency of withstand voltage; During the current of the primary side of the coupled inductor begins to decrease and gradually becomes zero, due to the continuous characteristics of the iron powder core, the secondary side current of the coupled inductor rises from zero crossing. When it approaches the peak, the secondary Capacitor of the side circuit; The characteristics of this device are: First, the device has the characteristics of high boost ratio The second point is that the device uses the coupling inductance of three windings to improve the utilization rate of the high-frequency magnetic element iron powder core. The third point is that the device can reduce the voltage resistance of the switch, which can reduce the The withstand voltage specification of the power semiconductor switch of the primary circuit, that is, the MOSFET with a lower on-resistance can be selected to reduce the conduction loss; the fourth point, the filtering inductor can be omitted at the output end; the fifth point, the diode used in the DC output circuit The Schottky diode with low voltage and low on-voltage can reduce the conduction loss. The sixth point of this device is that the circuit of this device has the characteristics of low current on the low side and low current on the south side. It can fully use the specifications and capacity of the component, so the efficiency Higher than conventional circuits. 2. The high-efficiency and high-boost converter with reduced switching withstand voltage performance as described in item 1 of the scope of patent applications, where the capacitor of the DC input circuit is made of general electrolytic capacitors or supercapacitors, which can absorb high-frequency harmonics. Wave energy 24 200536242 component 5 stabilizes the DC input voltage. 3. High efficiency and high boost ratio converter with reduced switching withstand voltage performance as described in item i of the patent, in which the capacitor of the DC wheel output circuit has the main function of absorbing the instantaneous charging current from the secondary circuit. The component of high-frequency harmonic energy and stabilizes the output voltage of the DC output circuit. 4 · If special: The high-amplitude step-up ratio converter with reduced switching withstand voltage performance as described in J Shenye's target circle item # 1, where the primary-side circuit, secondary-side circuit, and primary-side circuit are coupled inductors The principle of energy transfer is to divide the primary side of the coupling inductor into three phases to increase the voltage. In the first phase, when the power semiconductor switch is turned on, the primary side circuit's coupling inductor is charged on the primary side, and through the transformer operation principle, When the diode of the side circuit is forward biased, the capacitor of the circuit is charged; in the second stage, when the power semiconductor switch is turned off, the diode of the secondary side circuit is forward biased, and the energy stored in the primary side of the switching inductor is stored. According to the flux immortality theorem, the energy is released to the load in the current mode. In the third stage, when the power semiconductor is still off, the residual magnetic flux φ bin b stored in the primary side of the coupled inductor is stored in the secondary magnetic flux immortal theorem. The capacitor of the side circuit is charged. 5. High efficiency 咼 boost ratio converter with reduced switching withstand voltage performance as described in item 丨 of the scope of patent application, where the primary side circuit, secondary side circuit and secondary side circuit are combined to reduce the switching withstand voltage Efficiency, limiting the maximum voltage of the primary circuit. 6. The “efficiency” boost ratio converter with reduced switching withstand voltage performance as described in item 丨 of the scope of patent application, where the DC input voltage source, the scope of this patent application includes storage batteries, solar cells, and DC wind power generators. 200536242 Motors and AC wind turbines are rectified into DC power for power supply. 7. The high efficiency and high boost ratio converter with reduced switching withstand voltage performance as described in item 1 of the scope of patent applications, where the DC input voltage source can be connected in parallel with two or more different power supplies to control the power input Power ratio to increase the overall DC power output. 8. The high efficiency and high boost ratio converter with reduced switching withstand voltage performance as described in item 1 of the scope of patent application, where the load of the DC output circuit, 0 The scope of this patent application includes the DC output voltage of this patent, Provide inverter, AC / DC motor control device, front-end power supply or direct application circuit device. 9. A high-efficiency, high-boost converter with reduced switching withstand voltage performance, which includes a DC input circuit: constructed by a DC input voltage and an input filter capacitor. P, —— secondary circuit: one coupled inductor once Side and a power semiconducting body switch; primary and secondary circuit: a coupled inductor secondary side, a diode and a capacitor; a tertiary circuit: a coupled inductor tertiary side, a two pole Body and a capacitor; an auxiliary circuit: a capacitor, an inductor and a diode. A DC output circuit: a diode, output filter capacitor and load 26 200536242; a closed-loop control mechanism: an error value is generated by comparing the voltage command with the voltage feedback, and is controlled by proportional integral, pulse width modulation and driving The output of the amplifying circuit 5 is a driving signal with adjustable duty cycle ratio, which triggers and cuts off the power semiconductor switch. The characteristics of this device are: First, the device has the characteristics of high boost ratio, which greatly improves the DC output voltage level; second Point, this device uses the three-winding coupling inductance to improve the utilization rate of high-frequency magnetic element iron powder core; third point, this device has the ability to reduce the withstand voltage of the switch, which can reduce the withstand voltage of the power semiconductor switch of the primary circuit Specifications, you can choose a MOSFET with a lower on-resistance to reduce the conduction loss; the fourth point, the filter inductor can be omitted at the output end; the fifth point, the low-voltage, low on-voltage Schottky diode used in the DC output circuit The pole body can reduce the conduction loss; sixthly, the device circuit has the characteristics of high current on the low side and low current on the high side, which can be charged Specifications and use of the capacity element, and therefore more efficient than conventional circuit; Seventh, the use of auxiliary circuits Lu body diode of the low-pressure, low-Schottky diode on-voltage, the conduction loss can be reduced. 10. As described in item 9 of the scope of patent application, a high-efficiency and high-boost converter with reduced switching withstand voltage performance, wherein the capacitor of the DC input circuit is made of general electrolytic capacitor or super capacitor, which can absorb high-frequency harmonics. The component of wave energy stabilizes the DC input voltage. 11. The high-efficiency and high-boost ratio converter with reduced switching withstand voltage performance as described in item 9 of the scope of patent applications, wherein the auxiliary circuit has the following functions: 27 200536242 Little one's auxiliary circuit with six voltage ratio function; The second converter device has the function of raising the lift again ", the capacitance of the auxiliary circuit and the group port of the diode, and the function of the voltage surge caused by the leakage inductance on the switch due to the leakage inductance on the line; the third point, The auxiliary rib subsidizes the combination of the electric valley, the diode and the inductor of the private road with the function of reducing the peak value of the diode current and the average current of the DC wheel. 12·:ί:!請範圍第9項所述之具減低開關耐壓效能之漠 :二:歼壓比換流器’其中—次側電路、二次側電辟 次侧電路結合,具減低_<壓效能 側電路最大電壓。 13·=專利中請範圍帛9項所述之具減低開關耐壓效能之 门放率问昇壓比換流器,其中直流輸入電壓源,本專 利申請範圍包括以蓄電池、太陽光電池、直流風力發 電機及交流風力發電機整流為直流電源,作為電源供 14. 如專射請範圍第9項所述之具減㈣闕壓效能之鲁 高效率高昇壓比換流器,其中直流輸入電壓源,可以 並聯兩者或兩者以上不同電源供應,控制該電源輸入 功率之比例’以提高整體直流電源輸出功率。 15. 如專利申請範圍帛9項所述之具減低開_壓效能之 高效率高昇壓比換流器’其中之直流輸出電路之負載, 本專利申請範圍包括以本專利之直流輸出電壓,提供 反々IL為、父直流馬達控制裝置之前端電源或直接應用 電路裝置。 U 2812 ·: ί :! Please refer to the item 9 in the range to reduce the switch withstand voltage performance: Second: the compression ratio converter 'of which-the secondary side circuit, secondary side circuit to reduce secondary side circuit, to reduce _ & Maximum voltage of voltage-efficiency side circuit. 13 · = In the patent, please ask for the range 帛 9 with the gate-to-amp ratio to reduce the withstand voltage performance of the step-up ratio converter, in which the DC input voltage source, the scope of this patent application includes batteries, solar cells, DC wind power Generators and AC wind turbines are rectified into DC power and used as power supply. 14. For high-efficiency and high-boost-rate converters with high voltage-reduction performance, as described in item 9, please refer to the DC input voltage source. , You can connect two or more different power supplies in parallel and control the ratio of the input power of the power supply to increase the overall DC power output power. 15. The load of the DC output circuit in the high efficiency and high boost ratio converter with reduced on-voltage performance as described in item 9 of the scope of patent application. The scope of this patent application includes the provision of the DC output voltage of this patent. In contrast, IL is the front-end power supply of the parent DC motor control device or a direct application circuit device. U 28
TW93111433A 2004-04-23 2004-04-23 High-efficiency high-boost-ratio dc/dc converter with reduced peak switch voltage stress TWI239136B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW93111433A TWI239136B (en) 2004-04-23 2004-04-23 High-efficiency high-boost-ratio dc/dc converter with reduced peak switch voltage stress

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW93111433A TWI239136B (en) 2004-04-23 2004-04-23 High-efficiency high-boost-ratio dc/dc converter with reduced peak switch voltage stress

Publications (2)

Publication Number Publication Date
TWI239136B TWI239136B (en) 2005-09-01
TW200536242A true TW200536242A (en) 2005-11-01

Family

ID=37001207

Family Applications (1)

Application Number Title Priority Date Filing Date
TW93111433A TWI239136B (en) 2004-04-23 2004-04-23 High-efficiency high-boost-ratio dc/dc converter with reduced peak switch voltage stress

Country Status (1)

Country Link
TW (1) TWI239136B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI399911B (en) * 2009-10-05 2013-06-21 Univ Nat Cheng Kung Self-oscillating flyback power converter with snubber
TWI466423B (en) * 2012-01-19 2014-12-21 Univ Chienkuo Technology High boost power converter

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013145140A1 (en) * 2012-03-27 2013-10-03 三菱電機株式会社 Capacitor device life diagnosis method
CN113839557B (en) * 2021-08-24 2024-04-09 深圳航天科技创新研究院 Boost conversion topology with wide voltage range
US11437844B1 (en) 2021-09-07 2022-09-06 Aeris Hospitality Solutions, LLC Booster for energy storage device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI399911B (en) * 2009-10-05 2013-06-21 Univ Nat Cheng Kung Self-oscillating flyback power converter with snubber
TWI466423B (en) * 2012-01-19 2014-12-21 Univ Chienkuo Technology High boost power converter

Also Published As

Publication number Publication date
TWI239136B (en) 2005-09-01

Similar Documents

Publication Publication Date Title
Mohammadi et al. A new family of zero-voltage-transition nonisolated bidirectional converters with simple auxiliary circuit
Gu et al. Hybrid-switching full-bridge DC–DC converter with minimal voltage stress of bridge rectifier, reduced circulating losses, and filter requirement for electric vehicle battery chargers
Yang et al. Soft-switching bidirectional DC-DC converter using a lossless active snubber
de Melo et al. A modified SEPIC converter for high-power-factor rectifier and universal input voltage applications
Gu et al. Zero-voltage-switching PWM resonant full-bridge converter with minimized circulating losses and minimal voltage stresses of bridge rectifiers for electric vehicle battery chargers
Cheng et al. A novel single-stage high-power-factor AC/DC converter featuring high circuit efficiency
Alcazar et al. DC–DC nonisolated boost converter based on the three-state switching cell and voltage multiplier cells
Kim et al. An improved current-fed ZVS isolated boost converter for fuel cell applications
Seok et al. High step-up resonant DC–DC converter with ripple-free input current for renewable energy systems
Meier et al. Soft-switching high static gain DC–DC converter without auxiliary switches
Lin et al. Soft-switching converter with two series half-bridge legs to reduce voltage stress of active switches
Lu et al. High-conversion-ratio isolated bidirectional DC–DC converter for distributed energy storage systems
Kim et al. Isolated double step-down DC–DC converter with improved ZVS range and no transformer saturation problem
Sree et al. Impulse-commutated zero-current-switching current-fed three-phase DC/DC converter
Shi et al. Interleaved current-driven phase-shift full-bridge converter with magnetic integration and voltage doubler rectifiers
Lin et al. Hybrid DC–DC converter with high efficiency, wide ZVS range, and less output inductance
Kim et al. Triple-mode isolated resonant buck–boost converter over wide input voltage range for residential applications
Gao et al. A novel DCM soft-switched SEPIC-based high-frequency converter with high step-up capacity
Lin et al. ZVS DC/DC converter based on two three-level PWM circuits sharing the same power switches
Lai et al. A high-efficiency on-board charger utilitzing a hybrid LLC and phase-shift DC-DC converter
Lin et al. ZVS converter with parallel connection in primary side and series connection in secondary side
Burlaka et al. Bidirectional single stage isolated DC-AC converter
TWI238590B (en) High-efficiency DC/DC converter with high voltage gain
TWI238589B (en) High step-up converter with coupled-inductor by way of bi-direction energy transmission
Lin et al. Analysis of an integrated flyback and zeta converter with active clamping technique

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees