TW200532714A - Stacked-type chip varistor - Google Patents

Abstract

The laminated chip varistor 1 includes: a plurality of varistor layers 2, a varistor element 5 having internal electrodes 4a, 4b disposed to hold each varistor layer 2, and an external electrode provided at the end of the varistor element 5 and connected to the internal electrodes 4a, 4b. In this laminated chip varistor 1, the varistor layer 2 contains a ZnO as a main ingredient and a Pr as a sub-ingredient. The internal electrodes 4a, 4b contain Pd, Ag, and an Al oxide of 0.005 -1.0 mass pt. to total 100 mass pts. of the Pd and the Ag.

Description

200532714 IX. Description of the invention: [Technical field to which the invention belongs] The present invention relates to a laminated wafer varistor. [Prior art] A varistor is an element that can change its resistance value non-linearly by a voltage. For example, if a voltage exceeding a specified voltage value (variable resistance voltage) is applied, the resistance of the element will be greatly reduced, making it almost impossible to circulate. The characteristics of the current began to flow sharply. Rheostats with such characteristics are often mounted in electronic equipment and are used as protection elements that protect circuits from abnormal voltages caused by static electricity or lightning strikes. A varistor for circuit protection, for example, is connected in parallel to a power supply circuit in an electronic device, etc., and functions as an insulating element during normal operation. In addition, when an abnormal voltage called surge and interference enters an electronic device, the varistor will reduce its resistance value sharply according to the abnormal voltage. Therefore, it will act as a bypass for abnormal voltage caused by surge and interference. road. In this way, different # voltages can be prevented from entering the power supply circuit, thereby preventing damage to electronic equipment such as surges and interference. In recent years, the demand for miniaturization of electronic equipment has increased, and the varistor mounted on such electronic equipment is also required to be miniaturized. As can achieve the above

Multilayer wafer varistors that form external electrodes mostly use the internal electrodes of the Zn0-type multilayer wafer varistors. 98214.doc 200532714 Pt with heat resistance and sintering temperature at the time of formation of the varistor layer can be used. . However, pt is very expensive. Therefore, if Pt is used as the internal electrode, there is a problem that the cost of manufacturing a multilayer wafer varistor increases. Therefore, in order to reduce the manufacturing cost, there have been proposed multilayer chip varistors using Pd-Ag alloy, which is less expensive than Pt, as a material for internal electrodes. For example, Japanese Unexamined Patent Publication No. 5-283209 describes that a multilayer wafer has a variable resistance of 'which has: an internal electrode formed of a Pd-Ag alloy; and a variable resistance layer' which contains ZnO as a main component as a sub-component Contains Pr. In addition, Japanese Patent Application Laid-Open No. 10-12406 describes a multilayer wafer varistor having an internal electrode formed of a PLAg alloy, and a varistor layer including ZnO as a main component and Bi2 as a sub-component. 3 etc. In the multilayer wafer varistor described in these patent documents, since the internal electrode does not use expensive Pt, the manufacturing cost can be reduced and it is industrially useful. However, according to the above-mentioned Japanese Laid-Open Patent Publication No. 5_283209, the volume shrinkage difference of the internal electrode and the varistor layer occurs during sintering at the time of manufacturing, and therefore, defects such as peeling of the two may occur. In addition, recently, laminated wafer varistors have been mounted on the substrate by soldering, that is, the so-called surface-mounted varistors are increasingly used. However, according to the multilayer wafer varistor described in the aforementioned Japanese Patent Application Laid-Open No. 10-12406, the leakage current when a voltage is applied after soldering to a substrate tends to be too large to be ignored, and it is difficult to obtain it because of & Disadvantages of the required two voltage values. 98214.doc 200532714 To this end, as a multi-layer chip varistor capable of solving the above-mentioned problem of peeling of the internal electrode and the varistor layer, and the problem of leakage current after soldering, there are a variety of multi-layer chip varistors developed, which have: The varistor layer is mainly composed of ZnO and contains pr as a sub-component, and an internal electrode is obtained by adding Laoshan 3 to a conductive material made of Pd (for example, Patent No. μ Mg Publication). SUMMARY OF THE INVENTION However, as one of the important indicators showing the characteristics of a multi-layer chip varistor, a well-known tritium energy is known. & It is the value that shows the maximum electric energy when the change rate of the initial value of the variable resistance voltage is within ± 10% when the specified impulse current is applied, and it is the reference value of the durability of the multilayer chip varistor. The greater the resistance energy of the varistor, the harder it is to cause damage caused by abnormal currents such as surges, which can be considered as the higher reliability. When the present inventors reviewed the electric energy resistance of the multilayer wafer varistor described in the aforementioned Patent No. 3449599, they found that these varistor have sufficient electric energy resistance under the previously used element size, but when the element size is reduced, Specifically, when the interval between the internal electrodes is 60 pm or less, there is a phenomenon that the withstand energy is significantly reduced. Recently, multilayer chip varistor is expected to be further miniaturized. However, according to this miniaturization, the electric energy resistance as described above will be greatly reduced. Therefore, the purpose is not to have sufficient practicality in both miniaturization and electric energy resistance. Multilayer varistor. The present invention has been made in view of the above-mentioned background, and an object thereof is to provide a multilayer piezo varistor 'which can ensure a sufficient electric energy resistance of 98214.doc 200532714 points even in the case of miniaturization of components. The present inventor investigated the cause of the decrease in the electric energy resistance of the multilayer wafer varistor described in the above-mentioned Patent No. 3449599 as the size of the multilayer wafer varistor is reduced, and found that one of the reasons is that: The added pr easily reacts with the internal electrode material because of this reaction, the Pr in the varistor layer is absorbed to the internal electrode. As described above, when pr in the varistor layer is absorbed to the internal electrode, the coincidence concentration in the varistor layer will not only decrease, but also the varistor voltage will abnormally decrease, and the energy of the electricity will be reduced. In addition, as a result of a further review of the above phenomenon, it was found that the coincidence concentration becomes smaller especially in the peripheral region of the internal electrode, and the region where the Pr concentration becomes smaller leads to a decrease in the variable resistance voltage, which also causes financial and power generation. The decline of energy. Based on the above findings, the inventors found that by suppressing the absorption of the varistors into the internal electrodes, the electrical energy of the multilayer chip varistor can be sufficiently ensured, and the present invention has been completed. That is, the multilayer wafer varistor of the present invention is characterized by comprising: a varistor element body, which has a plurality of varistor layers with Zη0 as a main component and Pr as a sub-component, and an internal electrode. In addition, it contains A1 oxide with a total content of 10,000 to 1.0 parts by mass with respect to the above-mentioned Pd and the above-mentioned Ag, and is arranged approximately in parallel with each varistor layer sandwiched therebetween; and the outside The electrodes are arranged at the ends of the varistor element body and are respectively connected to the internal electrodes.

The internal electrodes in the above-mentioned laminated wafer varistor include two components of M 98214.doc 200532714 and A1 oxide as necessary components in addition to Pd, which is usually used as an electrode material. When this Ag and Al oxide are used in combination, they tend to be well absorbed into Pd. Therefore, the internal electrode with this # 5 component is almost saturated, and it is difficult to absorb more additives. In this way, in this multilayer chip varistor, as described above, the situation in which Pr in the varistor 0 layer is absorbed into the internal electrode will be suppressed, so that the reduction of the electrical energy resistance due to the decrease in the fertility of the varistor layer Pole: The ground becomes less. However, the effect of the present invention is not limited to this. As described above, in the multilayer wafer varistor of the present invention, it is rare that pr in the varistor layer is absorbed to the internal electrode. Therefore, in the varistor layer sandwiched by-pair = electrode, ρΓ will have almost uniformity. Concentration distribution. ° In addition, in the multilayer wafer varistor of the present invention, there is less migration of the internal electrodes in the varistor layer. Therefore, the variation p and layer in the multilayer wafer varistor are almost as not as significant as before 1

For those who have a curved plate, there is a decrease in the degree of P in the area connected to the internal electrode. In other words, .. ^ p /, the multilayer chip with the above-mentioned structure is in the variable resistance fasting, and is a pair of internal lightning forks ^

The content of Pr is close to the volume of the varistor layer, and the perforated layer is connected to a pair of internal electrodes. At least—the per unit volume of the fixed body in the region is approximately the same. . The η branch of this multilayer chip varistor has a pr concentration distribution of 6 persons as described above. The distribution U in the specified area of the uniform internal electrode < 1 layer adjacent to the lamination direction " ... the volume is the same as that of the varistor layer. The Pr content of the mother fixed volume in i is analyzed approximately according to the laminated analysis method with these structures. When the blocker is analyzed by an electronic microscopic knife, the following results can be obtained: that is, The X-ray intensity of Pr obtained from the area where an internal electrode is connected in a varistor layer sandwiched by a pair of internal electrodes will be between 982l4.doc 10 200532714 and one of the internal electrodes. The X-ray intensity of pr obtained at the center position is about the same. As a result, there is a tendency to cause a significant decrease in electric energy resistance. On the other hand, the multilayer wafer varistor of the present invention having the above-mentioned structure is capable of significantly suppressing the decrease in Pr concentration as described above. Therefore, when the distance between the internal electrodes is set to 20 to 60 μm, the electric energy resistance is used. From the point of view would be particularly effective. More specifically, in the above-mentioned laminated wafer varistor, the interval between the internal electrodes is preferably 20 to 60. When the interval between the internal electrodes is large as in the past, that is, when the thickness of the varistor layer is large (specifically, it exceeds 80 °), although the peripheral area of the internal electrode caused by the absorption of Pr as described above can be seen The Pr concentration decreases, but there are many areas with sufficient farming degree in the varistor layer, so 'the situation of the reduction of the electric energy resistance is not too great'. However, when the interval between the internal electrodes is less than 60 μχη, The region having a low concentration may change. In the multilayer wafer varistor described above, it is preferable that the internal electrode contains 1 to 95 parts by mass of Ag with respect to 100 parts by mass of pd. When the internal electrode is configured as described above, it is possible to more significantly suppress absorption of pr, and as a result, it is easy to ensure a sufficient amount of financial energy. [Embodiment] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In addition, the same components will be marked with the same symbols, and repeated explanations will be omitted. In addition, the relationship between up, down, left, right, etc. is subject to the positional relationship of the drawings. 98214.doc 11 200532714 T First, the multilayer varistor of this embodiment will be described with reference to FIG. 1. FIG. 1 is a cross-sectional view of a multilayer wafer varistor schematically showing a preferred embodiment. The multilayer wafer varistor 1 has a plurality of varistor layers 2 and

The varistor element body 5 composed of the internal electrode 4a (first internal electrode) and the internal electrode 4b (second internal electrode) of each varistor layer 9M + L 爻 洱 layer 2 is sandwiched. On both ends of the branch & element body 5, there are provided external electrodes 6 which are electrically connected to the internal electrode 4a and the internal electrode 4b, respectively. In addition, on the outer side of the external electrode 6, a bond Ni layer 8 and an ore Sn layer 10 are sequentially formed and covered on the external electrode 6. The external terminal 12 is constituted by Chu: -Al A & etc. external rhenium electrode 6, Ni plating layer 8 and Sn plating layer 10. The varistor layer 2 contains ZnO as a main component and W as a sub-component, and has a thickness of about 5 to 60 μm. This varistor layer 2 contains the above two components as essential components, and therefore, has excellent varistor characteristics of a non-linear coefficient (α) college which has one of the indexes showing varistor characteristics. The varistor layer 2 may contain, in addition to the above-mentioned components, trace amounts of additives that can further improve the varistor characteristics, for example, it may contain metals such as c0, A1, κ, na, and any combination of these oxides. Among them, the A1 oxide is preferred as a trace amount of the additive contained in the varistor layer 2 and particularly preferred. By containing the A1 oxide in such a manner, the non-linear index ⑷ tends to further increase. The most suitable example of the material constituting the varistor layer 2 is 97.725 mol% with Z n 〇. 1 * is 〇5 mol 0 / " Fu Kai / ° Lo is 15 mol. / 〇, A1 is 0.05 mole%, K is 0.05 mole%, Cr is mole%, Ca is (M mole%,

Si is a composite material of 0.02 mol%. 98214.doc -12-200532714, the internal electrodes 4a, 4b are formed of a conductive material containing ytterbium and an A1 oxide added to the conductive material, and have a thickness of about 0.5 to $ 400. The content of the A1 oxide in the inner P electrodes 4a and 4b is based on the total rigid parts of pd and ". In addition, as the A1 oxide added to the conductive material, Al203 is preferable. In the internal electrodes 4a and 4b, if the content of A1 oxide is less than the total weight of each other, the internal electrical resistance during sintering of the varistor layer: 4a. , The two will be separated: Yu: In addition-if the amount exceeds ㈣, the internal electrode will be difficult to sinter. Therefore, the conductivity becomes lower and the conduction of the external electrode becomes insufficient. Reduced tendency. In addition, it is preferable that pd_ which is a conductive material in the internal electrodes 4a, 4b is contained in the ratio shown below: That is, 1 to 95 parts by mass of Ag is preferable to Pdέ parts by mass. If the core content is less than 1 part by mass with respect to 100 parts by mass of Pd, the degree of absorption of the internal electrodes 4a and 4b in the variable resistance will increase, and thus the electric energy resistance of the multilayer chip varistor i tends to decrease. On the other hand, if the amount exceeds 95 parts by mass, the melting point of the internal electrode 4a may be too low, which may cause the tritium electrode 4a to decompose and fail to provide good rheostat characteristics. The varistor element body 5 is the varistor layer 2 and the internal electrode 4a described above, and is a cross-product. The varistor element body 5 is formed with 10 to 5 on its end. _: A pair of external electrodes 6 'of the right thickness are electrically connected to one of the internal electrodes ... respectively. The constituent material of the external electrode 6 is not limited as long as it can be well connected to the internal electrodes 98214.doc 13 200532714. The electrodes 4a and 4b are, for example, alloys made of any of these metals including Pt, Ag, and any combination thereof. . Among them, plutonium which is relatively inexpensive and has good characteristics of bonding with the internal electrode to the electrode is preferred. On the surface of the outer electrode 6, a plated layer with a thickness of about 0.5 to 2 tons and a layer with a thickness of about 10 mm are formed in order to cover the external electrode 6 in order to form a layer of 10 °. The purpose is to improve the multilayer chip varistor! It is formed by solder heat resistance and solder wettability when mounted on a substrate or the like by a reflow process. Accordingly, in the case where this can be achieved, it is not necessary for the plating layer formed on the surface of the external electrode 6 to be a combination of the above materials. For example, as other materials constituting the clock layer, Sn_pW gold and the like are used, for example, and it is also suitable to use a combination of Ni and Sn. In addition, the related plating layer may be a layer composed of only one layer. In the multilayer wafer varistor with such a structure, the varistor layer 2 sandwiched between the pair of internal electrodes 4a and 4bfs1 has a state of being approximately uniformly dispersed as a secondary component. The laminated wafer varistor of the present invention has I: a resistive layer in this state. As shown below, it has better varistor characteristics than the conventional one. The differences between the multilayer varistor of the present invention and the conventional multilayer varistor of the present invention are described below with reference to Figs. Figures 2 to 5 show the observation of a conventional multilayer wafer varistor (a multilayer wafer varistor having an internal electrode formed by pd and a varistor layer containing 2110 and Pr) using an electronic microprobing analysis method (EPMA). An example of the result. In addition, in FIG. 2 and FIG. 4, the closer to white (the lighter the color), the larger the pr concentration 98214.doc -14- 200532714. In addition, Fig. 3 φ, τ, π — r L1 shows the X-ray intensity of Pr, and L2 shows the x-ray intensity of Pd. In addition, in the figure T P ^ ^) rP ′ L3 shows the X-ray intensity of pr, and L4 shows the X-ray intensity of Pd. The picture is "* pair / σ | A graph of ρ ^^ light intensity obtained by micro-analysis of EpMA along the stacking direction. With reference to Figs. 2 and 3, it is confirmed that in a multilayer type wafer with an internal electrode interval of 80%, the resistance of the multilayer wafer is medium, and the regions where the variable resistance layers are connected to the internal electrodes have a very small concentration. In addition, it was confirmed that the central region between the pair of internal electrodes has a higher Pr concentration than the region adjacent to the internal electrodes. Furthermore, FIG. 4 is a graph showing the concentration distribution of Pr obtained by observing a cross section of a multilayer wafer varistor of a multilayer wafer varistor with an internal electrode interval of 20 μm as observed by EPMα. In addition, FIG. 5 is a graph showing the light intensity obtained by performing a microscopic analysis on the cross-section observed in FIG. 4 with EPMA along the lamination direction. From Figs. 4 and 5, it was confirmed that most of Pr exists at a position overlapping the area where the internal electrodes exist '. The Pr concentration (Fig. 4) of each varistor layer and the X-ray intensity (Fig. 5) of Pr become extremely small. Here, among the Pd and the varistor layer as the constituent material of the internal electrode? ] «Is highly reactive. Therefore, in the conventional multilayer wafer varistor having the above structure, by this reaction, Pr in the varistor layer will be absorbed in the internal electrode, as shown in FIG. 2 to FIG. 5, and connected to the area of the internal electrode. The ρΓ concentration becomes smaller. If the Pr concentration in the region connected to the internal electrode is reduced in this way, the pr present in the crystal grain boundaries of ZnO in the region of 98214.doc -15-200532714 will be extremely small. In general, the varistor characteristics of a k-resistance layer containing Zn0, particularly characteristics such as non-linear coefficient and electric energy resistance, are considered to be quite dependent on Pr existing in the grain boundary of ZηO. Therefore, a decrease in the amount of bubbles existing in the grain boundary of 'Znη0 will result in a significant decrease in these resistance properties. The above-mentioned absorption of Pr by the internal electrode can be clearly seen in the region from the contact surface facing the internal electrode in the varistor layer to a distance of about 10 μm. Therefore, the smaller the interval between the internal σ 卩 electrodes, Specifically, the degree of reduction of the varistor characteristics of the varistor layer in the “monthly condition” of 60 μm or less is large. Therefore, the varistor characteristics of the multilayer wafer varistor tend to be lowered, especially in the internal When the distance between the electrodes is 20 μm or less (refer to FIGS. 4 and 5), most of Pr in the varistor layer is absorbed by the internal electrodes. On the other hand, FIG. 6 is a diagram showing an example of a result of observation of the multilayer wafer varistor 1 according to the preferred embodiment of the present invention with EPMA. In addition, in the multilayer wafer varistor shown in FIG. 6, the interval between the internal electrode 4 a and the resistor is 20 μm. Also, Fig. 6 is a graph showing the concentration distribution obtained by observing a cross section along the stacking direction of the multilayer wafer varistor 1 according to the embodiment with EPMA. According to Fig. 6, it was confirmed that Pr hardly existed in the area overlapping with the internal electrode 4a and the electrode, but existed uniformly in the varistor layer 2. In addition, since pr exists so uniformly, it is confirmed that the concentration of h in the region connected to the internal electrode in the varistor layer 2 is P r in the central region between the internal electrodes in this varistor layer 2. 》 Chen degree is about the same. Multilayer chip varistor of this embodiment! In addition, the internal electrodes 乜 and 除 contain Ag & A1 oxide in addition to 98214.doc 16 200532714 and Pd. For this reason, the internal electrodes 4a and 4b are in a state close to saturation, which makes it extremely difficult for the internal electrodes 4a and 4b to absorb the varistor layer 2 as described above. Furthermore, as a result of the absorption of Pr being suppressed as described above, as shown in FIG. 6, Bu becomes a uniformly dispersed state in the varistor layer 2, that is, it has an approximately fixed 2 concentration distribution in the varistor layer 2. status. In the varistor layer 2 having such a uniform Pr distribution state, it rarely occurs in the area connected to the internal electrode as in the conventional multilayer varistor.

When Pr concentration decreases. That is, the Pr content per fixed volume in the varistor layer 2 sandwiched by a pair of internal electrodes 牦 and the servant ^ will be in a region where at least one of the internal electrodes 4a, 4b is connected to the varistor layer 2. The Pr content is approximately the same per fixed volume. In addition, the above state of the varistor layer 2 can be expressed as follows: That is, the varistor layer 2 sandwiched by a pair of internal electrodes 4a and 4b is connected to at least one of the internal electrodes 4a and 4b. The content of pr per fixed volume will be approximately the same as the content of Pr per fixed volume in the central region between the pair of internal electrodes 4a, 4b in the k-resistance layer 2. Here, the region of the varistor layer 2 that is connected to the internal electrodes 4a, 4b, in the preferred case, means that the varistor layer 2 has a distance of about 10 μm from the connection surface with the internal electrodes 4a, 4b. Up to the location. Next, a method for manufacturing the multilayer wafer varistor 1 having the above-mentioned structure will be described with reference to Fig. 7. Fig. 7 is a flowchart of a method of manufacturing a multilayer wafer varistor showing a preferred embodiment. First, 'znO of the main component and pr of the secondary component of the varistor layer 2 98214.doc 200532714 metal or oxide, and other trace additives are weighed to obtain the ratio of Huyi, and then the components are mixed to adjust Varistor material (step s⑴. In the second case, a small amount of additive is added to the main component, and the amount is better. After that, an organic binder, organic solvent, organic Plasticizers are mixed and pulverized using a ball mill or the like for about 2q hours to obtain a grinding liquid. This grinding liquid is applied to polyethylene terephthalate by a known method such as a trowel (D. coffee brie) method. After the (PET) film is applied, it is dried to form a film having a thickness of approximately equal to a matrix, and the obtained film is separated from ρΕτ to obtain a embryo sheet (step S12).

Next, a coin-shaped head electrode paste made of Pd, Ag, Al2a, and other additives was used as a material for the internal electrode hardening. This internal electrode material is printed with a pattern of a shirt by screen printing or the like, and the polymer material is then dried 'to form an internal electrode paste layer having a predetermined pattern (step S13). It is assumed that a plurality of embryos having the internal electrode aggregate layer formed on the surface are laminated into a plurality of embryonic sheets and an internal electrode slurry layer to form a laminated body (step S14). According to the laminated body thus obtained, it is necessary to further laminate the protective embryo sheet obtained by laminating only the aforementioned embryo sheet, and then cut it into a desired size to obtain an embryo wafer. ^ This embryo is said to be heated by heating at 180 to 400 ° C for 0.5 to 24 hours. After the tongue-point mixture is processed, it is further fired at 1000 to 1400 ° C, 0.5 to 8 Xiaowei + _ Yu Youyou (Step S 15), and a varistor element body 5 is obtained. Hunting ^ Wenjie of the Phase 5 Stomach ~ The embryo lamella in the 'embryonic wafer' will become the varistor layer 2 and the internal electrode slurry is laminated with moxibustion. The double horse internal electrodes 4a and 4b. For the varistor 98214.doc -18- 200532714 thus obtained, the formation of the external electrode June 1J can be performed in a smooth manner-and put into the grinding container with the grinding material and the like for smooth processing. Ten watches followed by '4a and 4b are connected to the two ends of the varistor element body 5, and the external electrode aggregate material mainly containing Ag is coated on / and the internal electrode cloth is broadcasted to the aggregate material with 55G to 8 The left and right heating (sintering) treatment is performed, and the pair of external electrodes 6 formed of Ag in a shape 1 (step si6). After that, on the surface of the external electrode 6, moss was formed by Leibangwang® and then electroplated to form a Ni plating layer 8 and a Sn plating layer 10 in this order to obtain a multilayer wafer varistor (step M?). According to the multilayer wafer varistor 1 thus constructed, the following results can be obtained: that is, a multilayer wafer varistor! The varistor layer 2 has a state of being dispersed at a substantially constant concentration. Therefore, compared with a conventional multilayer wafer varistor having a very small Pr concentration in a region connected to the internal electrode, the varistor layer 2 has an excellent non-linear coefficient (α ) And electrical energy. In addition, in this multilayer wafer varistor 1, even if the internal electrode and the outer space are 20 μm or less, almost no pr is absorbed by the internal electrode 4a or the slave. Therefore, even when a large-scale miniaturization of an element is attempted, a decrease in electric withstand energy that would occur in a conventional varistor rarely occurs. [Examples] Hereinafter, the present invention will be described in more detail by way of examples, but the present invention is not limited to these examples. < Manufacturing of multilayer wafer varistor > First, Pr (0.5 mol%), Co (1.5 mol%), Al (0.005 mol%), K was added to ZnO (97.725 mol%) with a purity of 99.9%. (〇.05 mol%), 98214.doc -19- 200532714

Cr (0.1 mol / 0), Ca (0.1 _1%), and Si (ο ′] m〇1%) to modulate the variable resistance material. In addition, an internal electrode paste containing at least two kinds of pd, Ag, and Al203 was prepared according to the formulation amounts shown in Tables 1 to 3. Using this moxa resistance material and internal electrode paste, according to the steps shown in FIG. 7, a varistor layer 2 made of a varistor material 2 including pd, ^, and two kinds of inner σ 卩 electrodes from 0 to y are manufactured. 4a, 4b, a multilayer wafer varistor composed of an external electrode 6, a plating layer 8 and a Si plating layer 10 and having a shape shown in FIG. Each laminated chip varistor has dimensions of 16 sides in length, 0.8 mm in width, and 0.8 mm in height. In addition, as for the multilayer wafer varistor No. 1, 2, 10, 18, 26, 33, 34, and 41, the content of these 8203 is 0%, so as a comparative example, as for No. 8, 16, In the case of laminated wafer varistors of 24, 32, 40, and 47, the content of these AIA3 is more than 1 part by mass, and therefore it is used as a comparative example. < Characteristic evaluation > Using each laminated wafer varistor, the measurement of the varistor voltage was performed as shown below, the measurement of the "non-linearity index", the measurement of the electric energy resistance, and the wet load resistance test. The results obtained for the laminated wafer varistors of the plates 1 to 18 are shown in h, and the results obtained for the laminated wafer varistors of the plates 19 to 36 are shown in Table 2. The results obtained for the laminated wafer varistors of the plates 37 to 47 are shown in Table 2. The results are shown in Table 3. (Measurement of Varistor Voltage) Between a pair of external terminals 12 in each multilayer varistor, a voltage is gradually applied and gradually increased, and a voltage at which a current of 1 mA starts to flow is taken as each 98214.doc -20- 200532714 varistor Varistor voltage. (Measurement of Nonlinearity Index (α)) While gradually changing the voltage applied to a pair of external terminals 12 of each multilayer chip varistor, the current value flowing through the varistor was measured, and the current flowing through j mA was measured. The voltage at the time (VlmA) and the voltage at which a current of 0.1 mA flows (V.lmA). Next, the obtained value is substituted into the following formula (1) to calculate the non-linear index α: a = log (1 / 0.1) / lOg (VimA / V〇.imA) to (l) (of the electric energy resistance Measurement) First, between a pair of external terminals 12 of each multilayer chip varistor, 90% of the peak value after 10 μs from the rise is applied while observing with an oscilloscope, and after reaching the peak value, it rises 1,000 times from the rise. The voltage of a waveform that becomes 50% of the peak value after μ seconds, and the current waveform obtained by applying the voltage of this waveform is observed with an oscilloscope. After multiplying the obtained voltage waveform and current waveform to obtain a power waveform, the power waveform is integrated to calculate the electric energy value when the voltage of the above waveform is applied. In addition, gradually increase the electric energy value, and consider the laminated chip varistor to be destroyed when the rate of change of the varistor voltage exceeds ± 10%, and use the maximum value of the amount of electricity that has not been broken as the electrical energy resistance (parts: Joules). (Moisture Resistance Load Test) First, 20 laminated varistors of No. 1 to 47 were fabricated, and the varistor voltage of each sample was measured. A voltage of 0.6 times the respective varistor voltage was applied to these samples while the voltage was 85. 〇, 80% RH under the conditions of 1,000 hours of moisture load test. After that, the varistor voltage of each sample after the 98214.doc 21 200532714 wet load test was measured. Twenty samples of the multilayer wafer varistor from No. to 47 were too φ, and the leaves were different The number of samples whose rate of change of varistor voltage exceeds + 10% is the number of unqualified products. Occurs due to the moisture resistance load test [Table 1]

98214.doc

-22- 200532714

According to Tables 1 to 3, the internal electrode " electrode contains Pd, Ag, and Al203, and the content of a1203 is within the scope of the present invention &# @ ^ n ^ The laminated wafer varistor has more than 0.1lj 、 The spoon is only equipped with the electric dagger, and the unqualified product due to the wet load test is 0. The above-mentioned electric energy resistance is generally used to judge a person having sufficient reliability when a multilayer chip varistor is used. < By the observation of the cross section of the multilayer chip varistor of EPMA> A multilayer chip varistor using No. 1 (a multilayer type varistor with internal electrodes only composed of others; serving as a comparative example) and a multilayer type of No. 45 Wafer varistor (multilayer wafer with Ag / pd with internal electrode composition of 70/30 98214.doc -23- 200532714 varistor; as the multilayer wafer varistor of the present invention), according to the method shown below, The analytical method (EPMA) was used to measure the concentration distribution of each component (Pr, Co, Pd, and Ag) in the multilayer wafer varistor. First, each of the multilayer chip varistor is polished from the widthwise side (left-right direction in Fig. 1) to the cross-section corresponding to the center position in the lengthwise direction (forward and backward in Fig. 丨). The exposed profile was observed with EPMA 'to observe the concentration distribution of each element on this profile. The concentration distributions of pr, C0, Pd, and all the compositions obtained by observing the multilayer-type diurnal tablets of No. 1 changing fast are shown in Figs. 8 to 11 respectively. In addition, the concentration distributions of Pr, Co, Pd, Ag and all compositions obtained by observing the multilayer wafer varistor of No. 45 are shown in Figs. 12 to 16 respectively. In addition, in Figs. 8 to 16, the lighter area indicates that the corresponding element content is larger. From FIGS. 8 to Π, it is known that in the multilayer chip varistor equivalent to No. 1 of the conventional multilayer chip varistor, pr is at a position overlapping with pd, that is, at a position where an internal electrode is present- There are many, Pr is very small in the varistor layer. On the other hand, as shown in FIG. 12 to FIG. 16, it was found that in the multilayer wafer varistor equivalent to No. 45 of the multilayer wafer varistor of the present invention, h is at a position overlapping with Pd and Ag—that is, At the position where the internal electrode is present _ hardly exist 'In addition, Pr is in a state of uniform distribution in the varistor layer. As described above, according to the present invention, a multilayer wafer varistor capable of securing sufficient electric energy resistance can be provided even in the case of miniaturizing a device. [Brief Description of the Drawings] FIG. 1 is a cross-sectional view of a multilayer chip rheostat 98214.doc 200532714 that schematically shows a preferred embodiment. Fig. 2 is a graph showing the concentration distribution of a multilayer wafer varistor obtained by observing the internal electrodes at a distance of 80 µm along a stacking direction, as viewed from a cross section. Fig. 3 is a graph showing the X-ray intensity of Pr obtained by carrying out a secretive analysis of EPMA along the lamination direction on the section observed in Fig. 2. Fig. 4 is a diagram showing the distribution of the pr sound intensity obtained by observing the part of the multilayer wafer varistor with an interval of 20 μm from the internal electrode along the stacking direction with EPMA. & Fig. 5 is a graph showing the X-ray intensity of Pr obtained by analyzing the cross section observed in Fig. 4 along the stacking direction with ρρα. FIG. 6 is a graph showing the concentration distribution of pr obtained by observing the cross section of the multilayer wafer varistor 1 of the embodiment along the stacking direction with EPMA. Fig. 7 is a flowchart of a laminated wafer varistor method showing a preferred embodiment. Fig. 8 is a graph showing the distribution of Pr agronomic properties in the cross section of the multilayer wafer varistor of No. 1 observed by EPMA. FIG. 9 is a graph showing a C o concentration distribution in a cross section of a ν0.1 laminated chip varistor observed by EPMA. FIG. 10 is a graph showing the Pd concentration distribution on the cross-section of the variable resistance of a multilayer wafer of N0.1 as observed by EPMA. Is a varistor. FIG. 11 is a graph showing the concentration distributions of all the components on the cross section of the multilayer wafer of No. 1 observed by EPA. FIG. 12 is a graph showing a Pr concentration distribution on a cross section of a No. 45 multi-layer wafer 98214.doc -25-200532714 as observed by EPMA. FIG. 13 is a graph showing the distribution of Co concentration on the cross section of the multilayer wafer varistor of No. 45 as observed by EPMA. FIG. 14 is a graph showing the Pd concentration distribution on the cross section of the multilayer wafer varistor of No. 45 as viewed by EPMA. FIG. 15 is a graph showing the Ag concentration distribution on the cross section of the multilayer wafer varistor of No. 45 as viewed through EPMA. FIG. 16 is a graph showing the concentration distributions of all the components on the cross section of the multilayer wafer varistor No. 45 as observed by ρρα. [Description of main component symbols] 2 4a ^ 4b 5 6 8 10 12 Multilayer chip varistor Varistor layer Internal electrode Varistor element body External electrode Ni-plated layer _ Qian Sn layer External terminal 98214.doc -26-

Claims (1)

200532714 10. Scope of patent application: 1. A laminated chip varistor, comprising: a varistor element body, which has: Pr of a plurality of varistor layers; and 'It is mainly composed of ZnO and contains as an internal component An electrode containing Pd, Ag, and a total of 100 parts by mass of the above-mentioned pd and Ag containing μ-oxide from 0.001 to 丄 mass parts, and the electrodes are approximately parallel to sandwich each of the varistor layers. Ground configuration; the ends of the resistor element body are respectively external electrodes, which are arranged on the transformer and connected to the internal electrodes. 2. A multilayer wafer varistor as described in the above item, wherein the varistor layer sandwiched by the pair of internal electrodes described above has a substantially constant concentration distribution. 3. If requested! A laminated wafer varistor, wherein the content of the & per fixed volume of the varistor layer sandwiched by a pair of the internal electrodes and each of the regions of the varistor layer connected to at least one of the pair of internal electrodes The content of the above-mentioned Pr in a fixed volume is approximately the same. 4. The multilayer wafer varistor according to claim 1, wherein the content of Pr in each fixed volume of the region of the varistor layer sandwiched by a pair of the internal electrodes and connected to at least one of the internal electrodes and the varistor The content of h in the central region between the pair of internal electrodes of the layer per fixed volume is substantially the same. 5 · The multilayer varistor according to claim 1, wherein 98214.doc 200532714 is analyzed by the electron beam microprobe analysis method. The varistor layer sandwiched by the internal P electrode is connected to the above. The X-ray intensity of the Pr that is known in the region of the electrode is substantially the same as the X-ray intensity of the Pr that is obtained at the center position between the pair of internal electrodes of the varistor layer. 6. The multilayer chip varistor according to any one of claims 1 to 5, wherein the interval between the internal electrodes is 20 to 60 μηι. 7 · The multilayer chip varistor according to any one of claims 1 to 6, The internal electrode contains 1 to 95 parts by mass of the Ag for 00 parts by mass of the Pd i. 98214.doc