TW200523599A - LCD device and manufacturing method thereof and transistor array substrate and manufacturing method thereof - Google Patents

Abstract

The invention discloses a LCD device and manufacturing method thereof and transistor array substrate and manufacturing method thereof. The manufacturing method of the aforementioned LCD device includes: providing a substrate formed with an etched barrier layer thereon, forming a source-drain area on the etched barrier layer, forming an insulation layer on the etched barrier layer, disposing a plurality of mutually parallel gate lines and a plurality of mutually parallel data lines on the insulation layer which the gate lines are perpendicular to the data lines, defining a display area bounded by two adjacent data lines and two adjacent data lines, forming electrical connection between the mentioned source and one of the two adjacent data lines, etching the insulation layer of the display area until the barrier layer is exposed so as to increase the light penetration, forming a pixel electrode on a protection layer of the display area and forming an electrical connection between the pixel electrode and the drain, providing a second substrate disposed on top of the first substrate, bonding the first and the second substrates, and filling liquid crystal between the first and the second substrates.

Description

200523599 V. Description of the invention (1) · ~ "'---; "; TECHNICAL FIELD OF THE INVENTION The present invention relates to a liquid crystal display and a method for manufacturing the same, and more particularly, to a liquid crystal display capable of improving Newton's ring phenomenon and the manufacturing thereof. method. The prior art liquid crystal display (1 i qu id cr ysta 1 di sρ 1 ay, hereinafter referred to as LCD) is the mainstream of current flat display development. Its display principle is to use the dielectric anisotropy and conductive anisotropy of liquid crystal molecules. When an electric field is applied, the arrangement state of liquid crystal molecules is changed, which causes various photoelectric effects of the liquid crystal film. The panel structure of a liquid crystal display is generally formed by stacking two substrates, with a certain gap in the middle to fill the liquid crystal, and corresponding electrodes are formed on the upper and lower substrates, respectively, to control the orientation and alignment of the liquid crystal molecules. The panel of a general thin film transistor (TFT) liquid crystal display is composed of a TF T array substrate provided with a thin film transistor array and a color filter substrate provided with a color filter film layer. FIG. 1 illustrates a detailed structure of a TFT array substrate. FIG. 1 shows a partial cross-sectional view of a T F T array substrate. As shown in FIG. 1, a polycrystalline silicon layer is provided on an insulating substrate (such as glass, quartz, etc.) 〇1, which is divided into a source region doped with impurities 〇 02, a drain region i 〇3 And the channel area 104; the gate insulating layer 107 is covered on the insulating substrate 010; the gate 108 is disposed on the gate insulating layer 107; and an interlayer insulating layer 1 12 is covered On the substrate 1 01; between the interlayer insulation layer 丨 2 and the gate insulation layer 1 〇7

0773-10405TWF (Nl); P92051; phoe1i pp td Page 5 200523599 V. Description of the invention (2) A contact hole 1 1 0, 1 1 1 is formed between them, and a source electrode 1 2 2 passes through the contact hole 1 1 0 is electrically connected to the source region 1 0 2; the drain electrode 1 2 3 is electrically connected to the drain region 1 0 3 through the contact hole 1 1 1. A protective layer 130 covers the source electrode 122, the drain electrode 123, and the substrate 101, and has a contact hole 130a to electrically connect the pixel electrode 105 to the drain electrode 1 2 3. This substrate 101 is combined with a color filter substrate to form a liquid crystal display panel. In the first figure, the area where the daylight electrode 丨 0 5 is located is a predetermined display area (that is, a light-transmitting area). Since the insulating layers such as the gate insulating layer 107 and the interlayer insulating layer 1 12 are not moved in this area. In addition, after the panel is manufactured, 'the external incident light will reflect on the insulating layer on this transparent area, and then form interference fringes with the light reflected on the color filter substrate, thereby forming a Newton's ring phenomenon'. The appearance of the LCD monitor. In addition, too thick an insulating layer above the light-transmitting area will also absorb the backlight, reducing the brightness of the light and consuming the energy of the backlight. SUMMARY OF THE INVENTION In view of this, the object of the present invention is to improve the Newton's ring phenomenon of a liquid crystal display and reduce the consumption of backlight energy. In order to achieve the above object, the present invention avoids the Newton's ring phenomenon formed by external light entering the liquid crystal panel and reflecting through the insulating layer of the transparent repair region by removing the insulating layer above the display area (ie, the light transmitting area). In addition, removing the insulating layer on the light-transmitting area can increase the transmittance of the backlight and consume functions. % | Thereby reducing backlight energy The liquid crystal display panel provided by the present invention includes an upper substrate, a liquid

200523599 V. Description of the invention (3) ^ a crystal layer and a lower substrate, wherein an etch barrier layer is formed on the lower substrate; a source-drain region is formed on the etch barrier layer; an insulating layer covers the above-mentioned money-blocking layer, and An etching barrier layer is exposed in the display area (light-transmitting area); a plurality of gate lines parallel to each other and a plurality of data lines parallel to each other are disposed on the above-mentioned insulation layer, where the gate lines and the data lines intersect perpendicularly, and The adjacent two gate lines and the adjacent two data lines are defined as the aforementioned light-transmitting area, and the source is electrically connected to one of the adjacent two data lines; a pixel electrode is formed in one of the light-transmitting areas. On the protective layer and forming an electrical connection with the drain. The invention also provides a transistor array substrate for a liquid crystal display, comprising: a substrate on which a transistor region and a display region are defined; an etching resist layer is formed on the substrate; and a transistor is disposed in the transistor region for etching. On the broadcast blocking layer, a protective layer covers the transistor and the display area; and a day electrode is formed on the protective layer and is electrically connected to the transistor through a contact hole. In this method, an etching element electrode is formed in a line defining a line of a source barrier layer. The transistor array substrate is fabricated into a resist etching layer; an insulating layer is formed to etch the gate line and a plurality of mutually flat gates. Polar line and adjacent two data lines The above-mentioned source and the adjacent two data engraved light-transmitting areas of the insulating layer to the exposed light transmittance; forming a day to form an electrical connection with the drain electrode. The manufacturing method includes: providing a liquid crystal display device including: providing a substrate with an upper electrode-non-electrode region on a money-carrying resist layer; and providing a plurality of parallel material lines on the insulating layer, A display area (that is, a light-transmitting area) is adjacent to each other, and a data line forms an electrical connection; the last layer is a barrier layer to increase the light-transmitting area on the light-transmitting area. LCD Monitor

200523599 V. Description of the invention (4) ^ '\ A first substrate' is formed with an etch barrier layer thereon; a source-an electrode region is formed on the transparent remaining barrier layer; an insulating layer is formed on the transparent I Insect-carved barrier layer; a plurality of gate lines parallel to each other and extending in the lateral direction are arranged on the above-mentioned insulating layer ', and at least one display area (light-transmitting area) is defined between the gate lines, The insulating layer in the light-transmitting area is exposed until the etching barrier layer is exposed to increase the light transmittance of the light-transmitting area; a plurality of lean material lines parallel to each other and extending in the longitudinal direction are arranged on the above-mentioned insulating layer, which avoids the above-mentioned light transmission The position of the region intersects the gate line perpendicularly and forms an electrical connection with the source electrode. A crystalline element electrode is on the light-transmitting region, and the day element electrode is electrically connected to the drain electrode; provide A second substrate is disposed between the corresponding first and second substrates. * Contrary to the first substrate, and infusion of liquid crystal in accordance with the present invention, the above-mentioned etching stopper is not limited, and may be indium tin oxide (1st quarter ^ Gui is a transparent material negative.) According to the present invention, the above substrate may be broken. Zinc (ΙZO). It can be indium tin oxide or indium oxide. Yu or Shi Yang, pixel electrode layer. According to the present invention, the liquid crystal above shows that the adjacent two closed electrode lines are connected to the inter-electrode line 2 = closed electrode. According to the present invention, the liquid crystal display device described above can be connected via a contact hole through an insulating layer to make a phase: the source electrode in the method can form an electrical connection; The day element can be electrically connected to the drain via a data hole in a Beco line. + The step from another contact layer through the insulation layer can be described above;: hole :: hour: hour The insulation below the transparent area is removed, that is, the transparent area is removed

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The lower insulating layer does not need to add additional steps or increase the production cost. In order to make the above-mentioned and preferred embodiments of the present invention more specific, the purpose, features, and advantages are more obvious and easy to understand. Icon for detailed description such as

Implementation method The embodiment of the present invention is a cross-sectional view showing the flow right of a tft-lcd active array substrate in this embodiment, and is a top view of a 9 p 4 column substrate. The picture shows the TFT_LCD active array of the present embodiment. First, as shown in FIG. 2A, an etch stopper 2 is formed thereon, and a substrate 1 such as glass is placed in tin. Then in the etching barrier two: two: the quality is for example transparent indium oxide

SiO2. After that, on the buffer layer \, a buffer layer 3 is made, for example, layer). The polysilicon layer 4 (polysilicon, as shown in FIG. 2B) is then made to have a polycrystalline stone layer 4 doped with a doped pair of silicon layer 4 and implanted with ion implantation, an undoped channel region. 14: the source region 16, the drain region 17 'of the virtue, and the electrode insulation layer 10 and a gate electrode 12. A gate plate 1 is formed on the substrate 1 in order. -The interlayer insulating layer 18 is based on SiNx 4Si02. The material of the interlayer mortar layer 18 is, for example, as shown in Figure 2C, the gate insulating layer 10 above the insect-raising material is broken, and the gate insulation layer 10 is broken; , Pole region 16, drain region 1 7, and interlayer insulating layer U to form a contact hole 18a

200523599 V. Description of invention (6) and 1 8b. At the same time, the gate punch layer 3 and the interlayer insulating layer 18 located in the predetermined region 5 are etched to expose the etched resist layer 2: = stop-to reduce the thickness of the insulating layer above the predetermined region 5. "', So m = ί :: Mingzhong added a barrier layer 2 on the substrate 1, because the wrong time can be adjusted by adjusting the surname engraving time required for the contact holes 18a, 18b, and the surname engraving is removed from the predetermined area 5 Gate insulation layer 丨 〇 and up to the surface of the barrier layer 2. This step has the effect of: = 2 2 ## Μ 'to increase the process tolerance (Process window), while reducing the backlight Probability that the predetermined region 5 will be reflected due to the influence of the pole insulating layer 10 and the interlayer insulating layer 18. In addition, 'the etch rate of the etch solution to the polycrystalline crystalline layer 4 is low, so when the contact holes 18a, 18b, Polycrystalline stone layer 4 can play the role of an etching barrier layer, so it will not affect the electrical properties by increasing the overall etching time. Then 'as shown in Figure 2D, a conductor layer (not shown) is first deposited on layer two, 'Eupper ice layer 18, and then a lithographic etching step is performed to remove a part of the conductor layer to form a longitudinally extending data line 300, a source electrode 20, and a drain electrode 22. Then, a protective layer 26 is formed. Covered on the source electrode ", the drain electrode = 22 and the last etch resistance layer 2, A contact hole 26a is formed on a protective layer ⑼. The material of this protective layer is, for example, a photoresist. Next, a 28 is formed above the protective layer 26, and an electrical connection is formed with the drain electrode 22 through the contact hole 26a. FIG. 2E is a top view of the TFT-LCD active array substrate of this embodiment, as shown in FIG. 2E. 'A source region 16 and a drain region 17 are formed on the substrate 1; gate lines 200 parallel to each other. , 201 and parallel data lines

200523599 V. Description of the invention (7) 300 and 301 are arranged on the above-mentioned substrate 1, wherein the gate lines 2000, 201 and the material lines 3 0, 3 0 1 intersect perpendicularly with a display area in between. 7 (that is, the light-transmitting area), and the source electrode 16 and the data line 300 are electrically connected. The alignment and bonding steps of the color filter substrate 400 and the TFT-LCD active array substrate 1 are performed as in a general liquid crystal display manufacturing process. Finally, the liquid crystal display 500 is filled with the liquid crystal display after the paste, and the liquid crystal display of this embodiment is completed after sealing, as shown in FIG. 2F. A liquid crystal display structure of this embodiment (refer to FIG. 2F) includes a substrate 1 and an etch stop layer 2 formed on the substrate 1; a thin film transistor is formed over the etch stop layer 2 of the transistor region 6; A protective layer 2 6 covers the thin film transistor and the etch stop layer 2 located in the display area 7; a day element electrode 28 is formed on a part of the surface of the protective layer 26 and passes through the contact hole 2 6 a and the drain electrode. The electrode 22 is electrically connected; a color filter substrate 400 is disposed above the corresponding substrate 1; and a liquid crystal layer 500 is sandwiched between the color filter substrate 400 and the substrate 1. As mentioned above, the structure and manufacturing method of the liquid crystal display of the present invention use an etch stop layer to control the depth of the etch, making the etching process easier to control. 'Avoid the formation of the glass substrate after being etched due to the poor uniformity of the remaining etch. Uneven surface. By removing the insulation layer in the light-transmitting area, the contrast of the light intensity of the Newton's ring is reduced, making the Newton's ring less obvious, and increasing the transmittance of the backlight, which makes the LCD use the light in the transmission mode. Enhance 'to achieve high-brightness display. Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art will not depart from the spirit of the present invention.

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0773-10405TW (N1); P92051; phoe 1 i p. P t d Page 12 200523599 Brief description of the drawings ′ Figure 1 shows a partial cross-sectional view of a TFT array substrate. Figures 2A to 2D show cross-sectional views of the manufacturing process of the TFT-LCD active array substrate of this embodiment. 'Figure 2E shows a top view of the TFT-LCD active array substrate of this embodiment. FIG. 2F shows a cross-sectional view of the liquid crystal display of this embodiment. Explanation of symbols: 1, 101, 40 0 to the substrate; 2 3 to the buffer layer; 4 5 to the predetermined area; 7 to the display region; 1 2, 1 8 to the gate; 16 and 102 to the source region ; 18, 11 2 ~ interlayer insulation layers 18a, 18b, 26a, 1 1 06, 10 14 17 etch barrier layer; polycrystalline silicon layer; transistor region; 1 107 ~ gate insulation layer, 1 04 ~ channel region ; 1 0 3 ~ non-polar area; 111, 1 3 0 a ~ contact hole 2 0, 1 2 2 ~ source electrode; 2 2, 1 2 3 ~ non-polar electrode; 2 6, 1 3 0 ~ protective layer ; 2, 8, 105 ~ day element electrode; 2 0, 2 0 1 ~ gate line; 3 0, 3 0 1 ~ data line; 5 0 0 ~ liquid crystal.

0773-10405TWF (N1); P92051; phoe1i p.p t d p.13

Claims (1)

200523599 VI. Patent application scope 1. A liquid crystal display having an upper substrate and a substrate, wherein the display includes at least: a barrier layer 'formed over the lower substrate ·-a drain region formed over the etched layer and over the barrier layer' · A display area is defined above the pole-drain region and between two adjacent two data lines; and at least a portion of the pole line and the adjacent layer are in contact with the display. ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, and blocking the liquid crystal layer in the following part of the source, the source electrode is located on the top surface of the protective layer of the data line and the source layer Barrier layer 4 · If the substrate is made of glass 5. If the display is more packaged 6 · If the application includes a gate to drive the source-drain region, please refer to the liquid crystal display described in item 1 of the patent scope as a transparent material. The liquid crystal display described in the second item of the patent scope is indium tin oxide (ITO) or indium zinc oxide (izq). Please refer to the liquid crystal display substrate or the quartz substrate described in the first item of the patent scope. Please use the liquid crystal described in the first item of the patent scope. The display ^ β includes a day electrode layer, which is a liquid crystal display device formed above the protective layer, as described in item 1 of the patent scope. Among them, it is connected to one of the two adjacent gate lines, and The transistor array substrate of which one of the seven substrates, one substrate, one insect, and one transistor liquid crystal display includes: a transistor region and a display region barrier layer defined on the substrate; Above the substrate ; The body is disposed above the remaining resist layer in the transistor region 200523599 6. Apply for a patent covering the top surface of at least a portion of the etch stop layer and a protective layer in the display area; and a pixel electrode is formed on the protective layer i and forms an electrical connection with the transistor. The scope of the patent No. 7 is an array substrate of six, six, and six, wherein the etching blocking layer is a transistor zinc (IZZ). 4 Indium tin (ITO) or indium oxide 9. As described in the seventh patent application scope; night crystal display array substrate ', wherein the day electrode electrode layer is oxide: zinc (IZ0). 10. A method for manufacturing a transistor array substrate for a liquid crystal display, comprising: providing a substrate on which an etch stop layer is formed; forming a source-drain region over the rice-etched resist layer; An insulating layer is formed above the source-drain region; a plurality of gate lines parallel to each other and a plurality of data lines parallel to each other are arranged on the insulating layer, and two adjacent gate lines and adjacent two The data lines are defined as a display area; and the insulating layer of the display area is etched away until the surface of the etch stop layer is exposed. 1 1 · The method for manufacturing an electric crystal array substrate for a liquid crystal display according to item 10 of the scope of patent application, wherein the etching stopper layer is made of transparent material. 1 2 · The method for fabricating an electric crystal array substrate for a liquid crystal display according to item 11 of the scope of patent application, wherein the etching stopper layer is steel tin oxide 0773-10405TWF (Nl); P92051; phoelip.ptd page 15 200523599 6. The scope of patent application (I T 0) or indium zinc oxide (I z 〇). 1 3. The method for manufacturing an electric crystal array substrate for a liquid crystal display according to item 10 of the scope of application for a patent, wherein the substrate is a glass substrate or a quartz substrate. · 'Soil 1 4 · The method for fabricating a transistor array substrate for a liquid crystal display as described in item 10 of the scope of patent application, further comprising forming a day element electrode layer above the display area, and the day element electrode and the drain electrode The electrodes form an electrical connection. 15 · The method for fabricating a transistor array substrate for a liquid crystal display as described in item 10 of the scope of patent application, further comprising forming a gate connected to one of the two gate lines adjacent to the gate line for Drive the source to drain regions. 16 · The method for fabricating a transistor array substrate for a liquid crystal display as described in Item 10 of the scope of patent application, wherein the source electrode is connected to one of the two adjacent data lines via a contact hole of the insulating layer. An electrical connection is formed; the day electrode is electrically connected to the drain electrode through another contact hole of the insulating layer. 17 · The method for manufacturing an electric crystal array substrate for a liquid crystal display as described in item 16 of the scope of patent application, wherein the contact holes are formed at the same time by etching the insulating layer below the light-transmitting area. 1 8 · —A method for manufacturing a liquid crystal display, including: A first substrate is provided, on which an etch stop layer is formed; a source electrode is formed on the etch stop layer, an insulating layer is formed on the #etch stop layer; a plurality of gate lines are provided At least one display area is defined on the insulation layer and between the gate lines; 0773-10405W (N1); P92051; phoe 1 i p. Ptd page 16 200523599 VI. Patent application scope Etching the insulation layer of the display area to the surface where the etch stop layer is exposed is jil > Set multiple data lines Over the insulating layer; and forming a pixel electrode on the display area, and the day electrode forming an electrical connection with the drain electrode; providing a second substrate, which is disposed corresponding to the first substrate; Laminating the first substrate and the second substrate; and injecting liquid crystal between the two substrates. 19. The method for manufacturing a liquid crystal display according to item 18 of the scope of the patent application, wherein the etch stop layer is indium tin oxide (ITO) or indium zinc oxide (IZ0). 0773-10405TWF (N1); P92051; phoelip.ptd Page 17