TW200512757A - Integrated content addressable memory architecture - Google Patents

Integrated content addressable memory architecture

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Publication number
TW200512757A
TW200512757A TW092126117A TW92126117A TW200512757A TW 200512757 A TW200512757 A TW 200512757A TW 092126117 A TW092126117 A TW 092126117A TW 92126117 A TW92126117 A TW 92126117A TW 200512757 A TW200512757 A TW 200512757A
Authority
TW
Taiwan
Prior art keywords
cell
cam
transistor
content addressable
addressable memory
Prior art date
Application number
TW092126117A
Other languages
Chinese (zh)
Other versions
TWI264726B (en
Inventor
Kwo-Jen Liu
Hsin-Shih Wang
Original Assignee
Faraday Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Faraday Tech Corp filed Critical Faraday Tech Corp
Priority to TW92126117A priority Critical patent/TWI264726B/en
Publication of TW200512757A publication Critical patent/TW200512757A/en
Application granted granted Critical
Publication of TWI264726B publication Critical patent/TWI264726B/en

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  • Static Random-Access Memory (AREA)

Abstract

A novel ten-transistor (10-T) content addressable memory (CAM) cell and an integrated CAM architecture. A six-transistor (6-T) static random access memory (SRAM) cell and a four-transistor (4-T) comparator module of the 10-T CAM cell are respectively coupled to different bit lines for preventing any disturbance at a match line associated with the 10-T CAM. Each row of the integrated CAM architecture includes a valid bit cell combined with a protect bit cell and at least a mask cell with global resetting function to sufficiently ensure the correction and flexibility during comparing operations.
TW92126117A 2003-09-22 2003-09-22 Integrated content addressable memory architecture TWI264726B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW92126117A TWI264726B (en) 2003-09-22 2003-09-22 Integrated content addressable memory architecture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW92126117A TWI264726B (en) 2003-09-22 2003-09-22 Integrated content addressable memory architecture

Publications (2)

Publication Number Publication Date
TW200512757A true TW200512757A (en) 2005-04-01
TWI264726B TWI264726B (en) 2006-10-21

Family

ID=37969444

Family Applications (1)

Application Number Title Priority Date Filing Date
TW92126117A TWI264726B (en) 2003-09-22 2003-09-22 Integrated content addressable memory architecture

Country Status (1)

Country Link
TW (1) TWI264726B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114822637A (en) * 2022-06-08 2022-07-29 安徽大学 Circuit structure, chip and module based on 10T-SRAM unit

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI391946B (en) * 2008-09-18 2013-04-01 Realtek Semiconductor Corp Content addressable memory
TWI744204B (en) * 2021-03-15 2021-10-21 瑞昱半導體股份有限公司 Masking circuit and pre-charge circuit applicable to content addressable memory

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114822637A (en) * 2022-06-08 2022-07-29 安徽大学 Circuit structure, chip and module based on 10T-SRAM unit
CN114822637B (en) * 2022-06-08 2022-10-14 安徽大学 Circuit structure, chip and module based on 10T-SRAM unit

Also Published As

Publication number Publication date
TWI264726B (en) 2006-10-21

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees