TW200428331A - Plasma display device provided with drive means suitable for carrying out rapid charge-equalization operations - Google Patents

Plasma display device provided with drive means suitable for carrying out rapid charge-equalization operations Download PDF

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Publication number
TW200428331A
TW200428331A TW093102710A TW93102710A TW200428331A TW 200428331 A TW200428331 A TW 200428331A TW 093102710 A TW093102710 A TW 093102710A TW 93102710 A TW93102710 A TW 93102710A TW 200428331 A TW200428331 A TW 200428331A
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Taiwan
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electrodes
vet
discharge
area
addressing
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TW093102710A
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Chinese (zh)
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Pascal Denoyelle
Claude Meysen
Hassane Guermoud
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Thomson Plasma
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/292Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for reset discharge, priming discharge or erase discharge occurring in a phase other than addressing
    • G09G3/2927Details of initialising
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/296Driving circuits for producing the waveforms applied to the driving electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/294Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge
    • G09G3/2948Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge by increasing the total sustaining time with respect to other times in the frame
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms
    • G09G2310/066Waveforms comprising a gently increasing or decreasing portion, e.g. ramp
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0238Improving the black level

Abstract

Conventionally, the drive means are suitable for generating charge-equalization or reset operations, then address operations and then sustain operations: the invention relates to division of the reset operations into two successive steps:.A metastable space charge-generation step P1;.An accelerated charge-generation end step P2 during which the system operates in the mode with weak discharges between the electrodes E1, E2, serving at least for addressing. Thanks to this division, the reset operations may be shortened and the luminous performance of the panel and/or the manufacturing yields of plasma panels may be improved.

Description

200428331 五、發明說明α) 發明所屬之技術領域 本發明係關於顯示裝置,包括電漿面板,AC型,有記 憶效果,具有相交電極,至少用來定址,該裝置可視需要 設有共平面電極,至少用於持續,以及此面板之驅動機構 ,適於在此面板的放電區域進行充電勻化(或復置)、定址 和持續操作。 先前技術 具有記憶效果的A C電漿顯示面板(P D Ρ),一般包括二 平行板,留有空間,在其間含有放電氣體;板當中,一般 在此等板的内面,有面板,諸如有若干陣列的電極: —一般為二陣列的相交電極’各置於不同板上’故 非共平面,並用來定址放電,於電極相交處,在板間之空 間内’界定光放電區,以及 一至少二陣列的平行共平面電極,置於同一板上, 用來持續放電;此等陣列覆以介電層,特別提供記憶效果 ;此介電層本身覆以保護性和副電子發射層,一般為氧化 鎮。 持續陣列的各電極,與其他持續陣列的電極,形成電 極偶’在其間界定接績的光放電區’ 一般係沿面板的一排 放電區分佈。 光放電區在面板上形成二維度矩陣;各區各發射光, 故矩陣顯示要顯示之影像。 一般而言,共平面電極陣列之一兼用於定址和持續。 在此特別情況下,電極陣列以下可稱為Y,而第二陣列的200428331 V. Description of the invention α) Technical field to which the invention belongs The present invention relates to a display device, including a plasma panel, AC type, having a memory effect, having intersecting electrodes, at least for addressing, and the device may be provided with a coplanar electrode as required, At least for continuous, and the drive mechanism of this panel is suitable for charge homogenization (or reset), addressing and continuous operation in the discharge area of this panel. The prior art AC plasma display panel (PD P) with memory effect generally includes two parallel plates, leaving space with discharge gas in between; among the plates, there are generally panels on the inner surface of these plates, such as several arrays Electrodes:-Generally two arrays of intersecting electrodes are placed on different boards, so they are not coplanar, and are used to address the discharge. At the intersection of the electrodes, in the space between the boards, define a photodischarge area, and at least two Arrays of parallel coplanar electrodes are placed on the same board for continuous discharge; these arrays are covered with a dielectric layer, which provides a memory effect in particular; the dielectric layer itself is covered with a protective and secondary electron emission layer, generally oxidized town. Each electrode of the continuous array, and the electrodes of other continuous arrays, form a pair of electrodes. A photodischarge area defining the succession therebetween is generally distributed along a row of discharge areas of the panel. The photodischarge area forms a two-dimensional matrix on the panel; each area emits light, so the matrix displays the image to be displayed. In general, one of the coplanar electrode arrays is used for both addressing and persistence. In this particular case, the electrode array may hereinafter be referred to as Y, while the

200428331 五、發明說明(2) 共平面電極稱為X,而定址電極陣列與Y和X正交,置於另 一板上’稱為A。故電極陣列X和Y供成列放電區’而電極A 陣列只用來定址,供成行放電區。 相鄰放電區(至少發射不同顏色者),一般是以障壁肋 條為界;此等肋條一般用做板間的隔體。 光放電區壁一般係部份塗以對來自光放電的紫外線輻 射敏感之填,相鄰放電區具有發射不同原色的填’其方式 是三個相鄰區的組合形成圖像元素或圖素。 實際上,此等磷覆蓋障壁肋條的斜壁,而板支撐此等 肋條,一般情形是,板所支撐的是只供定址用的電極陣列 ;故位址電極覆蓋磷。 當電漿面板操作時,為顯示影像,使用放電區矩陣, 進行接續顯示或副顯示操作;各副顯示操作包括如下步 驟: 一首先是選擇性定址步驟,其目的在於修飾要作動 的各放電區域内介電層上之電何,以在此等區域内的相父 位址電極間施以至少一電壓脈波為之; —其次是非選擇性持續步驟,其間在持續電極偶間 施以接續電壓脈波,以便只在預先作動的放電區域内造成 接續光放電。 ' 於副顯示操作後,放電區域可在很不同的内部電壓狀 態,尤其是視此等區域在此副顯示操作當中是否已作動而 定;其他因數有助於在内部電壓狀態之分散,諸如相當於 此等區域之磷性質、此等放電區域的尺寸特性不可避免地200428331 V. Description of the invention (2) The coplanar electrode is called X, and the addressing electrode array is orthogonal to Y and X and placed on another board 'is called A. Therefore, the electrode arrays X and Y are provided for the column discharge region 'and the electrode A array is used only for addressing, for the row discharge region. Adjacent discharge areas (at least those emitting different colors) are generally bounded by barrier ribs; these ribs are generally used as spacers between plates. The wall of the photodischarge area is generally coated with a filler sensitive to ultraviolet radiation from the photodischarge. Adjacent discharge areas have fillers that emit different primary colors. The way is that the combination of three adjacent areas forms an image element or pixel. In fact, the phosphorus covers the oblique walls of the ribs of the barrier ribs, and the plate supports these ribs. Generally, the plate supports an electrode array for addressing only; therefore, the address electrodes are covered with phosphorus. When the plasma panel is operated, in order to display the image, the discharge area matrix is used for continuous display or secondary display operations. Each secondary display operation includes the following steps: First, the selective addressing step is designed to modify the discharge areas to be activated. The electric power on the inner dielectric layer is based on applying at least one voltage pulse between the phase-parent address electrodes in these areas;-followed by a non-selective continuous step, during which a continuous voltage is applied between the continuous electrode pairs. Pulse wave in order to cause a continuous photodischarge only in the pre-discharged discharge area. '' After the sub-display operation, the discharge area can be in a very different internal voltage state, especially depending on whether these areas have been activated during this sub-display operation; other factors help to disperse the internal voltage state, such as equivalent The phosphorus properties in these regions and the dimensional characteristics of these discharge regions are inevitable

200428331 五、發明說明(3) 起伏變化,以及此等區域壁的表面組成變化,均與面板製 作法有關。 為使要定址的全部放電區域有同樣的内部電壓狀癌’ 大部份定址步驟是先有此等區域的勻化步驟,目的特別在 於把要定址的全部放電區域復置於同樣内部電壓狀態,不 論在先導副顯示操作中是否已告作動;此復置步驟宜包括 電荷形成或打底操作,接著是電荷調節操作,亦稱為電荷 抹除操作,然後,理想的情況是,各放電區域内的内部電 壓接近定址電極間和持續電極間的點引臨限值。200428331 V. Description of the invention (3) The fluctuations and changes in the surface composition of the walls of these areas are related to the panel manufacturing method. In order to make all the discharge areas to be addressed have the same internal voltage-like cancer, most of the addressing steps are the homogenization steps of these areas first, the purpose is to reset all the discharge areas to be addressed to the same internal voltage state. Regardless of whether the pilot display operation has been performed or not; this resetting step should include a charge forming or priming operation, followed by a charge adjustment operation, also known as a charge erasing operation, and then, ideally, in each discharge area The internal voltage is close to the point threshold between the address electrodes and the continuous electrodes.

對於放電區域之各位址或持續電極偶,可將此等電極 間的外部電壓,與把此等電極覆蓋的材料分開之氣體空間 内的内部電極,加以關聯。内部電壓一般與外部電壓不同 ,因為在覆蓋電極的絕緣材料表面之表面電荷,是在放電 區域内此等介電材料和氣體間之界面。 此等表面電荷一方面是由於界定放電區域的材料介電 性能之電容效應,另方面是在此等放電區域的氣體内先前 放電產生所謂「記憶」電荷的結果。For discharge sites or continuous electrode pairs, the external voltage between these electrodes can be correlated with the internal electrodes in the gas space separating the material covered by these electrodes. The internal voltage is generally different from the external voltage because the surface charge on the surface of the insulating material covering the electrode is the interface between these dielectric materials and the gas in the discharge region. These surface charges are, on the one hand, due to the capacitive effect of the dielectric properties of the material defining the discharge region, and on the other hand are the results of the so-called "memory" charges generated by previous discharges in the gas in these discharge regions.

放電區域内按指定方向的内部點引臨P艮值,相當於沿 此方向的内部電壓限度值,逾此氣體即在此區域内離子化 。此值税此區域内的氣體特性,與此區域内氣體接觸的材 料特性’以及越過此.區域在此區域外的電極幾何形狀而 定。 在上述三陣列電極X,Y,A的特殊情況下,一般有六個 内部臨限值與各放電區域有關:The internal point of the discharge area in the specified direction leads to the Pgen value, which is equivalent to the internal voltage limit value in this direction. If this gas is exceeded, the gas is ionized in this area. This value depends on the characteristics of the gas in this area, the characteristics of the materials in contact with the gas in this area, and the geometry of the electrodes that cross this area outside this area. In the special case of the above three array electrodes X, Y, A, there are generally six internal thresholds related to each discharge area:

第9頁 200428331 五、發明說明(4) 内 部 臨 m 1 Ψ ^ 佶 Vit _ΧΥ 在 陽 | 一J X Li | 险炼V 1 ΑΛ 1-^-* • "V 點 引 ffl 内 部 臨 限 值 vIT _ΥΧ , 在 陰 極. X和 陽極Y 間 點 引 用 内 部 臨 限 值 V,T _ΧΑ J 在 陽 極: x和 陰極A 間 點 引 用 J 内 部 臨 限 值 VIT _ΑΧ 在 陰 極, X和 陽極A 間 點 引 用 5 内 部 臨 限 值 Υ IT _ΥΑ 在 陽 極1 ^和 陰極A 間 點 引 用 J 内 部 臨 限 值 Vit _ΑΥ 在 陰 極’ ^和 陽極A 間 點 引 用 〇 厂 陽 極 J 和 厂 陰 極 J 係 相 對 於 通 過此區 的 電 極 附 近 放 電 區 内 氣 體 之 内 部 電 為 J 若 附 近 氣 體 内之電 位 大 於 另 - 電 極 附 近 , 則 電 極 為 陽 極 其 他 電 極 為 陰極。 其 次 二 内 部 臨 限 值 有 同 樣 數 值 因其以 共 平 面 模 式 放 電 為 特 徵 係 利 用 一 般 互 相 對 稱 的 同 樣板所 帶 電 即 發 生 ; V1T _XY : 二 V IT一Υ) 以 Vn r_s* 指丨 3月 〇 而 其 次 —一 内 部 臨 限 值 不 同 J 係以矩 陣 模 式 放 電 為 特 徵 所 以 是 在 不 同 板 間 視 所 論 電極係 做 為 陽 極 或 陰Page 9 200428331 V. Description of the invention (4) Internal Proximity m 1 Ψ ^ 佶 Vit _ΧΥ Zaiyang | JX Li | Danger V 1 ΑΛ 1-^-* • " V-point reference ffl Internal threshold vIT _ΥΧ At the cathode, the point between X and anode Y refers to the internal threshold V, T _AXA J At the anode: point between x and cathode A refers to the internal threshold VIT _Αχ between the cathode, X and anode A refers to the 5 internal threshold Limit value Υ IT _ΥΑ Reference point J between anode 1 ^ and cathode A Internal threshold Vit _ΑΥ Reference point between cathode ^ and anode A 〇 Factory anode J and factory cathode J are discharged relative to the vicinity of the electrode passing through this area The internal electricity of the gas in the zone is J. If the potential in the nearby gas is greater than the other-electrode, the electrode is the anode and the other electrode is the cathode. Secondly, the two internal thresholds have the same value because they are characterized by coplanar mode discharge, which occurs when the same plates that are generally symmetrical with each other are charged; V1T _XY: two V IT oneΥ) Vn r_s * refers to March 〇 and Second—A different internal threshold value is characterized by matrix mode discharge, so the electrode system is considered as anode or cathode between different plates.

極而定。 '’ILXA^VlT—YA,以、IT_A_ca 指明 ' IT—AX: V IT_AY ’ 以 YlT_A_an 才旨明 蓋因行位址電極A做為陰極時,因於從攜帶之磷次要 發射。較覆蓋原始電極X或Y的介質表面之氧化鎂為少,即 在較做為陽極時更高電壓產生放電。'It depends. '’ILXA ^ VlT-YA, with IT_A_ca designating' IT_AX: V IT_AY’ with YlT_A_an to indicate that when the Gein row address electrode A is used as the cathode, secondary emission from the carried phosphorus occurs. There is less magnesium oxide than the surface of the dielectric covering the original electrode X or Y, that is, a higher voltage discharge occurs when it is used as the anode. '

一般而言: 一於電荷形成或打底操作之際,做為兼定址和持續 用的各電極Y ’相對於其他二電極X和A ’為陽極, 一於電荷調節或抹除操作之際,並定址和持續用的Generally speaking: First, at the time of charge formation or priming operation, each electrode Y ', which is both addressing and continuous use, is anode relative to the other two electrodes X and A'; at the time of charge adjustment or erasing operation, and Addressing and ongoing

第10頁 200428331 發明說明(5) 一 各電極Y,相對於 iL ^ 、/、他二電極X和Δ,為陰極。 寻捵作福去 θ 面在二矩陣带^二疋一方面在二共平面持續電極間’另方 ._ 包極間施以徐徐增加的電位進行,使要定址的 一、、且电區域全部可以定址;法國專利2, 4 1 7, 848號 (^〇1113〇11- 1 9 78 )和美國專利 5,745,()86號(1)1仏111“〇一 1 9 9 8 ) ^〔兒明在對〔、有疋址或只有持績的其他電極施以常值電壓 信號之際,對,定址和持續用電極施以斜坡電壓信號。 ® π ί國ϊ ΐ 5: 745, _號表示宜即對面板區域進行復 ^ ^ ^ ^ ^ 1 〇y/ , S 3Γ /Λ π ^ Λ ^ ^ 。此等「弱丨放+ τ 於包極間有一連串的「弱」放電 積表面放電對電:;===;:罐應_ 電,所以在此等區域的氣體内之内部電壓,;留等;:;; 微低於上述内部點引臨限值。 全保遠等於或稍 利用弱放電復置(亦稱「正 賴w w ^ 係藉產生弱光射,即可在放」復置)之已知優點, 準確調節是稍後定址操:的m j確調節内部電壓。 射是顯示裝置對比效能之基z ” 〃之基本。限制此光 在放電區域内產+ & ‘兩 視覆蓋此區域陰極ί;:;工的=號最大斜度,特別 射係數,以及空間=特=;=等材料的次要發 定。通t所用斜度值對^電極相對於χ和極ϋ牛而 之打底操作而言’不超過5V/#S。由於斜坡的 2 0 0V,所以打底操作期間達數十微秒。此期間就^描=Page 10 200428331 Description of the invention (5)-Each electrode Y is a cathode with respect to iL ^, /, and two electrodes X and Δ. Seek for the benefit of the θ plane in the two matrix strips ^ The two planes are on the one side between the two continuous plane electrodes, and the other side. _ The enveloping electrodes are applied with a gradually increasing potential, so that all the electric areas to be addressed are Can be addressed; French Patent No. 2, 4 1 7, 848 (^ 〇1113〇11- 1 9 78) and US Patent No. 5,745, () No. 86 (1) 1 “111" 〇 1 1 9 9 8) ^ [儿It is indicated that when a constant voltage signal is applied to the [, or other electrodes with a track record, the address voltage and the continuous electrode are applied with a ramp voltage signal. ® π ί 国 ϊ ΐ 5: 745, _ indicates It is appropriate to repeat the panel area ^ ^ ^ ^ ^ 1 〇y /, S 3Γ / Λ π ^ ^ ^ ^. These "weak 丨 discharges + τ" have a series of "weak" discharge product surface discharge pairs between the poles Electricity:; === ;: The tank should be _ electricity, so the internal voltage in the gas in these areas ,; stay, etc.;: ;; slightly lower than the aforementioned internal point lead-in limit. Quanbaoyuan is equal to or slightly utilizes the known advantages of weak discharge reset (also known as "who ^ ww ^ is generated by generating weak light, and can be reset"). Accurate adjustment is performed later. Adjust the internal voltage. Radiation is the basis of the contrast performance of the display device. Z ”〃. Limits the production of this light in the discharge area + & 'two-view coverage of this area cathode; = 特 =; = The secondary material of the other materials is determined. The slope value used for t is not more than 5V / # S for the bottoming operation of the ^ electrode relative to χ and extremely yak. Because of the slope of 2 0 0V , So the bottoming operation period is tens of microseconds. This period will be described =

200428331 五、發明說明(6) 副掃描當中所進行其他操作,即定址和持續操作而言,代 表浪費的時間,因而限制顯示裝置的效能,尤其是關於最 大發射。此外,在生產線終了 ,某些面板會遭淘汰,因為 顯示在打底斜坡當中有標準斜坡值的強放電存在攸關之操 作瑕疲,進一步增加面板的生產成本。 考务明内容 本發明之目的,在於限制此等缺點。本發明又一缺點 在於縮短此等放電區域復置操作期間,不會降低其效率, 意即仍然維持各種放電區域的勻化水準。 為此目的,本發明標的在於顯示裝置,包括:200428331 V. Description of the invention (6) Other operations performed in the sub-scan, that is, addressing and continuous operation, represent a waste of time, thus limiting the performance of the display device, especially regarding the maximum emission. In addition, at the end of the production line, some panels will be eliminated, because it is shown that the strong discharge with standard slope values in the base slope has a related operational flaw, further increasing the production cost of the panel. The purpose of the present invention is to limit these disadvantages. Another disadvantage of the present invention is that shortening the discharge area resetting operation will not reduce its efficiency, which means that the level of homogenization of various discharge areas is still maintained. To this end, the present invention is directed to a display device including:

—具有記憶效果之AC電漿面板,包括二板,其間留 有空間以容納放電氣體,還有二陣列的相交電極,至少用 於定址,在其相交處,板間的空間内,界定光放電區域; —驅動機構,適於對該電極施加電壓信號,適宜進 行操作,旨在把該放電區域内的電荷勻化或復置; 其特徵為,該驅動機構的設計是在一組放電區域的 特殊復置操作當中, 如果面板的各放電區域,在至少用於該區域定址和 相交之電極間,具有外部矩陣點引臨限值電壓(VET_E2E1),— An AC plasma panel with a memory effect, including two plates with space to accommodate the discharge gas, and intersecting electrodes of the two arrays, at least for addressing. At the intersections, the space between the plates defines the photodischarge. Area;-a drive mechanism suitable for applying a voltage signal to the electrode and suitable for operation, aiming to homogenize or reset the charge in the discharge area; characterized in that the drive mechanism is designed in a group of discharge areas In the special reset operation, if each discharge area of the panel has an external matrix point threshold voltage (VET_E2E1) between at least the electrodes used for addressing and intersecting the area,

設M i η〔 VET_E2E1〕和Max〔 VET_E2E1〕分別為該組區域之矩陣點 引電壓(VET_E2E1)最小值和最大值, 則至少用於此組該區域定址和交接之電極間所施電 位差VE2E1增加,在該復置操作當中一旦VE2E1超過1. 1 X Max 〔Vet_E2E1〕 ’稱為操作結束坡度’比〜 E2E1在Min〔 VeT_E2E1〕和 RRP 1 1·|| > IIH画Hill III 1 iiii 1 Hi· 第12頁 200428331 五、發明說明(7)Let M i η [VET_E2E1] and Max [VET_E2E1] be the minimum and maximum values of the matrix point induced voltage (VET_E2E1) in the area of the group, then increase the potential difference VE2E1 at least for the addressing and interfacing electrodes in this area. In this reset operation, once VE2E1 exceeds 1.1 X Max [Vet_E2E1] 'referred to as the end of operation slope' ratio ~ E2E1 in Min [VeT_E2E1] and RRP 1 1 || | > IIH draw Hill III 1 iiii 1 Hi · Page 12 200428331 V. Description of the invention (7)

MaX〔 \eT_E2E1〕之間的瞬刻’ ^E2Ei成長的袁大坡度遷要陡。 所以,本發明相當於第一具體例,詳後。 按照同樣原則,本發明標的亦為顯示裝置,包括: 一具有記憶效果之AC電漿面板,包括二板,其間留 有空間以容納放電氣體,還有二陣列的相交電極,至少用 於定址’在其相父處^板間的空間内^界定光放電區域, 至少二陣列的電極至少用於持續,而置設於使各陣列的電 極之一'越過各放電區域, 一驅動機構,適於對該電極施加電壓信號,適宜進 行復置操作,旨在把該放電區域内的電荷勻化或復置,The moment between MaX [\ eT_E2E1] ’^ E2Ei ’s growth has a steeper slope. Therefore, the present invention corresponds to the first specific example, which will be described later. In accordance with the same principle, the subject of the present invention is also a display device, including: an AC plasma panel with a memory effect, including two plates, with space left between them to accommodate the discharge gas, and two arrays of intersecting electrodes, at least for addressing ' A photo-discharge area is defined in the space between the plates, at least two electrodes of the array are used for at least continuity, and one of the electrodes of each array is placed across each discharge area. A driving mechanism is suitable for Applying a voltage signal to the electrode is suitable for reset operation, and aims to homogenize or reset the charge in the discharge area.

其特徵為’該驅動機構的設計是在一組放電區域的 特殊復置操作當中, 如果面板的各放電區域,在至少用於該區域定址和 相交之電極間,具有外部矩陣點引臨限值電壓(VET EA2EA1), 设M i n〔 VET—EA2EA1〕和M a X〔 \ ΕΤ_ΕΑ2ΕΑ1〕分別為遠組區域之矩陣 點引電壓(vET_ EA2EA1 )之最小值和最大值,如果面板的各放電 區域,在至少用於持續並越過該區域的電極間,具有外部 共平面 限值電壓’設 iMin〔 \et_ES2esi〕和 Max〔 \'et_es2esi〕分 別為該組區域之共平面點引電壓(VET_ES2ES1)之最小值和最大 值,It is characterized in that the design of the driving mechanism is in a special reset operation of a set of discharge areas. If each discharge area of the panel has at least an external matrix point threshold value between at least the area used for addressing and intersecting electrodes in the area Voltage (VET EA2EA1), let M in [VET-EA2EA1] and M a X [\ Ε__ΕΑ2ΕΑ1] be the minimum and maximum values of the matrix point induced voltage (vET_ EA2EA1) in the far group area respectively. If each discharge area of the panel, Between at least electrodes that are used to last and cross this area, have external coplanar limit voltages 'Let iMin [\ et_ES2esi] and Max [\' et_es2esi] be the minimum of the coplanar point induced voltage (VET_ES2ES1) of the group of areas, respectively Value and maximum,

一不是至少用於此組該區域定址和交接的電極間所 施電位差VEA2EA1,不超過M i η〔 VET_EA2EA1〕值,同時至少用於 持績和越過此組该區域的電極間所施電位差V ρ£Ρςΐ ^不超過 Max〔 \et_es2esi〕值’一旦至少用於持績的此等電極間所施One is not used at least for the potential difference VEA2EA1 applied between the electrodes addressed and transferred in this group, which does not exceed the value of M i η [VET_EA2EA1], and is used at least for the performance and the applied potential difference V ρ across the electrodes in this group. £ Ρςΐ ^ not exceeding the value of Max [\ et_es2esi] 'once applied to at least these electrodes

第13頁 200428331 五、發明說明(8) 電位差VES2ES1已超過Max〔 VET_ES2ES1〕值,即上升稱為正向操 作結束斜度, —就是至少用於此組該區域定址和交接的電極間所 施電位差1^ £ A 2 E A1 ’ 一旦至少用於持績和越過該區域的電極間 所施電位差VES2ES1已超過Max〔 VET_ES2ES1〕值時,即上升稱為 正向4呆作結束斜度’比V e s 2 E S1在ΜΐΠ〔 1/£了 ES2ES1〕和M a X 〔V ET_ES2ES1〕間的瞬刻當中’ Y EA2EA1成長的隶大斜度遷要陡。 -所以本發明相當於詳後所述第二具體例,或詳後所述 第三,具體例。 ” 一般而言,驅動機構適於進一步進行: —選擇性定址操作,使放電區域選擇性活化或失活 φ ,係在至少用於定址的電極間施以電壓脈波為之; , 一非選擇性持續操作,只在面板的預活化放電區域 内啟動放電,係在至少用於持續的電極間施以電壓脈波為 之。 此等面板稱為具有「記憶效果」,因為在持續期間, _ 只在先前活化的區域内發生放電5為此目的’在各放電區 -域内,至少用於持續的至少一電極塗佈介質層,其本身覆 1 以保護性和次要電子發射層。 . 介質層具有記憶效果',於持續操作中,可以只在活化 區域發動放電;保護層一般是氧化鎂層,具有高度次要電 子發射係數,比在各放電區域内覆蓋至少用於定址的一電 ® 極之材料次要電子發射係數為高,此材料一般為磷。 驅動機構最好設計成,在該特殊電荷勻化或復置操作Page 13 200428331 V. Description of the invention (8) The potential difference VES2ES1 has exceeded the value of Max [VET_ES2ES1], that is, the rise is called the forward operation end slope, which is the potential difference applied between the electrodes that are used to address and transfer the area in this group at least 1 ^ £ A 2 E A1 'Once at least the voltage difference VES2ES1 applied between the electrodes used to maintain performance and cross the area has exceeded the value of Max [VET_ES2ES1], the rise is called the positive 4 end working slope.' Ves 2 E S1 In the instant between MΐΠ [1 / £ ES2ES1] and Ma X [V ET_ES2ES1] 'Y EA2EA1 grows steeper and steeper. -Therefore, the present invention corresponds to the second specific example described later, or the third specific example described later. ”In general, the drive mechanism is suitable for further:-selective addressing operation to selectively activate or deactivate the discharge area φ, applying a voltage pulse between at least electrodes used for addressing; Continuous operation, the discharge is only initiated in the pre-activated discharge area of the panel, which applies a voltage pulse between at least the electrodes used for the duration. These panels are said to have a "memory effect" because during the duration, _ A discharge occurs only in the previously activated area 5 To this end 'in each discharge area-domain, at least one electrode is coated with a continuous dielectric layer, which is itself covered with a protective and secondary electron emission layer. The dielectric layer has a memory effect. In continuous operation, the discharge can be initiated only in the active area; the protective layer is generally a magnesium oxide layer with a high secondary electron emission coefficient, which is more than covering at least one for addressing in each discharge area. The material of the Electrode® has a high secondary electron emission coefficient. This material is generally phosphorous. The drive mechanism is preferably designed to perform the homogenization or reset operation at this particular charge

第14頁 200428331 五、發明說明(9) 當中,於該組的各區域内,覆以保護層的電極做為陽極; 特殊復置操作即為電荷形成或打底操作;在此情況下,無 電荷調節或抹除操作,其中相反地,覆蓋保護層之此電極 一般作為陰極。 各復置操作一般與面板的一組或全部放電區域排有關 ;此等操作一般是在選擇性定址操作之前發動。 「舞陣點引」指在至少用於定址之電極間發動放電, . 而「共平面點引」係指在至少用於持續之電極間發動放 電。 · 如果面板包括同一板所帶共平面電極陣列,此等電極 至少用於持續;其他板則一般帶有主要用於定址之電極陣· 列,或甚至另外供發動持續放電;在此情況下,至少用於 - 定址之一陣列電極,最好與至少用於持續的一陣列電極合 併,形成一陣列共平面電極;所以,此陣列電極在打底操 作之際,作為陽極。使用先前技術之習知共平面電漿面 板。 若面板無共平面電極陣列,一般係在亦用於定址之電 . 極間施以電壓脈波,進行持續操作;面板則一般有二陣列 ^ 電極,各板有一陣列;變化例中,持續操作可藉在放電區 _ 域内施以射頻場進行,在此情況下,陣列電極只用於定 址 ° 由於本發明,才可縮短復置操作所需期間,把額外時 · 間專供持續操作,因而改進面板的發光效能。 由於本發明,才可能藉減少廢品數量,實施改進電漿Page 14 200428331 5. In the description of the invention (9), the electrodes covered with a protective layer are used as anodes in each area of the group; the special reset operation is the charge formation or priming operation; in this case, no The charge adjustment or erasing operation, in contrast, the electrode covering the protective layer generally serves as the cathode. Each reset operation is generally related to one or all of the discharge area rows of the panel; these operations are generally initiated before the selective addressing operation. "Dance array" refers to initiating a discharge between at least electrodes used for addressing, and "coplanar point induction" refers to initiating a discharge between at least electrodes that are used continuously. · If the panel includes an array of coplanar electrodes on the same board, these electrodes are used at least for sustaining; other boards generally have electrode arrays mainly used for addressing · or even another for continuous discharge; in this case, At least one array electrode for addressing, preferably combined with at least one continuous array electrode to form an array coplanar electrode; therefore, this array electrode is used as the anode during the priming operation. A conventional coplanar plasma panel is used. If the panel does not have a coplanar electrode array, it is generally used for addressing. A voltage pulse is applied between the electrodes for continuous operation. The panel generally has two arrays of ^ electrodes, each of which has an array; in the variant, continuous operation It can be performed by applying a radio frequency field in the discharge area_. In this case, the array electrode is only used for addressing. Because of the invention, the period required for resetting operation can be shortened, and the extra time and time are dedicated to continuous operation. Improve the luminous efficiency of the panel. Due to the invention, it is possible to implement improved plasma by reducing the amount of scrap

第15頁 200428331 五、發明說明(ίο) 面板之生產率。 提高至少用於定址的電極間位差之操作結束斜度,最 好大於5V / // s。 因此,一旦第一具體例中的全部矩陣點引臨限值已超 過,而且一旦第二或第三具體例中的全部共平面點引臨限 值已超過,復置操作即遠較先前技術更快速進行,絲毫不 失此等操作品質,亦無有礙對比的強放電之虞;因此,有 更多時間專供其他驅動操作,尤其是持續操作,因而可改 善顯示效能,尤其是在視頻影像顯示之情況下。Page 15 200428331 V. Description of the invention (ίο) Panel productivity. Increasing the end-of-operation slope of at least the electrode-to-electrode difference used for addressing, preferably greater than 5V / // s. Therefore, once all the matrix point approach limits in the first specific example have been exceeded, and once all the coplanar point approach limits in the second or third specific example have been exceeded, the reset operation is much more advanced than the prior art Perform quickly, without losing the quality of these operations, and without the risk of a strong discharge that is detrimental to comparison; therefore, more time is available for other drive operations, especially continuous operation, which can improve display performance, especially in video images Display case.

提高至少用於定址的電極間電位差之操作結束斜度, 最好大於1 0 V /// s。可進一步改善本發明裝置效能和優 點。 最好是在第二或第三具體例中,於該復置操作期間, 雖然 ~ES2ES1 介於 Min〔 VET_ES2ES1〕和 Max〔 VET_ES2ES1〕之間’至少 用於持續的電極間所施電位差VES2ES1上升,稱為操作開始斜 度大於5V///S,以大於10V//ZS為佳。甚至更進一步改善 本發明裝置效能和優點。 於各該特殊復置操作中,至少用於定址的電極間所施 電位差(VE2ei;YeA2EA1) ’ 當 Min〔 VET_E2E1〕<YE2El<MaX〔Increasing the operation end slope of at least the potential difference between the electrodes for addressing is preferably greater than 10 V /// s. The device performance and advantages of the present invention can be further improved. Preferably, in the second or third specific example, during the reset operation, although ~ ES2ES1 is between Min [VET_ES2ES1] and Max [VET_ES2ES1], at least the potential difference VES2ES1 applied between electrodes increases, It is called that the operation start slope is greater than 5V /// S, and preferably greater than 10V // ZS. The performance and advantages of the device of the present invention are even further improved. In each of the special reset operations, at least the potential difference applied between the electrodes used for addressing (VE2ei; YeA2EA1) ’when Min 〔VET_E2E1] < YE2El < MaX 〔

Vet_e2ei〕或 Min〔 VET_EA2EA1〕< \ ea2eai < Max〔 VET_EA2EA1〕時’隶好 是均勻且嚴格上升。「均勻且嚴格上升」指非零增加。增 加宜隨時間呈線型;故以施於一陣列電極的線型電壓斜坡 達成,此係較易實施。 在第二或第三具體例中,於各該特殊復置操作之際,Vet_e2ei] or Min [VET_EA2EA1] < \ ea2eai < Max [VET_EA2EA1] When the ‘reach is uniform and strictly rises. "Uniform and strictly rising" refers to a non-zero increase. The increase should be linear over time; therefore, a linear voltage ramp applied to an array electrode is achieved, which is easier to implement. In the second or third specific example, at the time of each of the special reset operations,

第16頁 200428331 五、發明說明(11) δ小闲於接嬙的雷炻閜所你.雷仞差Γ V……、,壹Μ ; η Γ 一丨* 一 / ,·★ 1、 Ί ^ ' ^~\ ^ V "Xl> 4-*- · —J ' ί -V w -〇 >CC- v * \L^>Z i ^ tn U丄丄 、Page 16 200428331 V. Description of the invention (11) δ is leisurely connected to the thunderbolt. The thunderbolt difference Γ V …… ,, oneM; η Γ a 丨 * one /, · ★ 1, Ί ^ '^ ~ \ ^ V " Xl > 4-*-· --J' ί -V w -〇 > CC- v * \ L ^ > Z i ^ tn U 丄 丄,

VeT_ES2ES1〕〈〜ES2ES1 &lt; Max〔 'ET_ES2ES1〕時’袁好是均勻且嚴格 上升。 「均勻且嚴格上升」指非零增加。此項增加宜隨時間 呈線型;故以施於一陣列電極的線型電壓斜坡實施,此係 較簡單實施。 下列係本發明實施於打底操作所根據原理之摘要: •為了以用於定址的二電極間最高之可能斜度值,E1 和E2,或EA1和EA2,獲得弱放電模式,以E1或EA1作為陰 極,在此等電極間施以陡坡信號之前,提升調理放電區域 用之初期位準。 •所以本發明係關於一相同復置操作内之二接續步 驟·· 。步驟P 1,產生利用放電所得介穩空間電荷; 。加速電荷發生結束步驟P 2,相當於使所有此等電 荷相同,在此期間系統操作模式是,至少用於定址的電極 E 1和E 2間,或E A 1和E A 2間,有弱放電,最高可能之斜度一 般大於1 0 V / # s。 •本發明可應用於具有各種晶胞或放電區域結構之電 漿面板,例如ACM、ACC或ACC3E型。 、 •在第一具體例中,可應用於每晶胞有二電極El,E2 之ACM型矩陣面板,或每晶胞有三電極或以上(包含EA1和 EA2 )之ACC面板,步驟P1包含施以徐緩斜度之斜坡,為時 足以在二電極E1和E2(或另外EA1和EA2)間產生放電,無論VeT_ES2ES1] <~ ES2ES1 &lt; Max ['ET_ES2ES1]' ‘Yuan Hao is uniform and strictly rises. "Uniform and strictly rising" refers to a non-zero increase. This increase should be linear over time; therefore, a linear voltage ramp applied to an array electrode is implemented, which is a simpler implementation. The following is a summary of the principles on which the invention is implemented in the primer operation: • In order to obtain the weakest discharge mode between the two electrodes for addressing, E1 and E2, or EA1 and EA2, use E1 or EA1 As a cathode, the initial level for conditioning the discharge area is raised before a steep signal is applied between these electrodes. • So this invention is about two subsequent steps in the same reset operation ... Step P1, generating a metastable space charge obtained by using a discharge; Accelerating charge generation and ending step P 2 is equivalent to making all these charges the same. During this period, the system operating mode is at least between the electrodes E 1 and E 2 used for addressing, or between EA 1 and EA 2. The highest possible slope is generally greater than 10 V / # s. • The present invention can be applied to plasma panels with various unit cell or discharge area structures, such as ACM, ACC or ACC3E types. • In the first specific example, it can be applied to an ACM type matrix panel with two electrodes El and E2 per cell, or an ACC panel with three electrodes or more per cell (including EA1 and EA2). Step P1 includes applying The ramp with a gentle slope is enough to generate a discharge between the two electrodes E1 and E2 (or another EA1 and EA2), regardless of

第17頁 200428331 五、發明說明(12) ---- 晶胞前此狀態為何。此徐緩斜度之斜坡事實上相當於先么 技術内通用之斜度,即低於10V/ // s。E卜Έ2(或另外Eai則 EA2 )如此發生之放電,即兼用於調理晶胞,以及在電極 和E 2 (或另外E A 1和E A 2 )間,晶胞内部電壓之部份勻化 •在第二和第三具體例中,可應用於ACC型共平面的 面板,每晶胞包括至少三電極EA1,EA2 = ES2,ES1,步驟ρι 包含在晶胞的共平面電極間,施以斜度較先前技術為陡的 斜坡,一般大於10V/ // s,ESI做為陰極,所被覆材料之次 要發射係數大於覆蓋EA1,而ES2可為EA2(標準ACC情況:人 EA1:行,EA2 = ES2=「掃描/持續」排,ESI:「共用」排) 。如此產生的E S1 - E S 2共平面放電,兼用於調理晶胞,以 及ESI和ES2間内部電極之部份勻化。第二和第三具體例分 別如下: 刀 。第二具體例:在步驟P1當中,E A 1和E A 2間不發生 放電,在此等電極間内部不超過點引電壓。此舉可藉Ea i 和EA2間各種信號(一定信號、斜坡信號或其他信號)達成 ,只要不超過點引臨限值。於此步驟P1當中,點引弱共平 面放電,而防止弱矩陣放電,矩陣逐一施加的斜坡信號之 幅度,任何時刻均不超過矩陣臨限值電壓。 。第三 '具體例··於步驟1當中,EA1和EA2間產生矩 陣放電,同時在ESI和ES2間有共平面放電。在此情況下, EA 1和EA2間的信號斜度必須小,以便用弱放電模式操作, 直至到達調理晶胞之充分位準。在此情況下,EA 1和EA2間 的信號斜度小於ESI和ES2間。Page 17 200428331 V. Description of the invention (12) ---- What was the state before the unit cell. The slope of this gentle slope is actually equivalent to the slope commonly used in prior art, that is, less than 10V / // s. The discharge occurred in EbΈ2 (or Eai in another case, EA2), which is also used to condition the unit cell, and between the electrode and E 2 (or another in EA 1 and EA 2), the part of the internal voltage of the unit cell is homogenized. In the second and third specific examples, it can be applied to an ACC type coplanar panel. Each unit cell includes at least three electrodes EA1, EA2 = ES2, ES1. Step p is included between the coplanar electrodes of the unit cell, and a slope is applied. Compared with the previous technology, it is a steep slope, generally greater than 10V / // s, ESI is used as the cathode, and the secondary emission coefficient of the covered material is greater than that covered by EA1, and ES2 can be EA2 (standard ACC situation: human EA1: OK, EA2 = ES2 = "Scan / Continuous" row, ESI: "Shared" row). The E S1-E S 2 coplanar discharges generated in this way are also used to condition the unit cell and to homogenize part of the internal electrodes between ESI and ES2. The second and third specific examples are as follows: knife. Second specific example: In step P1, no discharge occurs between E A 1 and E A 2, and the point-to-point voltage is not exceeded inside these electrodes. This can be achieved by various signals (certain signals, ramp signals or other signals) between Eai and EA2, as long as the point threshold is not exceeded. In this step P1, the weak coplanar discharge is induced to prevent the weak matrix discharge. The amplitude of the ramp signal applied by the matrix one by one does not exceed the matrix threshold voltage at any time. . Third 'Specific Example ... In step 1, a matrix discharge occurs between EA1 and EA2, and there is a coplanar discharge between ESI and ES2. In this case, the signal slope between EA1 and EA2 must be small in order to operate in the weak discharge mode until a sufficient level of the conditioning cell is reached. In this case, the signal slope between EA 1 and EA2 is smaller than between ESI and ES2.

第18頁 200428331 五、發明說明(13) • 舟鱗P 9夕蛙徵為,廄闲力F A 1知F, A 9 ,瓴疮鉍參兪 技術為高的斜坡信號,一般為大於1 0V/ // s。在此階段, 於其他電極間所發生則不太重要。 •步驟P1和P2可視需要分隔一段期間’在晶胞内沒有 任何放電(例如所施電壓暫時停止增加)。此期間必須不超 過20 // s,以便調理在P1當中產生的效果,在P2内仍然有 效。 •上述具體例係衍自此等一般原則,以及在對面板的 各晶胞素用的電極間發生放電情況下之條件,因其息息相 關於:Page 18 200428331 V. Description of the invention (13) • The boat scale P 9 is a sign of the night frog, the free force FA 1 knows F, A 9, and the technology of scabies bismuth is a high slope signal, generally greater than 10V / // s. What happens between other electrodes at this stage is less important. • Steps P1 and P2 may be separated for a period of time as required 'without any discharge in the unit cell (for example, the applied voltage temporarily stops increasing). During this period, it must not exceed 20 // s, so that the effect of conditioning in P1 will still be effective in P2. • The above specific examples are derived from these general principles and the conditions in the case where a discharge occurs between the electrodes for each unit cell of the panel, because they are related to each other:

。按照晶胞變化的點引臨限值; 。視晶胞過程(原先亮或不亮)而定的表面記憶電荷 狀態。 實施方式 茲參照附圖所示非限制性具體例加以說明,即可清楚 明白本發明。. Introduce the limit according to the point where the unit cell changes; The state of charge on the surface memory depending on the unit cell process (originally bright or not bright). Embodiments The present invention will be clearly understood by referring to the non-limiting specific examples shown in the drawings.

茲說明本發明各種一般具體例;第一具體例應用於矩 陣型電漿面板,只有二陣列電極E 1,E 2,各板一個,兼用 於定址和持續放電;其他具體例應用於共平面型電漿面板 ,在稱為共平面板的同一板上有二陣列持 '續電極ESI,ES2 ,在共平面板對面稱為位址板的板上有二陣列位址電極 EA1,以及共平面板上的EA2。此等其他具體例應用於習知 共平面的面板,其中共平面電極陣列兼用於定址和持續, 意即EA2,再與ES2合併。Various general specific examples of the present invention are described below. The first specific example is applied to a matrix type plasma panel, and has only two array electrodes E1, E2, one for each plate, and is used for both addressing and continuous discharge. Other specific examples are applied to a coplanar type. Plasma panels have two arrays of continuous electrodes ESI, ES2 on the same board called a coplanar board, and two arrays of address electrodes EA1 on a board called an address board opposite the coplanar board, and a coplanar board On EA2. These other specific examples are applied to conventional coplanar panels, where the coplanar electrode array is used for both addressing and persistence, meaning EA2, and then merged with ES2.

第19頁 200428331 五 、發明說明&quot; 一 ' ---- 等材二續-電極I2或£S]*ES2i体介f層,本身再塗氧化鎂 位址板的:^ :炙射J糸數南’而且在任何情況下均高於 一般為m ;帶有此等電極和W//·電極Ei或εμ的材料 續板,或在共平面的面板情況下伞即延伸稱為持 ,於電荷產生操作情況下;;起,影/象掃插或副掃描後 各區域具有外部點引臨限值^ =,上£2做為陽極時’面板 點引電壓最小值稱為Min〔 v包/T—E2E1。面板全部區域的 引電J最大值稱為M 广了〕,而面板全部 共平面的面板包括 ^咖1〕。 扪』 上 區 後,面板各區域有外部J ^放電區域;在掃推和 以及外部共平面點?丨臨,陣點引臨限值電壓Vet知描之 域的矩陣點引電壓,荷產生操作情況亦钬 為Min〔 VET_EmA1〕和/、平面點引電壓之最;^偵面板全部 陣點引電壓和共平 Vet〜ES2ES1〕,而面板全 分別稱 Vet_ea2em〕和Max〔 v 、、' 電壓之最大值,分別基品域的起 本發明下述戶:Err體/ 別〜 按照本發明之基本特^體例係關於電荷產生或 荷產生和調理開始步驟,’此等操作各包括步驟τ底操作; 速電荷產生結束步騍,炎為期r 1,接著步驟、稱為電 驟開始相隔時間必為期I* 2,第一步驟钍,稱為加 P2内從充電區域之過…s,必要時以第二步 叮生全部益處。 弟一步騍 EA2和ES2作為陽極=值電壓VET — ES2ES1 ,在^2ΕΑ1, 域的矩陣點引電壓 ^荷產生操作情況亦钬。,、平面板 U ; ^ r 17 、 不〇共伞Z也,^ …、0 面;A ^ 第20頁 200428331 五、發明說明(15) 第1圖說明矩陣面板的電荷產生或打底操作: 極E 2 (陽極)和E 1 (陰極)間之外部電壓 接續八 —V·儿ST在步驟P1開始時m貝刀 一 VE2£1_P1_ND在步驟p 1結束時 一 \’E2E1—P2_ST在步驟P2開始時 —VE2E1_P2_ND在步驟P 2結束時 第2和3圖說明共平面的面板之電荷產生或打 以下一方面為位址電極EA2(陽極)和EAl(p梅),持續電極E S 2 (陽極)和E S1 (陰極)間之外A 、 分辨: 冲%壓, 以下電 底操作, 另方面為 即可接續Page 19, 200428331 V. Description of the invention &quot; A '-------- Second material-continued-electrode I2 or £ S] * ES2i body interlayer f, and then coated with a magnesium oxide address plate: ^: The number of 'nan' and in any case is higher than the general m; materials with these electrodes and W // · electrodes Ei or εμ continued, or in the case of coplanar panels, the umbrella is called holding, In the case of charge generation operation; from the image / image scanning or sub-scanning, each area has an external point threshold limit value ^ =, when the minimum £ 2 is used as the anode, the minimum panel point voltage is called Min [v package / T—E2E1. The maximum value of the inductive power J in all areas of the panel is called M 了], and the panel where all the panels are coplanar includes ^ Ca1].扪 』After the upper area, there are external J ^ discharge areas in each area of the panel;丨 Pro, the matrix point threshold voltage Vet knows the matrix point threshold voltage in the field, and the load generation operation is also the highest of Min [VET_EmA1] and / or the plane point threshold voltage; ^ all the panel threshold voltages of the detection panel He Gongping Vet ~ ES2ES1], and the panel is called Vet_ea2em] and Max [the maximum value of the voltage, respectively, from the base of the present invention: Err body / other ~ according to the basic characteristics of the present invention ^ The system is about the steps of charge generation or charge generation and conditioning. 'These operations each include a step τ bottom operation. The rapid charge generation end step 炎 is a period of r 1. The next step, called the start of the electrical interval, must be period I. * 2, the first step 钍, called the pass from the charging area within the P2 ... s, if necessary, the second step will give full benefits. One step: EA2 and ES2 are used as the anode = value voltage VET — ES2ES1, and the operating condition of the matrix point induced voltage ^ 2 at ^ 2ΕΑ1 is also 钬. Plane plate U; ^ r17, not altogether Z also, ^…, 0 face; A ^ page 20 200428331 V. Description of the invention (15) Figure 1 illustrates the charge generation or priming operation of the matrix panel: The external voltage between the poles E 2 (anode) and E 1 (cathode) is connected to ——V ·· ST at the beginning of step P1 m bayonet VE2 £ 1_P1_ND at the end of step p 1-E2E1-P2_ST at step P2 At the beginning-VE2E1_P2_ND at the end of step P 2 Figures 2 and 3 illustrate the generation or application of charges on a coplanar panel. The following are the address electrodes EA2 (anode) and EAl (p plum), and the continuous electrode ES 2 (anode). And E S1 (cathode), A, resolution: red pressure, the following electrical bottom operation, on the other hand can be connected

V ES2ES1_P1_ST在步驟 P1 開% —VEA2EA1_P1_ND和 VES2ES1_P1JD在步驟 P!結^眭 一 VeA2EA1_P2_ST 和 VES2ES1_p2—ST在步驟 P2 開始時 一 VEA2EA1_P2JD 和 VES2ES1_p2_ND在步驟 P2 結^士 為簡化說明起見,符合同樣功能的^ 使用一致的參玫號碼。 午之各 莲」^_具體例陣或共面I 參見第1圖,二步驟P1和P2界定如下: ' E2E1—P1—ST &lt; M i η〔 VET_E2E1〕;因此,在来 面板估何晶胞内均未超過放電點引鲶限值7驛= 描或剐掃描當中從操作所得充電狀態如何’無^ 〇· 9x Min〔 VET E2E1〕為佳,故從調理步驟以E2 區域内即發動弱放電開始; 開始’ Ve2E1_P1_ND &lt; M a X〔 VET—E2E1〕;因此,在上田 m 也 K詞理步V ES2ES1_P1_ST opens at step P1%-VEA2EA1_P1_ND and VES2ES1_P1JD at step P! 眭 V V VeA2EA1_P2_ST and VES2ES1_p2 — ST at the beginning of step P2-VEA2EA1_P2JD and VES2ES1_p2_ND are simplified for the sake of clarification, in order to clarify the steps in order to clarify the steps. Use the same reference number. "Every lotus in the afternoon" ^ _ For a specific example or coplanar I see Figure 1. The two steps P1 and P2 are defined as follows: 'E2E1—P1—ST &lt; M i η [VET_E2E1]; None of the cells has exceeded the discharge point induction limit. 7 = The charging state obtained from the operation during the scanning or scanning is not good. 9 × Min [VET E2E1] is better, so the weak point in the E2 area from the conditioning step is weak. Discharge starts; start 'Ve2E1_P1_ND &lt; M a X 〔VET—E2E1〕; therefore, in Ueda m also K-words move

EA2EA1一P1一ST 種具體例 開始時, 在先前掃 E1_P1_ST ^ 於面板 驟P 1之後EA2EA1-P1-ST specific examples At the beginning, after scanning E1_P1_ST ^ before the panel step P 1

第21頁 200428331 五、發明說明(16) ’面板各晶胞内均超過放電點引臨限值5無論先前操作所 得充電狀態如何,以便產生初始調理狀態;以VE2E1_P1_ND S 1 · 1 X Max〔 VET E2E1〕為佳,以免不必要地延長徐徐電位增 加的時期P 1,並盡快結合快速電位增加之時期P 2 ; —Y E2E1_P2_ST 二丨 E2E1_P1_ND ’ 使·一 步驟 P 1 和 P 2 聯結在一起’ 而無過渡;以及 —νΕ2Ε1Ρ2_ΝΙ)按先前技術同樣方式界定,以便在步驟P2結 束時,在面板全部放電區域内可得所需打底位準。Page 21 200428331 V. Description of the invention (16) 'All the unit cells of the panel exceed the threshold value of the discharge point. 5 Regardless of the state of charge obtained by the previous operation, in order to produce the initial conditioning state; VE2E1_P1_ND S 1 · 1 X Max [VET E2E1] is better, so as not to unnecessarily prolong the period of slowly increasing potential P1 and combine it with the period of rapid increase of potential P2 as soon as possible; --Y E2E1_P2_ST II 丨 E2E1_P1_ND 'Make one step P 1 and P 2 linked together' and No transition; and—νΕ2Ε1Ρ2_ΝΙ) is defined in the same manner as in the prior art, so that at the end of step P2, the required bottoming level can be obtained in the entire discharge area of the panel.

在步驟P 1當中,電極間之電位VE2E1增加率,或斜度 dVE2E1/d r瞬間值,係按照先前技術,亦即在此步驟的整個 期間r 1,低於5 V / # s ;相對地,按照本發明,在步驟P 2 當中,電極間的電位VE2E1增加率,或斜度dVE2E1/d r瞬間值 ,在此步驟期限r 2内,實質上大於先前技術,最好大於 1 OV/ // S。 一般而言,按照本發明,在步驟P2當中,電荷產生期 結束時的電極間電位增加,遠較步驟P1當中於此期間開始 時為快;所以,打底操作時間大為減少,而不失此等操作 之任何品質。 第二具體例:共平面的面板情況 ' 參見第2圖,二步驟P1和P2界定如下:In step P1, the increase rate of the potential VE2E1 between the electrodes, or the instantaneous value of the slope dVE2E1 / dr, is in accordance with the prior art, that is, r 1 is lower than 5 V / # s during the entire period of this step; relatively, According to the present invention, in step P 2, the increase rate of the potential VE2E1 between the electrodes, or the instantaneous value of the slope dVE2E1 / dr, is substantially larger than the prior art during this step period r 2, preferably greater than 1 OV / // S . Generally speaking, according to the present invention, in step P2, the potential between the electrodes at the end of the charge generation period is increased, which is much faster than that at the beginning of this period in step P1; therefore, the primer operation time is greatly reduced without losing Any quality of these operations. Second specific example: coplanar panel case '' See Figure 2. The two steps P1 and P2 are defined as follows:

—VeS2ES1_P1_ST &lt; M i Π〔 \ ET_ES2ES1〕,因此’在步驟 P1 開始時 ,面板的任何晶胞内未超過共平面放電點引臨限值,無論 先前操作所得充電狀態如何;最好是VES2ES1_P1ST 2 0 . 9 X M i η 〔VET ES2ES1〕,故正從步驟Ρ 1開始,在面板區域内即啟動弱—VeS2ES1_P1_ST &lt; M i Π [\ ET_ES2ES1], so 'At the beginning of step P1, the coplanar discharge point threshold limit has not been exceeded in any unit cell of the panel, regardless of the charging status obtained by the previous operation; preferably VES2ES1_P1ST 2 0.9 XM i η [VET ES2ES1], so starting from step P1, the weak point is activated in the panel area.

第22頁 200428331 五、發明說明(17) 共平面放電開始, —VES2ES1_P1_XD &lt; Max Γ VET_ES2ES1 ] •,因此,在步驟 PI 結束時 ,面板的各晶胞内超過共平面放電點引臨限值,不論從先 前操作結束的充電狀態如何,故產生初始調理狀態;最好 是 Ves2ES1_P1—1· lx Max〔 VET ES2ES1〕 ’ 以免不必要地延長 P 1 時期,並盡快結合P2時期; Y EA2EA1_P1 &lt; M i Π〔 VgT_EA2EAl〕 ’意即在调理步驟Ρ 1的各瞬 間7Γ ,位址電極間的電位差VeA2EA1_P1保持低於Min〔Page 22 200428331 V. Description of the invention (17) Coplanar discharge starts, —VES2ES1_P1_XD &lt; Max Γ VET_ES2ES1] • Therefore, at the end of step PI, the unit cell of the panel exceeds the threshold for coplanar discharge, Regardless of the state of charge from the previous operation, an initial conditioning state is generated; it is best to Ves2ES1_P1—l · Max [VET ES2ES1] 'so as not to unnecessarily prolong the P 1 period and combine the P 2 period as soon as possible; Y EA2EA1_P1 &lt; M i Π [VgT_EA2EAl] 'means that at each instant 7Γ of the conditioning step P 1, the potential difference VeA2EA1_P1 between the address electrodes remains below Min [

VeT_EA2EA1〕,故於此步驟當中,面板内不發生矩陣放電;須 知此項不相等對P1的任何瞬間都能滿意,知道在P1當中 VET_EA2EM可變異,視接近電極產生的電荷而定; V EA2EA1_P2_ST &lt; M i Π〔 V et_EA2EA1〕,因此’在步驟 P2 開始時 ,於面板的任何晶胞内不超過矩陣放電點引臨限值,無論 從先前操作所得充電狀態如何;最好是VEA2EA1_P2_ST 2 0. 9 X Min [ Vet_EA2Eai ],故正從步驟Ρ 2開始,在面板的區域内即 啟動弱矩陣放電開始;以及 —VEA2EA1_P2_JD係按先前技術同樣方式界定’以便在面板 的全部放電區域内,獲得所需打底位準。 於步驟P 1當中,持續電極間的電位VES2ES1增加率,或斜 度dVES2ES1/d r瞬間值,實質上'較先前技術為高,最好超過 10V///S;在此步驟P1當中,電位V EA2eai增加率可為零、低 或高,惟此電位保持低於M i η〔 VET EA2EA1〕。 在步驟P2當中,位址電極間之電位VEA2EA1增加率,或斜 度dVEA2EA1/d r瞬間值,實質上較先前技術為高,最好超過VeT_EA2EA1], so in this step, no matrix discharge occurs in the panel; note that this inequality is satisfactory at any instant of P1, knowing that VET_EA2EM can vary in P1, depending on the charge generated near the electrode; V EA2EA1_P2_ST & lt M i Π [V et_EA2EA1], so 'At the beginning of step P2, the threshold value of the matrix discharge point is not exceeded in any unit cell of the panel, regardless of the state of charge obtained from the previous operation; preferably VEA2EA1_P2_ST 2 0. 9 X Min [Vet_EA2Eai], so starting from step P2, the weak matrix discharge is started in the area of the panel; and-VEA2EA1_P2_JD is defined in the same way as in the prior art, so as to obtain the required area in the entire discharge area of the panel Base level. In step P1, the increase rate of the potential VES2ES1 between the electrodes, or the instantaneous value of the slope dVES2ES1 / dr, is substantially higher than the prior art, and preferably exceeds 10V /// S. In this step P1, the potential V The increase rate of EA2eai can be zero, low or high, but the potential remains below M i η [VET EA2EA1]. In step P2, the increase rate of the potential VEA2EA1 between the address electrodes, or the instantaneous value of the slope dVEA2EA1 / d r, is substantially higher than that of the prior art, and it is better to exceed

第23頁 200428331 五、發明說明(18) 1 0V/ // s ;在此步驟P2當中,電位VES2ES1增加率可為零、低 或高。 一般而言,按照本發明,電荷產生操作是在開始超過 第一矩陣放電臨限值之前,藉超過全部共平面放電臨限值 為之,以此方式,在矩陣放電開始之前,將氣體調理;此 優點是因為在具有高度次要電子發射係數之材料上發生共 平面放電之故^該材料塗佈在共平面板的電極’因而在步 驟P 1當中,可以陡斜度發生弱共平面放電E S 1 - E S 2 ;在此 步驟P1當中如此達成之調理,可在步驟P2當中,以較先前 技術緩和的斜度發生弱矩陣放電EA卜EA2,儘管材料(一般 為磷)的次要發射性能一般在中庸,材料係塗佈位址板的 電極,在此用做陰極;由於本發明,打底操作時間即大為 減少,以磷次要發射性能不良之面板可達成正確操作,無 論如何不會損失此等操作之品質。 第三具體例··共平面的面板情況 此具體例與前不同,是在共平面調理期間,可「容忍 」有限矩陣放電。 參見第3圖,二步驟P1和P2界定如下: —VeS2ES1_P1_ST &lt; M i n〔 \ ET_ES2ES1〕和 VEA2EA1_P1_ST &lt; M i Π〔Page 23 200428331 V. Description of the invention (18) 10V / // s; In this step P2, the increase rate of the potential VES2ES1 can be zero, low or high. Generally speaking, according to the present invention, the charge generation operation is performed by exceeding the co-planar discharge thresholds before starting to exceed the first matrix discharge threshold. In this way, the gas is conditioned before the matrix discharge begins; This advantage is because a coplanar discharge occurs on a material with a high secondary electron emission coefficient ^ The material is coated on the electrode of the coplanar plate ', so that in step P1, a weak coplanar discharge ES can occur at a steep slope 1-ES 2; the conditioning so achieved in this step P1 can occur in step P2 with a weaker matrix discharge EA and EA2 at a gentler slope than in the prior art, although the secondary emission performance of the material (generally phosphorus) is generally In the mean, the material is the electrode coated with the address plate, which is used as the cathode. Due to the present invention, the priming operation time is greatly reduced, and the panel with poor phosphorous secondary emission performance can achieve correct operation. Lose the quality of these operations. Third specific example ·· The case of coplanar panels This specific example is different from the previous one, in that it can "tolerate" a finite matrix discharge during coplanar conditioning. Referring to Figure 3, the two steps P1 and P2 are defined as follows:-VeS2ES1_P1_ST &lt; M i n [\ ET_ES2ES1] and VEA2EA1_P1_ST &lt; M i Π [

VeT_EA2EA1〕;因此’在步驟PI開始時’面板的任何晶胞内不 超過共平面或矩陣放電點引臨限值,不論先前操作所得充 電狀悲如何,最好是 Ves2esi_pi_st — 〇 · 9 X M i η〔 Vet_ES2esi〕和 / 或 Vea2EA1_P1_ST 20·9χ Min〔v ETEA2EA1〕 ’ 故正從步驟 P1 開始’ 啟動共平面或矩陣放電開始;VeT_EA2EA1]; therefore, 'at the beginning of step PI', any unit cell of the panel does not exceed the coplanar or matrix discharge point threshold. Regardless of the state of charge obtained from previous operations, it is best to be Ves2esi_pi_st — 〇 · 9 XM i η [Vet_ES2esi] and / or Vea2EA1_P1_ST 20 · 9χ Min [v ETEA2EA1] 'So starting from step P1' Start coplanar or matrix discharge start;

200428331 五、發明說明(19) —' ES2ES1—P1_ND〉M a X〔 \ ET_ES2ES1〕和 ~ EA2EA1—P1_ND〈 M i Π〔 ' ET_EA2EA1〕,因此’在步驟P 1結束時’面板的各晶胞内超過 共平面放電點引臨限值,不論從先前操作結果的放電狀態 如何,以及全部或部份晶胞内的矩陣放電點引臨限值,以 便產生初始調理狀態; V Ei\2EM_P2 JD按先别技術同樣方式界定,以便在面板的 全部放電區域内,獲得所需打底位準。 於步驟P 1當中,持續電極間的電位VES2ES1增加率,或斜 度dVES2ES1/d 7:瞬間值,實質上較先前技術高,最好高於1 0 \ / μ s ;於步驟Ρ2當中,電位VES2ES1增加率可為零、低或 南 ° 由於本發明,打底操作時間即可大為減少,或以磷次 要發射性能不良之面板即可達成正確操作,無損此等操作 之品質。 第四具體例:共平面或矩陣面板情況 此具體例提供在P1當中發生的調理,可在全部或若干 晶胞内利用強放電’而在其他晶胞内利用弱放電進行。此 並非較佳具體例,除非強放電是持續放電。 第五具體例:共平面或矩陣面板情況 第五具體例係於第' 四具體例增加在步驟P 1和P2之間, 含有在全部或部份晶胞内無任何放電時期之可能性,此時 期的時間不超過2 0 // s,故在P2期間放電開始時,P1的調 理效果仍然有效。在先前技術上已知實際使用無放電的時 期,在此不詳述;内部電壓必須保持低於點引臨限值。200428331 V. Description of the invention (19) — 'ES2ES1—P1_ND> M a X [\ ET_ES2ES1] and ~ EA2EA1—P1_ND <M i Π [' ET_EA2EA1], so 'at the end of step P 1' in each cell of the panel Exceeding the coplanar discharge point threshold limit, regardless of the discharge state from the previous operation result, and the matrix discharge point threshold limit within all or part of the unit cell, in order to generate the initial conditioning state; V Ei \ 2EM_P2 JD as first Other technologies are defined in the same way in order to obtain the required bottoming level in the entire discharge area of the panel. In step P1, the rate of increase of the potential VES2ES1 between the electrodes, or the slope dVES2ES1 / d 7: the instantaneous value, is substantially higher than the prior art, preferably higher than 10 \ / μ s; in step P2, the potential The increase rate of VES2ES1 can be zero, low or south. Due to the invention, the operation time of the primer can be greatly reduced, or the correct operation can be achieved with a panel with poor phosphorous secondary emission performance, without compromising the quality of these operations. The fourth specific example: the case of coplanar or matrix panels This specific example provides the conditioning that occurs in P1, which can be performed using strong discharges' in all or several cells and weak discharges in other cells. This is not a preferable specific example unless the strong discharge is a continuous discharge. Fifth specific example: the case of coplanar or matrix panels. The fifth specific example is the fourth specific example, which is added between steps P1 and P2, and contains the possibility that there is no discharge period in all or part of the unit cell. The time of the period does not exceed 2 0 // s, so when the discharge starts during P2, the conditioning effect of P1 is still effective. The period in which no discharge is actually used is known in the prior art and is not described in detail here; the internal voltage must remain below the point threshold.

第25頁 200428331 五、發明說明(20) 上述非限制性說明本發明之各種具體例,在面板復置 操作當中,可使電極間施加的電位增加率,較先前技術增 加;所以本發明可以: •不是減少部署於打底操作的時間,並用於定址或持 續,因而改善面板的逼真度或高峯亮度; •便是在以標準斜度打底當中,不排斥具有強放電的 面板,以提高面板生產之效率。 最後,凡精於此道之士顯然可知,本發明可應用於其 他情況,使用斜坡信號來驅動電漿面板,不違本案所附申 請專利範圍。 本發明實施 &lt;歹j矛口比較例 使用同樣共平面型電漿面板,具有三陣列電極,包括 在前板上二共平面電極X和Y,和後板上定址用電極A,即 可應用各種電荷勻化或復置信號,並評估在此等信號應用 中對放電之衝擊。 如此共平面的面板在先前技術上已屬公知,載於本說 明引言裡,電極使用同樣參照號碼X,Υ,A。 第4圖表示在打底操作中,施加於面板各種電極X,Y,A 之電壓信號時序圖:直線電壓斜坡,其特徵為,對持續和 位址電極Y (相當於電極EA2,於此與上述一般具體例的ES2 相符),施以斜坡高峯位準VpY,於此為4 0 0 V ;超過此時間 ,對只用於持續的X電極(常稱為「共用」電極)施以一定 信號VpX,而對位於另一板上的位址電極A施以一定信號 VA二0。此等信號用來表示面板對所表現陡斜坡之響應,有Page 25 200428331 V. Description of the invention (20) The above non-limiting description of the various specific examples of the present invention can increase the rate of increase of the potential applied between the electrodes in the panel reset operation compared to the prior art; therefore, the present invention can: • It is not to reduce the time of deployment in the primer operation and use it for addressing or continuous, thus improving the fidelity or peak brightness of the panel; • It is not to exclude the panel with a strong discharge to improve the panel in the base of the standard slope Production efficiency. Finally, it is obvious to those skilled in this way that the present invention can be applied to other situations, and the use of a ramp signal to drive the plasma panel does not violate the scope of the patent attached to this case. The implementation of the present invention &lt; 歹 j spear comparative example uses the same coplanar plasma panel with three array electrodes, including two coplanar electrodes X and Y on the front plate, and electrode A for addressing on the rear plate, which can be applied. Various charge homogenization or reset signals and evaluate the impact on discharge in these signal applications. Such coplanar panels are well known in the prior art and are described in the introduction to this description. The electrodes are also referenced by the numbers X, Υ, A. Figure 4 shows the timing diagram of the voltage signals applied to the various electrodes X, Y, and A of the panel during the priming operation: a linear voltage ramp, which is characterized by the continuous and address electrodes Y (equivalent to electrode EA2, and here with The ES2 of the above general specific example is consistent), the slope peak level VpY is applied, which is 400 V; beyond this time, a certain signal is applied to the X electrode (usually called "shared" electrode) which is only used continuously VpX, and a certain signal VA-20 is applied to the address electrode A located on the other board. These signals are used to indicate the panel's response to the presented steep slope.

200428331 五、發明說明(21) 無使用本發明均然。 於各打底操作期間,會偶然發生且正常使用中會跳躍 的強放電Ds強度,使用放在螢幕一組放電區前面的光敏性 感測器加以記錄。 所得記錄相當於第5至7圖;所有此等記錄均在同樣打 底操作條件下產生,尤其是應用線型斜坡信號,除了共平 面電極X的一定偏壓信號VpX值以外: 一第5圖:VpX= + l 00V :至少用於持續的電極Y和X間之 内部點引臨限值,較位址電極Y和A間之内部點引臨限值晚 到達;所以,矩陣放電為優先;可見在晶胞無預先調理情 況下,因過份高斜度值,而有許多強放電Ds ; —第8圖:VpX= - 1 2 0 V :位址電極Y和A間之内部點引臨 限值,較至少用於持續的電極Y和X間之内部點引臨限值晚 到達;所以,共平面放電啟動為優先;圖上表示無強放電 Ds存在,有賴利用弱共平面放電而先前調理晶胞;如此造 型表示本發明。 第6和7圖相當於中間狀態,其中VpX分別等於0V和-80V ,且可見不能接受地殘餘強放電Ds。 於各打底操作當中,至少用於持續電極Y和X間的電位 差 ',以及位址電極Y和A間的電位差,即以同樣線型斜度增 加,而發生情形與第2圖所示情況相似,相當於上述本發 明第二具體例;按照本發明如第8圖所示,打底操作是以 第一步驟P1開始,其中以共平面放電為充分優先,將共平 面電極X相對於位址電極A充分負向偏壓;位址電極Y和A間200428331 V. Description of the invention (21) It is true that the invention is not used. During each priming operation, the intensity of the strong discharge Ds, which occurs by accident and jumps in normal use, is recorded using a light-sensitive sensor placed in front of a set of discharge areas on the screen. The resulting records are equivalent to Figures 5 to 7; all of these records are generated under the same priming operating conditions, especially when linear ramp signals are used, except for a certain bias signal VpX value of the coplanar electrode X: Figure 5: VpX = + l 00V: at least for continuous internal point thresholds between electrodes Y and X, arriving later than internal point thresholds between address electrodes Y and A; therefore, matrix discharge takes precedence; visible In the case of no pre-conditioning of the unit cell, there are many strong discharges Ds due to excessively high slope values;-Fig. 8: VpX =-1 2 0 V: the internal point approach limit between the address electrodes Y and A Value arrives later than at least the internal point inductive limit between electrodes Y and X for continuous use; therefore, co-planar discharge initiation is prioritized; the figure shows that no strong discharge Ds exists, relying on weak co-planar discharge and previous conditioning Unit cell; this shape represents the invention. Figures 6 and 7 correspond to the intermediate state, where VpX is equal to 0V and -80V, respectively, and it can be seen that the residual strong discharge Ds is unacceptable. In each priming operation, at least the potential difference between the continuous electrodes Y and X 'and the potential difference between the address electrodes Y and A are increased with the same linear slope, and the situation is similar to the situation shown in Figure 2. , Which corresponds to the second specific example of the present invention described above; according to the present invention, as shown in FIG. 8, the priming operation starts with the first step P1, in which coplanar discharge is given priority, and the coplanar electrode X is relative to the address Electrode A is fully negatively biased; between address electrodes Y and A

200428331 五、發明說明(22) 超出一定電壓位準時,不可避免產生矩陣放電,因為超過 矩陣點引臨限值,無此時間產生強放電,因為放電區域已 利用共平面放電預先「調理」。所以,在X和A之各偏電壓 決定步驟P 1,其特徵為只有共平面放電產生各晶胞的初始 調理狀態。第6和7圖所示中間狀態,相當於某晶胞内共平 面和矩陣放電同時作動。由於Y和A間所施斜度,與Y和X間 所施一樣高,調理不充分造成強放電。為防強放電Ds,本 發明解決方案可應用於電極Y和A間之徐緩初期斜度,一如 上述本發明第三具體例。200428331 V. Description of the invention (22) When a certain voltage level is exceeded, matrix discharge will inevitably occur, because the matrix point threshold is exceeded, no strong discharge will occur during this time, because the discharge area has been “conditioned” in advance using coplanar discharge. Therefore, each bias voltage at X and A determines step P1, which is characterized in that only coplanar discharges generate initial conditioning states of each unit cell. The intermediate states shown in Figs. 6 and 7 correspond to co-planar and matrix discharges in a unit cell operating simultaneously. Since the slope applied between Y and A is as high as that applied between Y and X, insufficient conditioning results in a strong discharge. In order to prevent strong discharge Ds, the solution of the present invention can be applied to the gentle initial slope between electrodes Y and A, as in the third specific example of the present invention described above.

第28頁 200428331 圖式簡單說明 第1圖說明按照本發明第一具體例,在電荷產生操作 當中,於矩陣面板的電極間施以電位差之時序圖; 第2圖說明按照本發明第二具體例,在電荷產生操作 當中,於位址電極間以及共平面的面板之持續電極間,施 以電位差之時序圖; 第3圖說明按照本發明第三具體例,在電荷產生操作 當中,於位址電極間以及共平面的面板之持續電極間,施 以電位差之時序圖; 第4圖為按照說明書中所列詳細具體例,在電荷產生 操作當中,對習用共平面的面板之三陣列電極施以電壓之 一般時序圖,以說明本發明優點與先前技術時序圖之比 較; 第5至7圖說明按照快速時序圖,對三陣列電極施以電 壓不幸所得強放電,係在本發明界定範圍以外, 第8圖表示本發明之優點,即按照快速時序圖,對三 陣列電極施加電壓時,無強放電。Page 28 200428331 Brief description of the diagram. Figure 1 illustrates the timing diagram of applying a potential difference between the electrodes of the matrix panel during the charge generation operation according to the first specific example of the present invention. Figure 2 illustrates the second specific example according to the present invention. In the charge generation operation, a timing diagram of the potential difference is applied between the address electrodes and the continuous electrodes of the coplanar panel; FIG. 3 illustrates a third specific example of the present invention, in the charge generation operation, in the address Timing chart of potential difference between electrodes and continuous electrodes of coplanar panels; Figure 4 shows the detailed specific examples listed in the description. During the charge generation operation, three array electrodes of conventional coplanar panels are applied. The general timing diagram of voltage is used to illustrate the advantages of the present invention compared with the prior art timing diagrams. Figures 5 to 7 illustrate the strong discharge caused by applying voltage to three array electrodes according to the fast timing diagram, which is outside the scope of the present invention. FIG. 8 shows the advantage of the present invention, that is, according to the fast timing diagram, when a voltage is applied to the three array electrodes, there is no strong discharge.

第29頁Page 29

Claims (1)

200428331 六、申請專利範圍 1 · 一種顯示裝置,包括: 一具有記憶效果之AC電漿面板,包括二板,其間留 有空間以容納放電氣體,還有二陣列的相交電極,至少用 於定址’在其相交處,板間的空間内’界定光放電區域; 一驅動機構,適於對該電極施加電壓信號,適宜進 行操作,旨在把該放電區域内的電荷勻化或復置; 其特徵為’該驅動機構的設計是在一組放電區域的 特殊復置操作當中, 如果面板的各放電區域,在至少用於該區域定址和 相交之電極間,具有外部矩陣點引臨限值電壓(VET_E2E1), 設M i η〔 VET E2E1〕和Max〔 VET E2E1〕分別為該組區域之矩陣點 引電壓(VET_E2E1)最小值和最大值, 則至少用於此組該區域定址和交接之電極間所施電 位差VE2E1增加,在該復置操作當中一旦VE2E1超過1. lx Max 〔Vet_E2E1〕 ’稱為操作結束坡度’比》E2E1在Min〔 Vet_E2E1〕和 Max〔 VET_E2E1〕之間的瞬刻,VE2E^長的最大坡度還要陡 者。 2 .如申請專利範圍第1項之裝置,其中提高至少用於 定址的電極間電位差之該操作結束斜度,係大於5 V /// s 者。 3. 如申請專利範圍第2項之裝置,其中提高至少用於 定址的電極間電位差之該操作結束斜度,係大於1 0 V //z s 者。 4. 如申請專利範圍第1項之裝置,其中在各該特殊復200428331 VI. Scope of patent application 1 · A display device, including: an AC plasma panel with memory effect, including two plates with space to accommodate the discharge gas, and two arrays of intersecting electrodes, at least for addressing ' At its intersection, the space between the plates' defines a photo-discharge area; a drive mechanism is suitable for applying a voltage signal to the electrode and is suitable for operation, aiming to homogenize or reset the charge in the discharge area; its characteristics The design of the driving mechanism is in a special reset operation of a set of discharge areas. If each discharge area of the panel has at least an external matrix point threshold voltage (between the electrodes used for addressing and intersecting the area at least) VET_E2E1), and let M i η [VET E2E1] and Max [VET E2E1] be the minimum and maximum values of the matrix point voltage (VET_E2E1) of the area, respectively, at least for the addressing and interfacing electrodes in this area The applied potential difference VE2E1 increases, and once VE2E1 exceeds 1. lx Max during the reset operation [Vet_E2E1] 'referred to as the end of operation slope' ratio "E2E1 in Min [Vet_ At the moment between E2E1] and Max [VET_E2E1], the maximum slope of VE2E ^ is even steeper. 2. The device according to item 1 of the scope of patent application, in which the slope of the end of the operation which raises at least the potential difference between electrodes for addressing is greater than 5 V /// s. 3. For the device in the second item of the patent application, in which the slope of the end of the operation is increased by at least the potential difference between the electrodes for addressing, which is greater than 10 V // z s. 4. For the device in the scope of application for patent, item 1 in which 第30頁 200428331 六、申請專利範圍 置操作之際,於至少定址用電極間所施該電位差(vE2E1), 在 M i η〔 VET_E2E1〕&lt; VE2E1 &lt; Max〔 VET_E2E1〕時,係均勻且嚴格增 加者。 5 · —種顯示裝置,包括: 一具有記憶效果之AC電漿面板,包括二板,其間留 有空間以容納放電氣體,還有二陣列的相交電極,至少用 於定址,在其相交處,板間的空間内,界定光放電區域, 至少二陣列的電極至少用於持續,而置設於使各陣列的電 極之一越過各放電區域5 一驅動機構,適於對該電極施加電壓信號,適宜進 行復置操作,旨在把該放電區域内的電荷勻化或復置, 其特徵為’該驅動機構的設計是在一組放電區域的 特殊復置操作當中, 如果面板的各放電區域,在至少用於該區域定址和 相交之電極間,具有外部矩陣點引臨限值電壓(VET_EA2EA1), 设M i II L ~ ΕΤ_ΕΑ2ΕΑ1」和MaX〔 ~ ΕΤ_ΕΑ2ΕΑ1」分別為或組區域之矩陣 點引電塵(VET_EA2EA1 )之最小值和最大值,如果面板的各放電 區域,在至少用於持續並越過該區域的電極間,具有外部 共平面 限值電壓’设 Min〔V ET_ES2ES1〕和 M a X〔 \ ET_ES2ES1〕分 別為該組區域 '之共平面點引電壓(V ET_ES2ES1 )之最小值和最大 值, 一不是至少用於此組該區域定址和交接的電極間所 施電位差VEA2EA1,不超過M i η〔 VET_EA2EA1〕值,同時至少用於 持績和越過此組該區域的電極間所施電位差’不超過Page 30 200428331 6. When the patent application is set, the potential difference (vE2E1) applied between at least the electrodes for addressing is uniform and strict when M i η [VET_E2E1] &lt; VE2E1 &lt; Max [VET_E2E1] Increaser. 5 · A display device comprising: an AC plasma panel with a memory effect, including two plates, with a space left between them to accommodate discharge gas, and two intersecting electrodes of the array, at least for addressing, at the intersections, In the space between the plates, a light discharge area is defined, at least two array electrodes are used for at least continuous, and one electrode of each array is placed across each discharge area. 5 A driving mechanism is suitable for applying a voltage signal to the electrodes. The reset operation is suitable for the purpose of homogenizing or resetting the electric charge in the discharge area, which is characterized by 'the design of the driving mechanism is in a special reset operation of a set of discharge areas. There is an external matrix point threshold voltage (VET_EA2EA1) at least between the electrodes used for addressing and intersecting in this area. Let M i II L ~ ΕΤ_ΕΑ2ΕΑ1 ″ and MaX 〔~ ΕΤ_ΕΑ2ΕΑ1‖ as the matrix point electrification of the or group area, respectively. The minimum and maximum values of the dust (VET_EA2EA1), if each discharge area of the panel has at least one external common The area limit voltage 'sets Min [V ET_ES2ES1] and M a X [\ ET_ES2ES1] as the minimum and maximum values of the coplanar point induced voltage (V ET_ES2ES1) of the group area, respectively. The potential difference VEA2EA1 applied between the area addressing and the electrodes to be transferred shall not exceed the value of M i η [VET_EA2EA1]. At the same time, it is used at least for the achievement and the potential difference applied between the electrodes across this area. 200428331 六、申請專利範圍 Max〔 VET_ES2ES1〕值,一旦至少用於持續的此等電極間所施 電位差VES2ES1已超過Max〔 VET_ES2ES1〕值,即上升稱為正向操 作結束斜度, 一就是至少用於此組該區域定址和交接的電極間所 施電位’ 一旦至少用於持績和越過該區域的電極間 所施電位差VES2ES1已超過Max〔 VET_ES2ES1〕值時,即上升稱為 正向操作結束斜度,比VES2ES1S Min〔 VET ES2ES1〕和Max 〔VET_ES2ES1〕間的瞬刻當中’ VEA2ea1成長的表大斜度退要陡 者。 6 .如申請專利範圍第5項之裝置,其中提高至少用於 定址的電極間電位差之該操作結束斜度,係大於5 V /// s 者。 7.如申請專利範圍第6項之裝置,其中提高至少用於 定址的電極間電位差之該操作結束斜度,係大於1 0 V /// s 者。 8 .如申請專利範圍第5項之裝置,其中當VES2ES1介於M i η 〔Vet_ES2esi〕和Max〔 Vet_ES2esi〕之間時’至少用於持續之電極 間所施電位差VES2ES1增加,稱為操作開始斜度,大於5V/ // s 者。 9 .如申請專利範圍第8項之裝置,其中'該至少用於持 續之電極間所施電位差增加之操作開始斜度,大於1 0 V / // s 者。 1 0.如申請專利範圍第5項之裝置,其中在各該特殊復 置操作之際,於至少定址用電極間所施該電位差(VEA2EA1)在200428331 Sixth, the scope of patent application Max [VET_ES2ES1] value, once at least for continuous application of the potential difference between these electrodes VES2ES1 has exceeded the value of Max [VET_ES2ES1], that is, the rise is called the forward operation end slope, one is at least for In this group, the potential applied between the electrodes addressed and transferred in this area 'Once the potential difference VES2ES1 applied between the electrodes at least for holding and crossing the area has exceeded the value of Max [VET_ES2ES1], the rise is called the forward operation end slope Compared with the instant between VES2ES1S Min [VET ES2ES1] and Max [VET_ES2ES1], VEA2ea1 grows at a steeper slope. 6. The device according to item 5 of the scope of patent application, wherein the slope of the end of the operation is increased by at least the potential difference between the electrodes for addressing, which is greater than 5 V /// s. 7. The device according to item 6 of the scope of patent application, wherein the slope of the end of the operation is increased by at least the potential difference between the electrodes for addressing, which is greater than 10 V /// s. 8. The device according to item 5 of the scope of patent application, wherein when VES2ES1 is between M i η [Vet_ES2esi] and Max [Vet_ES2esi], at least the potential difference VES2ES1 applied between electrodes is increased, which is called the operation start slope Degrees, greater than 5V / // s. 9. The device according to item 8 of the scope of patent application, in which 'this is used for at least the starting slope of the increase in the applied potential difference between the electrodes, which is greater than 10 V / // s. 10. The device according to item 5 of the scope of patent application, wherein, during each of the special reset operations, the potential difference (VEA2EA1) applied between at least the addressing electrodes is between 第32頁 200428331 六、申請專利範圍 M i Π〔 \ ET_EA2EA1〕〈 Y EA2EA1〈 Max〔 \_ ΕΤ_ΕΑ2ΕΑ1〕日守’係均勻且嚴格 增加者。 11 .如申請專利範圍第5項之裝置,其中在各該特殊電 荷勻&gt;ί匕或復置操作之際,該至少持續用電極間所施該電位 差(VE S2ES1 )在 M i η〔 V ET_ES2ES1〕〈 ' ES2ES1 &lt; Max〔 Vet_ES2esi〕時’係 均勻且嚴格增加者。Page 32 200428331 6. Scope of patent application M i Π [\ ET_EA2EA1] <Y EA2EA1 <Max [\ _ ΕΤ_ΕΑ2ΕΑ1] The number of daily guards is uniform and strictly increased. 11. The device according to item 5 of the scope of patent application, wherein, at the time of each of the special charge equalization or replacement operations, the potential difference (VE S2ES1) applied between at least the continuous electrodes is at M i η [V ET_ES2ES1] <'ES2ES1 &lt; Max [Vet_ES2esi]' is a uniform and strictly increasing one. 第33頁Page 33
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