TW200426949A - Multi-anneal process - Google Patents

Multi-anneal process Download PDF

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TW200426949A
TW200426949A TW92113648A TW92113648A TW200426949A TW 200426949 A TW200426949 A TW 200426949A TW 92113648 A TW92113648 A TW 92113648A TW 92113648 A TW92113648 A TW 92113648A TW 200426949 A TW200426949 A TW 200426949A
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annealing
scope
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annealing step
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TW92113648A
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TWI313036B (en
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Chen-Ming Huang
Sen-Shan Yang
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Taiwan Semiconductor Mfg
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Abstract

A multi-anneal process is disclosed. The present invention comprises: providing a substrate; forming a copper film on the substrate; and proceeding with a plurality of anneal steps to the substrate. Moreover, the aforementioned plurality of anneal steps comprises a first anneal step and a second anneal step proceeded sequentially, wherein the temperature and time of the first anneal step are 50 DEG C to 400 DEG C and 10 seconds to 1000 seconds respectively; and the temperature and time of the second anneal step are 100 DEG C to 500 DEG C and 1 minute to 10 hours respectively.

Description

200426949 五、發明說明(1) 【發明所屬之技術領域】 本發明是有關於一種多重退火(Multi-anneal)製程’且特 別是有關於一種適用於半導體銅製程之多重退火製程。 【先前技術】 在傳統鋁金屬導線無法突破瓶頸之情況下,經過多年的研 究發展,銅導線已經成為半導體材料的主流。由於銅的電 阻值比鋁還小,因此可在較小的面積上承載較大的電流, 讓廠商得以生產速度更快、電路更密集,且效能可提昇約 30%至40%的晶片。此外,由於銅的抗電子遷移 (Electro-migration)能力比鋁好,因此可減輕其電移作 _ 用’因而提兩晶片的可靠度。 請參考第1圖所繪示之習知具有單一退火步驟之銅製程之流 程圖。首先,提供一基材,其中此基材已於先前製程形成 半導體元件之一部分。接著,如步驟1〇所示,於此基材上 形成銅膜,其中此銅膜可為雙鑲嵌製程中的介層(Via)與金 屬層(或接觸層與金屬層),而此步驟丨〇可以例如電化學電 鍍(Electrochemical Plating ;ECP)之方法來達成。 =於上述形成銅膜之步驟完成之後,銅膜尚處於不穩定狀 悲’因此必須對此銅膜施以熱處理製程,藉以使銅膜之晶 粒成長趨於穩定。因此,接著需如步驟2〇所示,對上述呈〇 有銅膜之基材進行退火步驟,其中此退火步驟一般係於i 述進仃電化學電鍍之同一反應室中以臨場^卜以七^之 進行。 然後,如步驟40所不,對上述銅膜之表面進行化學機械研200426949 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a multi-anneal process', and particularly to a multi-anneal process suitable for a semiconductor copper process. [Previous technology] In the case that traditional aluminum metal wires cannot break through the bottleneck, after years of research and development, copper wires have become the mainstream of semiconductor materials. Because copper has a smaller resistance than aluminum, it can carry a larger current in a smaller area, allowing manufacturers to produce faster, denser circuits, and improve performance by about 30% to 40%. In addition, since copper has better resistance to Electro-migration than aluminum, it can reduce its electromigration function and thus improve the reliability of the two wafers. Please refer to the flow chart of the conventional copper process with a single annealing step shown in Figure 1. First, a substrate is provided, wherein the substrate has been formed into a part of a semiconductor device in a previous process. Next, as shown in step 10, a copper film is formed on the substrate, where the copper film can be a via layer and a metal layer (or a contact layer and a metal layer) in a dual damascene process, and this step 丨〇 This can be achieved by, for example, Electrochemical Plating (ECP). = After the copper film forming step is completed, the copper film is still unstable. Therefore, a heat treatment process must be applied to the copper film to stabilize the crystal grain growth of the copper film. Therefore, it is necessary to perform an annealing step on the above substrate with a copper film as shown in step 20, where the annealing step is generally performed in the same reaction chamber as described in the electrochemical reaction process described above. ^ Proceed. Then, as described in step 40, the surface of the copper film is subjected to chemical mechanical research.

第5頁 C > Λ 200426949 五、發明說明(2) 磨(Chemical Mechanical Polishing ;CMP),藉以使銅膜 之表面達成所需之平坦度。 目前,上述第1圖中具有步驟20之銅製程已成為標準製程。 然而,如第1圖所示之銅製程雖然可使銅膜具有合乎要求之 抗電子遷移能力,但是就銅膜之應力遷移(Stress Migration)現象而言,如第1圖所示之銅製程卻無法順利抑 制銅膜之應力遷移現象,因而導致應力遷移測試中介層電 阻的增高與產率的降低。所以,有必要尋求解決之道。 【發明内容】 因此本發明的目的 減輕應力遷移之現 本發明的另一目的 低應力遷移測試中 本發明的再一目的 良率提南並較為穩 根據本發明之上述 明一較佳實施例中 首先,提供一基材 對基材進行數個退 少包括依序進行之 中第一退火步驟之 1 0 0 0秒,而第二退 C與1分至1 〇小時。 溫度與時間除了可 就是在提供一種多重退火製程,可藉以| 象。 是在提供一種多重退火製程,可藉以降 介層電阻之增加率。 是在提供一種多重退火製程,可藉以使 定。 目的,提出一種多重退火製程。在本發 ’此多重退火製程至少包括以下步驟。 。接著,形成一鋼膜覆蓋基材。然後, 火步驟。此外,上述數個退火步驟中至 一第一退火步驟與一第二退火步驟,其< 溫度與時間分別為5 〇它至4 〇 〇與丨〇秒至 火步驟之溫度與時間分別為1〇〇 〇c至5〇〇 另外,第一退火步驟與第二退火步驟之 如上述以外,在本發明之較佳實施例Page 5 C > Λ 200426949 V. Description of the invention (2) Polishing (Chemical Mechanical Polishing; CMP), in order to achieve the required flatness of the surface of the copper film. Currently, the copper process with step 20 in the first figure above has become a standard process. However, although the copper process shown in Fig. 1 can make the copper film have the required anti-electron migration ability, as far as the stress migration phenomenon of the copper film is concerned, the copper process shown in Fig. 1 has The stress migration phenomenon of the copper film cannot be suppressed smoothly, which leads to an increase in the interlayer resistance and a decrease in the yield in the stress migration test. Therefore, it is necessary to find a solution. [Summary of the Invention] Therefore, the purpose of the present invention is to reduce stress migration. Another object of the present invention is to improve the yield of the other object of the present invention in the low stress migration test and to stabilize it. First, a substrate is provided to perform a plurality of withdrawals on the substrate, including sequentially performing the first annealing step of 1000 seconds, and the second withdrawal C and 1 minute to 10 hours. In addition to temperature and time, it is to provide a multiple annealing process, which can be used | It is to provide a multiple annealing process, which can reduce the increase rate of the dielectric resistance. This is to provide a multiple annealing process, which can be used to make it. Objective To propose a multiple annealing process. In the present invention, the multiple annealing process includes at least the following steps. . Next, a steel film is formed to cover the substrate. Then, fire steps. In addition, from the above several annealing steps to a first annealing step and a second annealing step, the temperature and time of the temperature and time are respectively 50 ° to 400 ° and the time from the second step to the fire step are 1 〇〇〇c ~ 500。 In addition, the first annealing step and the second annealing step are as described above, in a preferred embodiment of the present invention

200426949 五、發明說明(3) 中,第一退火步驟之溫度可小於第二退火步驟之溫度;而 第一退火步驟之時間可小於第二退火步驟之時間。再者, 第一退火步驟與第二退火步驟間更包括將基材冷卻至室 溫° 因此,應用本發明可藉以減輕應力遷移之現象。 此外,應用本卷月可藉以降低應力遷移測試中介 增加率。 再者’應用本發明可藉以使良率提高並較為穩定。 【實施方式】 種 本發明係有關於一種適用於半導體銅製程之多重退火 程。請參考第2圖所^之依照本發明—較 :有多重退火步驟之鋼製程之流程圖。首先,提供一基 ’其:此基:已於先前製程形成半導體 構。接著,如步驟110所示,於 丨;: , ^ _的介層與金屬層(或接觸層與金屬 層),而此步驟110可以例如電化 馮 接著,如步驟120所示,對來達成。 火步驟,▲中此第一 i火牛驟、、銅㉟之基材進行第-退 錢之同-反應室中進行==一:係於上述進行電化學電 步驟所需之溫度與時間例;此步驟120之第-退火 1 000秒。 例如可分別為50。〇至400 t與10秒至 然後,讓上述基材之溫度降 ,^ ^ 也 溫之過程可繼續以臨場之此基材之溫度降至室 述用以進行步驟^之第一艮式/牛進/,或是將基材移出上 <弟退火步驟之反應室外來進行。 200426949200426949 5. In the description of the invention (3), the temperature of the first annealing step may be lower than that of the second annealing step; and the time of the first annealing step may be shorter than that of the second annealing step. Furthermore, the first annealing step and the second annealing step further include cooling the substrate to room temperature. Therefore, applying the present invention can reduce the phenomenon of stress migration. In addition, the application of this volume can reduce the increase rate of the stress migration test intermediary. Furthermore, the application of the present invention can improve the yield and be more stable. [Embodiment] The present invention relates to a multiple annealing process suitable for a semiconductor copper process. Please refer to the flow chart of the steel process with multiple annealing steps according to the present invention shown in FIG. 2. First, a substrate is provided: this substrate: a semiconductor structure has been formed in a previous process. Next, as shown in step 110, the interlayer and metal layer (or contact layer and metal layer) of ^ ;, and this step 110 can be, for example, electrochemical, and then, as shown in step 120, the pair is achieved. The fire step, ▲ in this first i fire step, the copper base material is the same as the first refund-in the reaction chamber == one: the temperature and time required for the electrochemical step ; The first-annealing of this step 120 for 1,000 seconds. For example, each may be 50. 〇 to 400 t and 10 seconds to then, let the temperature of the above substrate drop, ^ ^ The process of warming can also continue with the temperature of this substrate dropped to the room for the first genre / cattle Into /, or to move the substrate out of the reaction chamber of the < brother annealing step. 200426949

接著,如步驟U η料- 行此步驟130之第二=,對基材進行第二退火步驟,其中進 為100 °c至5 0 0 1=火步驟所需之溫度與時間例如可分別 使用之方Φ分至10小時。至於,此第二退火步驟所 =卜之如為熱墊板(Hot P1勝 如上述以外步驟與第二退火步驟之溫度與時間除了可 溫度可小於第二ΐί:之較佳實施例中’ f-退火步驟之 可小於第二退二驟溫度;而第一退火步驟之時間 驟二0之第二退火步驟為本發明之特徵所在。藉由此 因而第一退火步驟,可減輕銅膜中應力遷移之現象, 提言j遙低應力遷移測試中介層電阻之增加率,且可藉以 了=率。然而,本發明中並不限定僅使用二個退火步 7士7要在基材上形成銅膜後進行至少二個退火製程,皆 -,ί明之?求保護範圍内。亦即,本發明可如第2圖中所 標準單—退火製程後僅新增另—退火製帛,亦可在 :ί: —退火製程後新增至少二個退火製帛,皆在本發明 之睛求保護範圍内。 如步驟140所示,對上述鋼膜之表面進行化學機械研 以使銅膜之表面達成所需之平坦度。 然後, 磨,藉Next, as in step U η-the second step of this step 130 =, the second annealing step is performed on the substrate, which is 100 ° c to 5 0 0 1 = the temperature and time required for the fire step can be used separately Fang Φ minutes to 10 hours. As for the second annealing step, the hot plate (Hot P1 is better than the above steps and the temperature and time of the second annealing step may be lower than the second temperature). In the preferred embodiment, 'f -The temperature of the annealing step may be less than the temperature of the second annealing step; and the time of the second annealing step of the second annealing step is a feature of the present invention. Therefore, the first annealing step can reduce the stress in the copper film. The migration phenomenon is mentioned as the increase rate of the interlayer resistance in the j-low stress migration test, and can be used as the rate. However, the invention is not limited to using only two annealing steps 7 to 7 to form a copper film on the substrate. Then, at least two annealing processes are performed, all of which are within the scope of protection. That is, the present invention can be added to the single-annealing process only after the standard single-annealing process shown in Figure 2, or in: ί: — At least two additional annealing systems are added after the annealing process, which are all within the protection scope of the present invention. As shown in step 140, chemical mechanical research is performed on the surface of the steel film to achieve the desired surface of the copper film. Required flatness. Then, grind, borrow

請參考第3圖所繪示之本發明之多重退火製程、習知標準 一退火製程、以及提高熱預算之單一退火製程三者之Τ介層 電阻偏移量與發生機率之關係圖。如上所述,藉由本^二 之多重退火製程,可有效抑制銅膜中的應力遷移現象,因 而降低長時間應力遷移所導致的介層電阻之增加。從第3圖Please refer to the diagram of the relationship between the T-layer resistance offset and the probability of occurrence of the multiple annealing process of the present invention, the conventional standard annealing process, and the single annealing process to increase the thermal budget shown in FIG. 3. As described above, the multiple annealing process of this embodiment can effectively suppress the stress migration phenomenon in the copper film, thereby reducing the increase in the interlayer resistance caused by the long-term stress migration. From Figure 3

200426949 五、發明說明(5) — 中可明顯看出本發明之此一功效。第 發明之多重退火製程之對應數據;示本 =製程之對應數據;而圖例c則表示;曾===早; 土製輊:1應數據’其中此圖例c所對應之增加熱預 = :二火製程之總退火能量與圖例A所對應之; 火製程之總退火能量大約相等。至於, ^之夕重退 介層電阻偏移量(單位An,而铲广评第圖中的橫座標為 也田, 早位為幻而縱座標則為某一介#雷阳推 ;:之發生機率(單位為%)。此外,第3圖之數據/針電二偏 導體業界所慣用的Kelvin單一介声測1 據係針對+ 的俨進鹿夬、里必k。 早7丨厚測δ式結構進行1 0 00小時 私準應力遷移烘烤測試而得。由第 a所代表的多重退火製程具有最佳社η::例· 雷阻值羊圖例ΑΚ代表的多重退火製程之介居 電P偏移里比圖例B與圖例C所代表的其 曰 介層電阻偏移量約降低1〇%。 、 Λ種退火衣程之 凊參考第4圖所繪示之本發明之多重退 潭一退火製程之良率比鲈圄。笛4阁士 ν I私以及$知標準 良手比孕乂圖第4圖中分別顯千太旅ηη 重退火製程與習知標準單一退火製程之良別率:不本發明之多 盎八欲 Γ各仏準早一退火製程具有變動較大的白 ^刀佈,而本發明之多重退火製 玄良 49肩,而本發明之多重退火製程良率約為 本毛月之多重退火製程可使良率較習知 火製程提高至少約10%。因此,本發:確車 且較高的良率。 ^崎只了k供較為穩定 第9頁 200426949 五、發明說明(6) 由上述本發明較佳實施例可知,應用本發明可藉以 力遷移之現象。 X I應 此外,由上述本發明較佳實施例可知,應用本發明 降低應力遷移測試中介層電阻之增加率。 9 乂 再者,由上述本發明較佳實施例可知,應用本發明 使良率提高並較為穩定。 g以 雖然本發明已以一較佳實施例揭露如上,然其並 =發明,任何熟習此技藝|,在不脫離本發明之: 車巳圍内,當可作各種之更動與潤飾,因此本發明口 圍當視後附之申請專利範圍所界定者為準。 遵槌200426949 V. Description of the Invention (5)-This effect of the present invention can be clearly seen. Corresponding data of the multi-annealing process of the invention; the display = the corresponding data of the process; and the legend c indicates; once === early; earthenware: 1 should data 'where the increase in thermal premise corresponding to this legend c =: 2 The total annealing energy of the fire process corresponds to Figure A; the total annealing energy of the fire process is approximately equal. As for ^ 之 夕 ’s regressive interlayer resistance offset (unit An, and the horizontal coordinate in the figure in the figure is Yetian, the early position is magic and the vertical coordinate is a certain medium # 雷 阳 推;: Probability (unit:%). In addition, the data in Figure 3 / Kelvin single-media acoustic measurement 1 commonly used in the industry of needle-biased conductors is based on the measurement of + into Luhan and Libi. + Early 7 丨 Thickness measurement δ The structure is obtained by performing a 100-hour private quasi-stress migration test. The multiple annealing process represented by a has the best performance η :: Example · Lightning resistance value sheep illustration AK Dielectric current of the multiple annealing process The P offset is approximately 10% lower than the offset resistance of the interlayer resistance represented by Fig. B and Fig. C. The multiple annealing steps of the present invention are illustrated in Fig. 4 with reference to Fig. 4 The yield rate of the annealing process is better than that of the sea bass. The 4th prince and the standard of good hands are compared. Figure 4 shows the yield rates of the Qiantai Lu ηη heavy annealing process and the conventional standard single annealing process. : Not as much as the present invention, each quasi-early annealing process has a large variation of white ^ knife cloth, and the multiple annealing system of the present invention 49 shoulders, and the multiple annealing process of the present invention has a yield rate of about this wool month. The multiple annealing process can increase the yield rate by at least about 10% compared with the conventional fire process. Therefore, the present invention: a car with a high yield rate. ^ It is only stable for k. Page 9 200426949 V. Description of the invention (6) From the above-mentioned preferred embodiments of the present invention, it can be seen that the application of the present invention can be used to migrate. XI should also be better implemented by the above-mentioned present invention It can be known from the examples that the application of the present invention reduces the increase rate of the interlayer resistance in the stress migration test. 9) Furthermore, from the above-mentioned preferred embodiments of the present invention, it can be seen that the application of the present invention improves the yield and is relatively stable. G Although the present invention has been A preferred embodiment is disclosed as above, but its combination = invention. Anyone who is familiar with this technique, without departing from the present invention, can make various modifications and retouches in the car loop. Therefore, the mouth of the present invention should be attached as a watch. The definition of the scope of patent application shall prevail.

第10頁 200426949 圖式簡單說明 第1圖係緣示習知具有單_退火步驟之銅製程之流程圖。 第2圖係繪示依照本發明—較佳實施例的一種具有多重退火 步驟之銅製程之流程圖。 第3圖係繪示本發明之多重退火製程、習知標準單一退火製 程、以及提高熱預算之單一退火製程三者之介層電阻偏移— 量與發生機率之關係圖。 第4圖係繪示本發明之多重退火製程以及習知標準單一退火 製程之良率比較圖。 【元件代表符號簡單說明】 10 ··於基材上形成鋼膜 20 :進行退火步驟 40 :進行化學機械研磨 110 :於基材上形成鋼膜 120 :進行第一退火步驟 130 :進行第二退火步驟 140 :進行化學機械研磨 A :多重退火製程 B:標準單一退火製程 C · k南熱預算之單一退火製程 jPage 10 200426949 Brief Description of Drawings Figure 1 shows the flow chart of a conventional copper process with a single annealing step. FIG. 2 is a flowchart of a copper process with multiple annealing steps according to the preferred embodiment of the present invention. FIG. 3 is a graph showing the relationship between the interlayer resistance offset—the amount and the occurrence probability—of the multiple annealing process of the present invention, the conventional standard single annealing process, and the single annealing process to increase the thermal budget. FIG. 4 is a comparison chart of yields of the multiple annealing process of the present invention and the conventional standard single annealing process. [Simple description of the element representative symbols] 10 ·· Forming a steel film on the substrate 20: Performing annealing step 40: Performing chemical mechanical polishing 110: Forming a steel film on the substrate 120: Performing the first annealing step 130: Performing the second annealing Step 140: Chemical mechanical polishing A: Multiple annealing process B: Standard single annealing process C k Single annealing process with thermal budget j

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Claims (1)

200426949 六、申請專利範圍 1. 一種多重退火(Multi - anneal)製程,至少包括: 提供一基材; 形成一銅膜覆蓋該基材;以及 對該基材進行複數個退火步驟。 2 ·如申請專利範圍第1項所述之多重退火製程,其中該形 成該銅膜之步驟係使用電化學電鍍(Electrochemical Plating ; ECP) 〇 3·如申請專利範圍第1項所述之多重退火製程,其中該些 退火步驟中至少包括依序進行之一第一退火步驟與一第二 退火步驟。 4·如申請專利範圍第3項所述之多重退火製程,其中該第 一退火步驟之溫度為5〇°c至400 °C。 5·如申請專利範圍第3項所述之多重退火製程,其中該第 一退火步驟之時間為1 〇秒至1 〇 〇 〇秒。 6·如申請專利範圍第3項所述之多重退火製程,其中該第 二退火步驟之溫度為100 1至50〇°c。 7· 士申5青專利範圍第3項所述之多重退火製程,其中該第 一退火步驟之時間為1分至丨〇小時。200426949 6. Scope of patent application 1. A multi-anneal process includes at least: providing a substrate; forming a copper film to cover the substrate; and performing a plurality of annealing steps on the substrate. 2 · The multiple annealing process as described in item 1 of the scope of the patent application, wherein the step of forming the copper film is performed using electrochemical plating (ECP) 〇 3 · Multiple annealing as described in the scope of the patent application in item 1 In the manufacturing process, the annealing steps include at least one first annealing step and one second annealing step in sequence. 4. The multiple annealing process according to item 3 of the scope of patent application, wherein the temperature of the first annealing step is 50 ° C to 400 ° C. 5. The multiple annealing process as described in item 3 of the scope of the patent application, wherein the time of the first annealing step is 10 seconds to 1000 seconds. 6. The multiple annealing process according to item 3 of the scope of the patent application, wherein the temperature of the second annealing step is 100 1 to 50 ° C. 7. The multiple annealing process described in item 3 of the Shishen 5 Qing patent scope, wherein the time of the first annealing step is 1 minute to 0 hours. 第12頁 200426949 六、申請專利範圍 1—1^ 8 ·、如申請專利範圍第3項所述之多重退火製程,其中該第 一退火步驟與該第二退火驟間更包括將該基材冷卻至一 室溫。 9·如申請專利範圍第3項所述之多重退火製程,其中該第 二退火步驟係使用熱墊板(Hot Plate)。 10·如申請專利範圍第3項所述之多重退火製程,其中該第 一退火步驟之溫度小於該第二退火步驟之溫度。 11.如申請專利範圍第3項所述之多重退火製程,其中該第 一退火步驟之時間小於該第二退火步驟之時間。 12·如申請專利範圍第1項所述之多重退火製程,其中該些 退火步驟之後更包括對該基材進行一化學機械研磨 (Chemical Mechanical Polishing ;CMP)步驟。 13. 一種多重退火製程,至少包括: 提供一基材; 形成一銅膜覆蓋該基材; 對該基材進行一第一退火步驟;以及 對該基材進行一第二退火步驟。Page 12 200426949 VI. Patent application scope 1-1 ^ 8 · The multiple annealing process as described in item 3 of the patent application scope, wherein the first annealing step and the second annealing step further include cooling the substrate To a room temperature. 9. The multiple annealing process as described in item 3 of the scope of patent application, wherein the second annealing step uses a hot plate. 10. The multiple annealing process according to item 3 of the scope of the patent application, wherein the temperature of the first annealing step is lower than the temperature of the second annealing step. 11. The multiple annealing process according to item 3 of the scope of patent application, wherein the time of the first annealing step is less than the time of the second annealing step. 12. The multiple annealing process as described in item 1 of the scope of the patent application, wherein the annealing steps further include a chemical mechanical polishing (CMP) step on the substrate. 13. A multiple annealing process, at least comprising: providing a substrate; forming a copper film to cover the substrate; performing a first annealing step on the substrate; and performing a second annealing step on the substrate. 第13頁 C η 200426949 六、申請專利範圍 1 4 ·如申請專利範圍第1 3項所述之多重退火製程,其中該 形成該鋼膜之步驟係使用電化學電鍵。 15·如申請專利範圍第13項戶斤述之多重退火製程’其中該 第一退火步驟之溫度為5〇。(:炙4〇〇 °C ° 16·如申請專利範圍第丨3項所述之多重退火製程,其中該 第一退火步驟之時間為丨〇秒至1 0 0 0秒。 1 7 ·如申請專利範圍第1 3項所述之多重退火製程,其中該❿ 第二退火步驟之溫度為丨〇〇 至500 °C。 18·如申請專利範圍第13項所述之多重退火製程,其中該 第二退火步驟之時間為1分至1 0小時。 19·如申請專利範圍第13項所述之多重退火製程,其中該 第一退火步驟與該第二退火步驟間更包括將該基材冷卻呈 一室溫。 2 0.如申請專利範圍第1 3項所述之多重退火製程,其中該 第二退火步驟係使用熱墊板。 21·如申請專利範圍第13項所述之多重退火製程,其中該 第一退火步驟之溫度小於該第二退火步驟之溫度。Page 13 C η 200426949 VI. Scope of patent application 1 4 · The multiple annealing process as described in item 13 of the scope of patent application, wherein the step of forming the steel film uses an electrochemical bond. 15. The multiple annealing process described in item 13 of the scope of the patent application, wherein the temperature of the first annealing step is 50 °. (: 400 ° C ° 16 · The multiple annealing process as described in item 3 of the patent application scope, wherein the time of the first annealing step is from 0 seconds to 1000 seconds. 1 7 · As applied The multiple annealing process described in item 13 of the patent scope, wherein the temperature of the second annealing step is from 1000 to 500 ° C. 18. The multiple annealing process described in item 13 of the patent application scope, wherein the first The time of the second annealing step is 1 minute to 10 hours. 19. The multiple annealing process as described in item 13 of the scope of the patent application, wherein the first annealing step and the second annealing step further include cooling the substrate to form 1 room temperature. 20. The multiple annealing process described in item 13 of the scope of patent application, wherein the second annealing step uses a hot pad. 21. The multiple annealing process described in item 13 of the scope of patent application, The temperature of the first annealing step is lower than the temperature of the second annealing step. 第14頁 200426949Page 14 200426949 六、申請專利範圍 22. 如申請專利範圍第1 3項所述之多重退火製程,其中該 第一退火步驟之時間小於該第二退火步驟之時間。 23. 如申請專利範圍第1 3項所述之多重退火製程,其中該 第二退火步驟之後更包括對該基材進行一化學機械研磨步 I I6. Scope of patent application 22. The multiple annealing process described in item 13 of the scope of patent application, wherein the time of the first annealing step is less than the time of the second annealing step. 23. The multiple annealing process as described in item 13 of the scope of patent application, wherein the second annealing step further includes a chemical mechanical polishing step of the substrate I I 第15頁Page 15
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