TW200426941A - Method and system for etching a high-k dielectric material - Google Patents

Abstract

A method for etching a high-k dielectric layer on a substrate in a plasma processing system is described. The high-k dielectric layer can, for example, comprise HfO2. The method comprises elevating the temperature of the substrate above 200 DEG C (i.e., typically of order 400 DEG C), introducing a process gas comprising a halogen-containing gas, igniting a plasma from the process gas, and exposing the substrate to the plasma. The process gas can further include a reduction gas in order to improve the etch rate of HfO2 relative to Si and SiO2.

Description

V. Description of the invention (〖), [Technical field to which the invention belongs] The present invention relates to a method for adding a high-dielectric fxx substrate to a substrate, and particularly relates to a dielectric material layer with a 7 丨 electric capacity on the substrate. A method of etching. [Cross-reference of related applications] This application is related to the same subject as it + + VVV VVV ^ Gan, and the declaration of Wu Guo Patent Application No. 10 / XXX 'XXX is related to' It's name is used for Etching method of dielectrics and Li Tongzhi

Fnnnf) 1 Α σ 4 / Dead "Patent Attorney P03 034 21 / Qiu Rou // Application is filed simultaneously with this case. The entire valley of this application is hereby incorporated by reference. 'Second, [previous technology] f ί ^ In the sports industry, the smallest feature size of an electronic device is close to depth 2 in order to meet our needs for faster, lower power microprocessors and plutonium. Technically, high "electrical suspension materials" (also referred to herein as "rhigh-k" materials) quickly replaced S102 and si NxQy, and replaced the doped polysilicon with the electrode material. The issue of process development and integration is a major challenge for new gate stack materials and processing of stone compounds. Those materials with a dielectric constant greater than Si〇2 (k ~ 39) are usually called south dielectric constant materials; in addition, high dielectric constant materials may refer to deposition on a substrate (such as Hf〇2, Zr〇 2) instead of a dielectric material (such as si0, Si Nx 0y) growing on the surface of the substrate. High-dielectric materials may be incorporated into metal cement or oxides (such as Ta2 05 (k ~ 26), Ti02 (k ~ 80), Zr〇2 (k ~ 25), Al2〇3 (k ~ 9), HfSi0 , Hf02 (k ~ 25)).期间 During the manufacture of semiconductor devices, we must etch and remove the high dielectric constant layer in order to 200426941 V. Description of the invention (2) The silicidation of the source / drain region and the reduction of metal impurities entering during ion implantation The wind in the source / polar area. 3. Summary of the Invention The present invention relates to a method for heating a substrate, and more particularly to a method for etching a dielectric material layer with a high dielectric constant on the substrate. Described below is a method for engraving a surface dielectric constant dielectric layer on a substrate on top of a substrate support in a plasma processing system, including: raising the substrate temperature to above 200 ° C; introducing a treatment Gas to the plasma processing system, the processing gas including a halogen-containing gas; igniting the plasma from the processing gas; and exposing the substrate to the plasma for a period sufficient to etch the high dielectric constant dielectric layer time. 4. Embodiments In the material processing method, a wide range of dielectric layers have required a more complicated process to etch. Gate stack dry plasma etching uses a process strategy that includes multiple process steps to remain fixed. Generally, the temperature of the heat exchanger is largely changed due to the substrate 疋 'and the heat exchanger itself. High dielectric constants used for gate stacks. Among them, the traditional set temperature of the substrate support, in which the set temperature in all steps of the support temperature is set by a thermal inertia of a heat exchanger, so it should not be used in the process step =, and for advanced gate stack etching It is increasingly required to have different substrate temperatures between different process steps in a process that contains loose μ. For example: · Etching under the head ^, 8 0 C is the set point temperature of the substrate support. However, the selective etching of HfO2 on Si may require a temperature much higher than 150.

Page 8 200426941 V. Description of the invention (3) Secondly, introduce a device with a sufficient plasma space for the Hf 〇2 idle dielectric layer to perform dry plasma engraving = two, attack the exposed source / Si Si below. Plasma chemistry is extremely important. A plasma processing system according to an embodiment of Kogan is shown in FIG. 1, which includes an electro-water treatment system 10, a dialogue system 12 coupled to the plasma processing chamber 10, and a dialogue system 12 and the dialogue system 12 and The plasma processing chamber 10 is coupled to a controller 14, a controller 14, a system 4 for executing—including—or more process steps. 1 it etches a gate stack as described above; moreover, the controller 14 can be used to ::: signal from at least one endpoint of the dialogue system 12, and pre-process the at least one = signal in order to accurately determine the duration of the process. In the listed g ', the plasma processing system 1 shown in FIG. 1 uses plasma processing for material processing. The plasma processing system 丨 may include an etching chamber. The conventional embodiment ′ plasma processing system 1a may include electricity 2: 々: substrate support 20 ′ with a substrate 25 to be processed attached thereto, and a circle i \: system 30. An example of the substrate 25 may be-a semiconductor substrate,-a crystalline semiconductor, t :: near ... the plasma is generated in the area 15; we can introduce and adjust an ionizable gas or gas mixture by-gas injection ... (Not shown) Sealed galvanized water treated with predetermined materials is used for production, especially for surface removal. $ ”, And / or the exposure table of the food aid material from the substrate 25. Base: 1 & can be used to handle 200 °, 30 ° or, for example, the substrate 25 can be attached to the substrate support through an electrostatic clamping system 26

Page 9 200426941 V. Description of the invention (4) Block 20 ^, and further, for example, the substrate support 20 may further include a cold section of one or two, and the recirculated coolant 2. When heated, the heat will be heated. Two members are sent from the heat exchanger system: 丄 』can be sent to the substrate via the -back side gas distribution system 27, = the thermal conductivity of the gas gap between the plate supports 2 °. This can be used when: Up or down control of the μ degree of the plate, for example-the backside gas dispersion system 27 may include a [, "general multi-zone) gas distribution system, the backside in # The gas pressure can be independently at the center and edge of the substrate 25, and cooling elements such as anti-heating elements, or the electric substrate support 20, the wall of the plasma processing chamber 10, and any other plasma processing system. F In this embodiment shown in FIG. 2, the substrate support may include one, and RF power is coupled to the processing plasma in the process space through the electrode. For example, the substrate support 20 may be RF The generator 40 emits a Ding Gong! Via an impedance f distribution network 50 to the substrate support 20 and the electrical bias is at _rf voltage, the RF bias can be used as a hot electron to form and maintain the plasma. In this configuration, the S system can be used as a Reactive Ion Etching (R 丨 E) reactor, in which the chamber and a gas injection electrode at the end are used as ground planes, which are typically used for RF offsets. 1 MHz to 100 MHz, and RF systems for plasma processing should be familiar with this technology Surgeons are familiar.

"Another way is to apply RF power to the substrate support electrodes at multiple frequencies. Furthermore, the impedance matching network 50 can reduce power reflections to accelerate RF 200426941 V. Invention description (5) = rate transmission to plasma Plasma in the processing room 10. The matching network technology (such as l well known: type, T type, etc.) and automatic control methods should be used by those skilled in this technology, such as f air extraction system 30 can include a Accelerated molecular vacuum pump (TMp) with a pumping rate per second (or higher) and a gate valve of the chamber pressure are used in traditional plasma treatment equipment for dry plasma etching. TMp of 10,000 to 3,000 liters per second, for example, a typical low treatment of 2 to 50 mTorr can be used? For high pressure processing (that is, 100 in Torr), a mechanical pressure pump can be used. In addition, the device for the monitoring room f, (not shown) can be coupled to the plasma processing room 10, for example, the pressure measuring device can be a Baratron 6 28B type manufactured by MKS Instrument Company (located in Massachusetts, USA). Absolute capacitance pressure gauge. Controller 1 4 contains a microprocessor, memory And a digital 1/0 port which can generate enough input to connect and start the plasma processing system 丨 a and monitor the control voltage output from the plasma processing system la; In addition, the controller 14 can be used for RF generator, impedance matching Network 50, gas injection system (not shown), 空 air system 30, backside gas distribution system 27, substrate / substrate support / serviceability measurement system (not shown), and / or electrostatic clamping System 2 and 6 are coupled and exchanged information. For example, according to the process strategy, we can use a program stored in the memory to start the component output to the aforementioned plasma processing system 丨 a for etching including a high dielectric Method for stacking gates of a constant dielectric layer. One example of the controller 14 is the Dell Precision Workstation 610TM manufactured by Dell Corporation in Austin, Texas.

200426941 V. Description of the invention (6) --- The dialogue system 12 may include an optical dialogue subsystem (not shown), and the optical pairing subsystem 12 may include a device for measuring the intensity of light emitted by the plasma. Detectors, such as (silicon) photodiodes or photomultiplier tubes (PMT); the optical dialogue subsystem 12 may further include a filter such as a narrow-band interference filter. In another embodiment, the dialogue system 2 may include at least one linear CCD (charge coupled device), _CI] (charge injection device) array, and a light dispersing device such as a grating or chirp. In addition, the dialogue system 12 may include a monochromator (such as a grating / detector system) for measuring a known wavelength of light, and a spectrometer (such as with a rotating grating) for measuring a spectrum, such as US Patent No. 5, The device described in 8 8 8, 3 3 7 is an example. The pair of live systems 12 may include a high-resolution optical emission spectroscopy (〇ES) sensor such as a peak sensor system (Peak Senso; r Systems) or Verity Instruments, Inc. By. This 0ES sensor has a broad spectrum spanning the ultraviolet (UV), visible (Vis), and near-infrared (NIR) light spectrum, and its resolution is about 14a, that is, the sensor can collect from 240 to 1 0 0 0 nm has a total of 55 50 wavelengths. For example: the sensor can be equipped with a high-sensitivity micro-optical fiber UV_VIS —NIR spectrometer ', which is a sequential integration of a 2 48-pixel linear ccD array. The spectrometer receives light transmitted through a single and bundled optical fiber, wherein the light output by the optical fiber uses a fixed grating to disperse across the linear CCD array; similar to the above configuration, the light emitted through an optical vacuum window Focusing on the input end of the fiber through a spherical convex lens / while three spectrometers adjusted for use in a known spectral range form one each

Page 12 V. Description of the invention (7) One of the sensors used in the process room; °, 1 to 1 second to record-complete hair: The use of the spectrum sensor can be used in each figure ^ 2 embodiments The electric processing system lb can be added to the components described in [Including-with reference to Fig. 1 and Fig. 2] to increase the plasma 宓 痄 溆 / + Znu system 1 0 0, with a large electric water in the degree and / Alternatively, the plasma processor 14 can be turned on and turned on with the magnetic field system 60 to adjust the spininess. Furthermore, the person who controls the technique can switch to 4 γ M 4 and turn the magnetic field strength. Be familiar with the design and installation of rotating magnetic fields. As shown in FIG. 1 and 2 Γ, in this embodiment, the plasma processing system 1c may be similar to, for example, 2: 2, and may further include an upper electrode 70, in which the RF power generated by the RF thunder i can pass through. Impedance matching network 74 can intersect with the upper rate. JT power is applied to a typical frequency 'MΗζ to 20 0 ΜΗζ used by the upper electrode; in addition, a typical frequency used to apply power to the terminal electrode can be The control unit 14 between 0 and 002 to 100 MHz must be coupled to the RF generator 72 and the impedance matching network 74 to control the RF power applied to the upper electrode 70. Those skilled in the art should be familiar with the design and installation of the upper electrode. In the embodiment shown in FIG. 5, the plasma processing system 1 d may be similar to the embodiment shown in FIGS. 1 and j, and may further include an induction coil 80, wherein the RF power is generated by RF 8 2 And through the impedance matching network 8 4 and lightly connected to the induction coil 80 'RF power is coupled to the plasma processing region 15 through the induction coil 80 through a television window (not shown), and is applied to the rF power A typical frequency used by the induction coil 80 may be in the range of 10 to 2 000 mHz; similarly, a typical frequency used by applying power to the chuck electrode may be between

200426941 V. Description of the invention (8) In the range of 0.1 MHz to 100 MHz. In addition, we can use a slotted Faraday shield (not shown) to reduce the coupling between the induction coil 80 and the plasma. Furthermore, the controller 14 must be coupled to the RF generator 82 and the impedance matching network 84 to RF power is applied to the induction coil 80 and control is performed. In another embodiment, the induction coil 80 may be a "spiral" coil or a "disc-shaped" coil associated with the plasma processing region 15 described above, as in a converter coupled plasma reactor (TCP). Those skilled in the art should be familiar with the design and installation of inductive coupled line plasma (ICP) sources or converter coupled plasma (TCP) sources. Alternatively, the plasma can be formed by electron cyclotron resonance (ECR); there is still another embodiment, the Yanhai plasma is formed by emitting, spiral waves; and in another ^ 7 ^ Formation; In this embodiment of the technology, the plasma source should be familiar to each of the above plasma sources. Jie You ^ μ a day-to-day use / plasma processing equipment to etch one side In the following discussion, the method of the month M a +1 1 I A A stack will be described. For example, the plasma treatment of the gate-loading device with the dielectric constant dielectric layer ^ n Ώ ^ ^ may include various port masters as described in FIGS. 1 to 5 ^ = β Qianfan embodiment may include TEOS hard light The mask is taken as y.p., and the silicon layer (S1) is used as the source / Kojishishi HfQ2 / SiG2 //: thin (~ 5A) interfacial oxide, in which Γ 亥, dielectric = raw, However, this will partly sacrifice the overall Q-Mediator "Dao moving second", dream layer and electrical constant values. Table 1 shows one of the exemplary strategies for stopping the second layer of etched teeth.

200426941 V. Description of invention (9) Table 1 Step top RF bottom RF ESC-T gap PQ (seem) ESC-Volt ESC-H e Vpp Step time BT X y 80 ° CZP q 1500V 3/3 r 10s ME XX wvw IX 80 ° C Zz VVVW PP aa 1500V 3/3 rr vvvw epd νν \ Α / νν · Λ 0E XXX vv '... ww 80V Zzz vvwvw, leg QQQ 1500V 10/10 rrr vv- / v \ * w \ 50s PPH 2 kW 900W 80 ° C 80mm 200 jut vww 2000 He OV 0/0 2000/1000 30s DE 250W 20mm 80 ° C 80mm 5mt There are 3 examples: 100 HBr or VWvVvVv, 80ΗΒΓ + 20C or 50HBr + 50〇 η OV 0 / 0 850/150 5s or epd cooling OVf OW 80V 80min 200 mt WWV 2000He 1500V 10/10 0/0 30s For example, in Table 1, the BT table breaks through the first process step of the original Si 02 layer; the ME table contains the polymer The second process step of the main silicon etching step; the 0E table over-etching process step; the PPH table plasma preheating process step; the DE table dielectric (H f 02) etching process step; the cooling is the table substrate cooling process step. The examples listed in Table 1 use the plasma processing system described in FIG. 4, where the RF power at the top electrode of the top RF table, and X, XX, and XXX respectively represent the breakthrough step, main step, and transition of the original oxide. The conventional RF power of the top electrode transmitted during the etching step; the bottom RF indicates the lower end

Page 15 200426941

(Substrate support) The M power of the electrode, where ym represents the customary value of the M power transmitted to the bottom electrode during the original oxide breakthrough step, the main step, and the over-etching step; E% _T indicates the substrate support temperature; The gap indicates the separation distance between the upper electrode and the lower electrode, where z, zz, and zzz respectively represent the top (upper) electrode and the bottom (lower) electrode during the original oxide breakthrough step, the main step, and the overetch step. Conventional value of the interval; p represents the temperature of the processing chamber, where P, PP, and PPP respectively represent the distance between the top (upper) electrode and the bottom (lower) electrode during the original oxide breakthrough step, the main step, and the overetch step. The conventional value of the processing chamber pressure; ESC_Volt represents the electrode clamping voltage applied to the substrate support; ESC_He represents the He pressure (T0rr) at the center / edge of the back side of the substrate; Vpp represents under the set RF power , The typical peak-to-peak center voltage generated on the upper / lower electrode. The ",, rr, and rrr in the basin represent the Step, and over-etching step during the peak (bottom) electrode the conventional value of the inter-peak question; epd represents the end point detection time. The configuration of the potting soil of the plasma processing system can have slightly different parameter settings. P this The flow rate (Q) listed in the DE step is only an example that reflects the condition of high flow rate (also lagging). Among them, q, qq, and qqq respectively represent the step (the main step and the overetching step)嗲 ^: Conventional value of gas flow rate. The listed gas can be used to explain the etching strategy of 2 / S 1. Those skilled in polysilicon etching should apply, ME and 0E process steps and their typical process parameters. In cooling During the step, five people removed the RF power to stop the plasma processing, and the substrate was passed through an electrostatic clamp ^

200426941 V. Description of the invention (11) (ESC) and backside (helium) heat transfer gas for cooling; typically 30 seconds is enough to lower the temperature of the substrate to the temperature of the substrate support. During the plasma preheating (PPH), the temperature of the substrate is raised from a temperature suitable for etching polysilicon (such as 80 ° C) to a temperature more suitable for Hf02 selective etching (such as 40 0 ° c). When the substrate is only leaning against the substrate support (that is, it is not held (by ESC) and there is no backside gas), the substrate is substantially insulated from the substrate support and the surrounding processing chamber, as shown in FIG. 6 It means that when the substrate is leaned on the top of the substrate support maintained at a lower temperature, the substrate temperature responds to the three non-Π conditions. The temperature of the substrate with time will change very slowly (the solid line 100 shown in Figure 6); on the other hand, if the substrate loses its support with the substrate but is not affected by the backside gas pressure, it can be observed The temperature change rate to the substrate slightly increases with time (long dashed line 10 2 shown in FIG. 6); further, if the substrate is clamped with the substrate support and is affected by the backside gas pressure, the substrate temperature It drops rapidly at first, and then gradually approaches the substrate support temperature (the short dashed line 〇04 shown in Figure 6). Plasma preheating (PPH) of the substrate occurs when the substrate is adiabatic (that is, the clamping force and backside gas pressure are removed); usually, both ion impact and convective hot-neutrals are Influencing the heating of the board, and the electronic (including thermal and impact) heating also have a slightly weaker effect on the heating process than the previous two. In highly ionized plasma (inductance ^ = plasma (1 cp), wave heating, etc.), the impact of ion impact heating can override the effect of convective heat-neutral in the capacitor | magma plasma (CCP) Plastic can with

ζυυ4ζο ^ 4ΐ V. Description of the invention (12) Ion impingement heating is equivalent, which is the main heating procedure. In the case of Yi Yu #, 2 h, convective heat-neutral is in-inert gas such as He, A;: γ, the time-polymerization preheating process includes: guide polymerization; removing the clamp from the substrate The electric body pressure is ignited from the inert gas. For example, FIG. 7 illustrates and transfers the rapid jade and inert gas atomic weight generated by removing the backside gas heating power from the substrate to the substrate and sends it to the lower electrode; (A) Heating power increases with increasing inert gas (line 110) (b) Heating power increases with inert gas pressure g (line 11 4) (C) Heating power increases with inert gas atom '婵 plus f plus (Line 112) (d) heating argon is effective) (line 116) / (that is, using t gas is more useful than Hfo. In Figure 2 it is illustrated by the plasma preheating (PPH) method. Electricity / cutting situation. Most devices include 20 Γ G electrical layers, so the time is typically very short (for example, about 5 levels, the peak substrate temperature and PP time in the HPP process are there), as long as you want Peak substrate temperature (eg, 0 °) (During 120 hours, electricity will be etched by selective HfO2. Typically, the HfO2 etch rate The second power is "lower power than PPH; therefore, the substrate heating will be greatly reduced. The thermal insulation industry is ideal for thermal insulation." The temperature of the substrate during the cutting period is maintained at a constant value. The cooling system is maintained at 1 Occurs during 24. 〇2 For selective etching of ~, I have confirmed that reducing Hf 〇2 helps to increase the etching rate; usually, etching with HBr or HC1

Page 18 200426941 V. Description of the invention (13)

Hf02 is faster than using pure halogen (Br2 or (: 12) alone, so the preferred etchant is HBr, C2H4Br2, etc. Both carbon (C) and hydrogen (H) are strong reducing agents. In addition, (CH2) n polymers can be formed on HfO2, which can promote the reduction process and thus improve the HfBrx formation process. All Hf-halides are non-volatile substances with similar volatility, so if a standard etching temperature is used ( Such as 80 ° C), it is necessary to desorb HfBrx by ion impact; however, once the source / dip silicon (S i) is exposed, the high ion impact energy in the halogen-containing plasma will etch the underlying silicon (S i). The rate is large, so if the PPH process step is used, the substrate temperature will rise, because the HfBrx desorption rate will increase exponentially as the substrate temperature increases. However, at high substrate temperatures, the Si in a pure halogen environment will remain The etching rate also increases exponentially, so the presence of reducing agents such as η and c is required. In the HBr embodiment, HBr can effectively etch Hf02, and the presence of some gaseous plutonium can grab Br to reduce the Si etching rate. ; Use HBr at a low total μ power This is not an effective Si etching method, and its strong ionic bonds are easy to catch free Br. To further reduce the Si etching rate, gases such as carbon, etc. can be added to HBr, and the additives are polymerized on the Si upward polymerization. 2, 4 The Si etching rate can be further reduced; at the same time, due to the reducing nature of this polymer, it does not hinder the etching rate of HfO2. Alternatively, a gas such as Si can be added to reduce the Si etching rate; or diatomic hydrogen can be added (仏) To reduce the 3 etch rate; or to take another commonly used method to slow the Si etch rate, and grow SiNWi0 at 2 plate temperature, people can achieve this effect by adding . However, process optimization requirements ^ / or the presence of N substances will not cause negative effects on the M% etching rate.

200426941 V. Description of the invention (14) In addition, if there are enough c and η during the Hf02 coin carving period, the hot coin carving rate can be accelerated by the reduction effect. For example, we can use the following strategies to achieve the Hf 〇2 surname engraving rate of 16 4 9 A / min and the Hf 〇2 etching rate selectivity of Si is 2.2: PPH step one upper electrode RF power = 70 0 w; lower end Electrode RF power = 90 0 W; substrate support temperature = 80 ° C; electrode spacing -80 mm; pressure = 50 mTorr; gas flow rate = 500 sccm He, 2 seem Cl2; no ESC clamping, no helium back pressure; Duration: 90 seconds; Hf02 etching: upper electrode RF power = 200 W; lower electrode RF power = 50 W; substrate support temperature = 80 ° C; electrode spacing-80 mm; pressure = 5 mTorr; gas flow rate = 105 seem Η B r, no ESC clamping, no atmosphere back pressure, duration-10 seconds; cooling-substrate support temperature = 80 ° C; electrode spacing-80 Lai; pressure = 50 mTorr; gas flow rate = 500 seem He; 1.5 kV ESC clamping, 10 Torr / 10 Torr center-edge helium back pressure; duration = 30 seconds. With regard to the selective etching of Hf02 to 3 丨, I have confirmed that Si 02 etching in HBr plasma is still ion driven at high substrate temperature, but Hf 02 etching is a chemical etching essence; therefore, in high The low RF power of the electrode at the substrate temperature can chemically etch H f 02 at high speed, but etch Si 02 at lower speed. First, the ion impact that can break the Si—〇 bond is necessary to complete any etching. In the case of adding C2H4 or C2H4Br2, the polymer can further protect the Si—〇 bond from ion impact, and at the same time go one step further. Slow down the Si 02 etch rate. For example, we can use the following strategies to achieve an H f 0 2 etch rate of 1 6 4 9

Page 20 200426941 V. Description of the invention (15) A / min and the selectivity of Hf 〇2 to S i02 is 25: PPH step 1 RF power of upper electrode = 70 0W; RF power of lower electrode = 900W; substrate support Seat temperature = 80C; electrode spacing-80 mm; pressure = 50 mTorr; gas flow rate = 50 0 sccm He, 2 seem Cl2; no ESC clamping, no helium back pressure; duration-90 seconds; Hf 〇2 etching An upper electrode power = 200 W; a lower electrode RF power = 50 W; substrate support temperature of 80 ° C; electrode spacing of 80 mm; pressure = 5 mTorr; gas flow rate = 105 seem HBr; no ESC clamping Helium-free backside air pressure; duration—10 seconds; cooling—substrate support temperature = 80 ° C; electrode spacing-80mm; pressure = 50mTorr; gas flow rate = 500 seem He; 1. 5 kV ESC clamping, 1 〇

Torr / 10 Torr center—backside helium gas pressure; duration = 30 seconds 0 Trace Clz in PPH is to prevent surface impurities. In many examples, the plasma processing system may include a quartz composition, for example, impurities in pure "ppH may include Si0 in the quartz composition, and a small amount of Cl2 in the pph process step may prevent SiO from forming on the surface of the Hf02 layer; Alternatively, during the pure He ppH, the Bτ process step (breakthrough) can be inserted before the ⑽ step, and we know that Cf4 βτ helps to remove the Si02 from the surface of the high-k dielectric material. In the example, the method of etching a high-k dielectric layer such as Hf02 includes using an element-containing gas such as HBr, Π2, HC1, NF3,

c3h8, C4H6, C4H8, C4H10, CA H4 Bp AF2 at least one of them; in addition, the processing gas may further include a reduction body such as H2, C2h4, c2H4Br2, CH4, ", ㈣, μ, ^

Cslo, C6H6, C6H1 () and C6H12 to. ^. ^ V, 6u10 ^. For example, a process parameter space can include

One of the vacuum pumps used for gas. When the back pressure is removed, for example, we can control the air-base

200426941 V. Description of the invention (16) 1000 mTorr (e.g. 5 mTorr) room pressure, an iS element-containing gas flow rate ranging from 20 to 1000 seem (e.g. 50 seem) ..., ranging from 1 to 500 sccm (e.g. 50 seem ) One of the reducing gas flow rate, one of the upper electrode RF offset in the range from 100 to 200 w (for example, 200 W), and one of the lower electrode RF offset in the range from 10 to 500 W (for example, 50 W); The upper electrode offset frequency range can be from 0.1 MHz to 200 MHz, such as 60 MHz; in addition, the lower electrode offset frequency range can be from 0.1 MHz to 100 MHz, such as 2 MHz. FIG. 9 illustrates a flowchart 400 of heating a substrate in a plasma processing system. Heating the substrate to a souther temperature helps to handle pre-heating steps such as in a series of process steps in which a series of different layers are etched, such as forming a plurality of layers of a gate stack on the substrate. Including such as silicon-containing layer, high-k dielectric layer. The method starts from 41 °. The backside gas dust is removed from the backside of the substrate. For example, in a conventional plasma processing system, the backside gas distribution system includes a control valve, a pressure regulator, and a flow control. A gas supply system of the device, and the back side gas distribution channel is closed, the gas supply system is connected to the back side gas distribution channel, the valve, and other devices. At the same time, the vacuum pump can facilitate the extraction of these channels to exhaust gas. Installers familiar with this system should understand the design and use of a backside gas distribution system for improving heat transfer between the substrate and the plate support. In 420 ', we have removed the clamping force acting on the substrate. For example, j ′ The substrate may be held with the substrate support β using mechanical force or electricity. In the previous example, ‘we removed the mechanical pressure on the substrate from the electrostatic chuck’, in the latter example, we removed the high voltage DC source to act on the static

Page 22, 200426941 V. Description of the invention (17)-The voltage on the clamping electrode, in 4 10 and 42 0, once the back-side gas pressure and the clamping force have been removed, when the substrate leans against The substrate k and the substrate k in a vacuum environment have a thermal insulation relationship. In 430, we introduced a heated gas into the plasma processing system. In one embodiment, the heating gas may include an inert gas, such as He,

At least one of Ar, Kr, Xe; in another embodiment, the heating gas may further include a cleaning gas such as Cl2. In 440 ', the plasma is ignited; in 450, the substantially thermally insulating substrate is exposed to the plasma for a period of time, and the plasma can be ignited by referring to Figs. 1 to 5 and using any of the techniques described above. For example, the plasma can be ignited in a plasma processing system by applying RF power to at least one of the upper electrode and the lower electrode, as shown in FIG. 4. For example, a process parameter space may include a chamber pressure greater than 20 mTorr (such as 50 mTorr), an inert gas flow rate greater than or equal to 200 seem (such as 500 seem), and a value less than or equal to 10 seem (such as 2 seem). A clean gas flow rate, one of the upper electrode RF offsets ranging from 100 to 2000 W (for example, 700 W), and one of the lower electrode RF offsets ranging from 100 to 2000 W (for example, 900 W); The upper electrode offset frequency range can be from 0.1 MHz to 200 MHz, such as 60 MHz; in addition, the lower electrode offset frequency range can be from 0.1 MHz to 100 MHz, such as 2 MHz. For example, the time required to heat the substrate from room temperature to 40 ° C can range from 60 to 120 seconds. FIG. 10 shows a flowchart of a method for etching a high dielectric constant dielectric layer on a substrate in a plasma processing system according to an embodiment of the present invention. The method starts with 5 1 0, and first raises the substrate temperature. For example, the substrate temperature can be increased.

Page 23 200426941 V. Description of the invention (18) is greater than 200. (: 'It is best that the substrate temperature can be between 300 and 500. (: in the range (such as 400 C); the substrate can be used as reference. Figure 9 and the above-mentioned preheat plasma process (PPH ) Heating. In 520, I introduced a processing gas into the plasma processing system for etching a high dielectric constant dielectric layer such as Hf 02. In one embodiment, the processing gas includes a Halogen gas, such as HBr, ci2, HC1, NF, Β]: 2, C & Br2, and F2; in another embodiment, the processing gas further includes a reducing gas, such as H2, C2H4, C2H4Br2 , Ch4, C2H2,

At least one of C2H6, (: 3H4, C3H6, C3H8, C4H6, C4H8, C4H1Q, C5H8, C5H1Q, C6H e, C6H1g, and C6 Η "; and in another embodiment, the processing gas further comprises an oxygen-containing gas And at least one of the nitrogen-containing gas, such as 〇2, N2, N20, and N02 〇'ignite the plasma in 530; in 540, the high dielectric constant dielectric layer on the substrate is exposed to the In the plasma, the plasma can be ignited by referring to FIGS. I to 5 and using any of the above techniques. For example, a plasma processing system can be performed by applying rf power to at least one of the upper electrode and the lower electrode. The plasma is ignited inside, as shown in Fig. 4. For example, a process parameter space may include a chamber of 1 to 1000 mTorr (such as 5 mTorr).

Pressure, one in the range of 20 to 100 seem (such as 50 seem), the gas flow rate of the element containing gas, one in the range of 1 to 500 seem (such as 2 seem), the flow rate of the reducing gas, the range from 100 to 2000 W ( Such as 200 W) one of the upper electrode RF offset, and one of the lower electrode RF offset ranging from 10 to 500 W (such as 50 W); and the frequency range of the upper electrode offset can be from 0.1 MHz to 2 00 MHz, such as 60 MHz; In addition, the lower electrode offset frequency range can be from 0 · 1

Page 24 200426941 V. Description of the invention (19) MHz to 100 MHz, such as above 2 MHz. Although only certain embodiments of the present invention are described in detail, those skilled in the art should be very clear: without departing from the invention With novel meaning and advantages, many adjustments can be made in the embodiments. Therefore, all such adjustments should be included in the scope of the present invention.

Page 25 200426941 Brief description of the drawings V. [Simplified description of the drawings] In the drawings: FIG. 1 is a simplified schematic diagram of a plasma processing system according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of a Schematic diagram of a plasma processing system; Figure 3 is a schematic diagram of a plasma processing system according to another embodiment of the present invention, Figure 4 is a schematic diagram of a plasma processing system according to another embodiment of the present invention, and Figure 5 is a schematic view of another embodiment of the present invention. Schematic diagram of plasma processing system; Figure 6 illustrates the substrate temperature response to three different conditions; Figure 7 illustrates the contribution of four different process parameters to substrate heating power; Figure 8 illustrates the substrate temperature response to heating and cooling during processing; Figure 9 Shows a substrate heating method according to an embodiment of the present invention; and FIG. 10 shows a substrate heating method according to another embodiment of the present invention. [Simple description of component symbols] 1 a, 1 b, 1 c, 1 d Plasma processing system 1 5 Processing area near the substrate surface 20 Substrate support 25 Substrate 2 6 Electrostatic clamping system

Page 26 200426941 Schematic description

27 Backside gas distribution system 30 Vacuum extraction system 40 RF generator 50 Impedance matching network 60 Magnetic field system 7 0 Upper electrode 72 RF generator 72 74 Impedance matching network 80 Induction coil 82 RF generator 84 Impedance matching network

Page 27

Claims (1)

200426941 6. Scope of patent application 1. A method for etching a high dielectric constant dielectric layer, which is used to etch a high dielectric constant dielectric layer on a depleted substrate on the top of a substrate support in a plasma processing system. Including: increasing the temperature of the substrate to more than 200 ° C; introducing a processing gas to the plasma processing system, the processing gas including a halogen-containing gas; igniting a plasma from the processing gas; and The substrate is exposed to the plasma for a time sufficient to etch the high-k dielectric layer. 2. The method for etching a high-k dielectric layer as described in the patent application, item 1, wherein the temperature ranges from 300 to 500 ° C. 3. The method for etching a high-k dielectric layer as described in the first patent application, wherein the temperature is substantially 40 ° C. 4. The method for etching a high-k dielectric layer as described in the first patent application, wherein the halogen-containing gas includes at least one of HBr, Cl2, HC1, NF3, Br2, C2H4Br2, and F2. 5. The method for etching a high-k dielectric layer according to item 1 of the application, wherein the processing gas further comprises a reducing gas. 6. Etching of high dielectric constant dielectric layer as in the scope of patent application No. 5 Page 28 200426941 6. Method of applying for a patent, wherein the reducing gas includes at least one of a hydrogen-containing gas and a carbon-containing gas. 7. The method for etching a high-k dielectric layer as claimed in claim 5, wherein the reducing gas includes a hydrocarbon gas. 8. The method for etching a high-k dielectric layer as described in the fifth item of the patent application, wherein the reducing gas includes H2, C2H4, C2H4Br2, CH4, C2H2, C2H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H1 ( }, At least one of C5H8, C5H1 (), C6H 6, and C6H12. 9. The etching method for a high-k dielectric layer as described in the scope of patent application No. 5, wherein the reducing gas includes a nitrogen-containing gas and a At least one of the oxygen-containing gases. 10. The method for etching a high-dielectric-constant dielectric layer according to item 5 of the scope of patent application, wherein the reducing gas includes at least one of 02, N2, N20, and N02. A method of #etching a high dielectric constant dielectric layer in the range item 1, wherein the processing gas includes HBr and H2. 12. The method for etching a high dielectric constant dielectric layer in the range of item 1 of the patent application, wherein the high dielectric constant layer is etched. The dielectric constant dielectric layer contains Hf02. Page 29