TW200425537A - Semiconductor light emitting device and the manufacturing method thereof - Google Patents

Abstract

The present invention provides a semiconductor light emitting device, wherein the surface of the n-type semiconductor layer 11 composed of AlGaInP for the light emitting semiconductor substrate 2 is configured with Au layer through the transition metal layer; employ the heat treatment at a temperature lower than the eutectic point of Ga and Au to let Au diffuse into the n-type semiconductor layer 11 through the transition metal layer 17 to form the ohmic contact area 4 in a depth of 20~1,000 angstroms and with small photo absorbability; removing the transition metal layer and Au layer; form the conductive photo reflection layer 5 formed with Al on the surfaces of the n-type semiconductor layer 11 and the ohmic contact area 4; and, employ the first and the second bonding metal layers 6, 7 to adhere the conductive support substrate 8 composed of Si doped with dopant with the photo reflection layer 5.

Description

200425537 (1) (ii) Description of the invention [Technical field to which the invention belongs] The present invention relates to a semiconductor light-emitting device having a Ga-based compound semiconductor, and more particularly to a semiconductor light-emitting device capable of improving light-emitting efficiency. [Prior technology] A typical semiconductor light emitting device in the past is composed of a support substrate made of conductive GaAs or the like, an n-type clad layer, an active layer, a mouth-type cladding layer, and connected to a p-type An anode part of the cladding layer and a cathode connected to a supporting substrate are formed. In addition, the n-type cladding layer, active layer, and P-type cladding layer are hereinafter referred to as a light-emitting semiconductor field. This semiconductor light-emitting device emits light generated in the light-emitting layer to the upper surface side through the p-type cladding layer, and is also radiated to the n-type cladding layer side, that is, the lower surface side. Since the light extraction surface of the semiconductor light emitting element is the upper side, in order to improve the light emitting efficiency, it is important how to reflect the light emitted from the active layer to the lower side to the upper side. In order to reflect the light radiated from the active layer to the lower side to the upper side, a structure is known in which a Bragg reflective film is arranged between the support substrate of the semiconductor light-emitting element having the basic structure described above and the light-emitting semiconductor field.

The Bragg reflective film has the same advantage as a light-emitting semiconductor that can be formed through a series of epitaxial growth processes. However, the Bragg reflective film does not have sufficient reflectivity for light with a broad wavelength in the spectral band. As another method for improving the light reflectance, in the semiconductor light-emitting device made of the above-mentioned basic structure (-5- (2) 200425537), a support substrate such as GaAs is removed after the growth of the Jiajing in the light-emitting semiconductor field, and the light is removed. A transmissive substrate is attached to the light-emitting semiconductor field, and a method of forming a light-reflective electrode on the lower surface of the light-transmissive substrate. However, the structure provided with the light-transmitting substrate and the light-reflective electrode has the disadvantage that the forward voltage between the anode and the cathode becomes relatively large due to the resistance at the interface between the light-emitting semiconductor field and the light-transmitting substrate. .

The method for solving the above disadvantages is disclosed in Japanese Patent Application Laid-Open No. 2002-2 745 0 (hereinafter referred to as Patent Document 1) filed by the applicant of the present case. This Patent Document 1 discloses that an AuGeGa alloy layer is dispersedly formed on the lower side of the light-emitting semiconductor field, and a metal reflective layer such as A1 is used to cover the Au G e G a alloy layer and light emission not covered by this. In the semiconductor field, a conductive support substrate is attached to the reflective layer. The AiiGeGa alloy layer can be used as a good European resistance contact for light emitting semiconductors such as AlGalnP. Therefore, according to this structure, the forward voltage between the anode and the cathode can be reduced. However, since the AuGeGa alloy layer of the aforementioned Patent Document 1 is relatively thick and contains Ge (germanium), the light absorption rate is large. Therefore, the reflectance of the composite layer composed of the AuGeGa alloy layer and the light reflection layer is about 30%, which is relatively small. Therefore, it is difficult to obtain a semiconductor light-emitting element having high light-emitting efficiency by the technique of the aforementioned Patent Document 1. In addition, the surface morphology of the AuGeGa alloy layer, that is, the flatness of the surface of the AuGeGa alloy layer is poor. Therefore, it is not possible to easily and well adhere the conductive support substrate to the field of light-emitting semiconductors having an AuGeGa alloy layer. -6-(3) 200425537

SUMMARY OF THE INVENTION Here, an object of the present invention is to provide a semiconductor light emitting device which can improve light emitting efficiency or reduce forward voltage.

The present invention which achieves the above-mentioned objects will be described with reference to the drawings showing the embodiments. In addition, the scope of patent applications and the reference signs herein are added only to help understand the present invention, and are not intended to limit the present invention. The semiconductor light emitting device of the present invention is characterized by:

Having one main surface (15) for taking out one of the light and the other main surface (1 6) on the opposite side of the one main surface, and one of the main surface (15) and the other main surface There are a plurality of compound semiconductor layers for emitting light between the surfaces (16), and the compound semiconductor layer (1 1) of the other main surface (16) is exposed in the plurality of compound semiconductor layers. A semiconductor substrate (2) formed of a compound semiconductor of (Ga); an electrode (3) connected to one of the principal surfaces (1 5) of the semiconductor substrate (2); and the above exposed on the semiconductor substrate (2) At least a part of the compound semiconductor layer (丨 丨) on the other main surface (16) is a European resistance contact, and the European resistance contact area (4) composed of a mixed layer of a metal material and gallium (Ga) and The compound semiconductor layer (n) used for covering the chamber to be exposed on the other (4) (4) 200425537 main surface (1 6) of the semiconductor substrate (2) and one of the above-mentioned European resistance contact areas (4) Or both, and has a conductive light reflecting layer (5). The Euro-resistance contact area (4) is composed of a mixed layer of Ga and Au. In addition, the thickness of the above-mentioned European resistance contact area (4) is 200-1000mm, and the compound semiconductor layer (11) exposed on the other main surface of the semiconductor substrate (2) is a conductive type It is determined that the impurity is added to an i-th compound semiconductor selected from the group consisting of AlxGayIni-x-yP ', where X and y are numbers satisfying $$ x < i, 〇 < ySi, 0 < x + y' 1, AlxGayIn] -x-yAs 'where X and y are numbers 2 that satisfy 〇 $ χ < ι, 〇 < y'l, 0 < x + y' 1, and AlxGayIn] -x-yN 'Here' X and y are formed in one of the third compound semiconductors composed of a number satisfying 〇 $ χ < ι, 〇 < y $ 1, 0 < x + yS 1 By. The light reflecting layer (5) is a metal layer having a reflectivity larger than that of the above-mentioned European resistance contact area (4). The above-mentioned metal layer is a Ming layer. It further has a conductive support substrate (8) bonded to the light reflecting layer (5). The conductive support substrate (8) is a silicon support substrate containing impurities, and has other electrodes (9) connected to the silicon support substrate (9) -8- (5) 200425537 The above-mentioned European resistance contact area (4) only It is provided on a part of the other main surface (16) of the semiconductor substrate (2), and the light reflecting layer (5) covers the above-mentioned European resistance contact area (4) and the other main surface of the semiconductor substrate (2) In the surface (1 6), there are not both the part of the above-mentioned European resistance contact area (4) and the like. The semiconductor substrate (2) includes:

A first conductivity type semiconductor layer (!) Composed of a Ga type compound semiconductor of a first conductivity type; an active layer composed of a Ga type compound semiconductor disposed on the above-mentioned first conductivity type semiconductor field (n) (2) and; a second conductive type semiconductor layer (13) that is disposed on the active layer (12) and is made of a Ga-based compound semiconductor of a second conductive type that is opposite to the first conductive type. A method for manufacturing a semiconductor light-emitting element is characterized by:

Have one main surface (15) for taking out one of the light and the other main surface (1 6) on the opposite side of the one main surface, and one of the main surfaces (15) and the above There is a plurality of compound semiconductor layers for emitting light between the other main surfaces, and the other main surface 6) exposed in the plurality of compound semiconductor layers is a compound semiconductor layer (1 1) containing gallium. (Ga) a process of forming a semiconductor substrate (2) of a compound semiconductor; a process of forming an auxiliary layer (17) containing a transition metal on at least a part of the other main surface (16) of the semiconductor substrate (2); On the auxiliary layer (17), a layer (1) containing a metal material containing the gallium which can be scattered to the semiconductor substrate (2) through the auxiliary layer-9- (6) (6) (200425537 (U)) is formed. 8) process; the temperature of the semiconductor substrate (2) having the auxiliary layer and the metal material-containing layer (i8) is lower than that of the element constituting the compound semiconductor layer (1 1) containing the gallium and the metal material. Eutectic point is Low heat treatment, and the metal material is introduced into the compound semiconductor layer (11) containing gallium through the auxiliary layer (17) to form the element and the metal constituting the compound semiconductor layer (11) containing gallium The process of the European resistance contact field (4) composed of the mixed layer of materials; the process of removing the auxiliary layer (17) and the layer (18) containing the metal material; and forming a semiconductor substrate (2) that can be covered and exposed ) One or both of the compound semiconductor layer (1 1) on the other main surface (1 6) and the European resistance contact area (4), and a light reflecting layer (5) having conductivity. The auxiliary layer (1 7) and the layer (i 8) containing the metal material are formed so as to cover only a part of the other main surface (1 6) of the semiconductor substrate (2). The light reflection layer (5) is formed It can cover both the above-mentioned European resistance contact area (4) and the other main surface (16) of the semiconductor substrate (2) where the above-mentioned European resistance contact area (4) is not formed. Above the semiconductor substrate (2) The compound semiconductor layer (11) on the other main surface is a conductive type-determining impurity that is selected from the group consisting of AlxGayIni- x_yp, where x 'y satisfies 〇 $ χ &lt;; ι, (xyg ;! -10- ( 7) 200425537, the first compound half AlxGayIii formed by the number of X <y + y $ 1] -x-yAs, where X and y are numbers satisfying 0Sx <l 0 &lt; x + y € 1 The second compound semiconducting AlxGayIni-x-yN constituted by 値, where X and y are in the third compound semiconductor consisting of the number 値 satisfying the number 値 Sx &lt; l 〇 &lt; x + y S 1 And the former. The other compound semiconductor layer (1 1) exposed on the semiconductor substrate (2) is an AlxGayln!-X-yP which determines the conductivity type. Here, X and y satisfy 0 &lt; χ &lt; 1 '〇 &lt; The compound semiconductor composed of the number 値 of x + y S 1 is 0.4 or larger, and the conductivity type determined above is 1018 cm_ 3 or larger. The auxiliary layer is selected from a layer containing at least one selected from the group consisting of Cr, Ti, Ni, Sc, V, Mn, Fe Zn, and Be;

Composite layer of Au layer, Cu layer and Au layer;

Composite layers of Cr layer, Ni layer and Au layer;

A composite layer of the Cr layer, the AuSi layer, and the Aχι layer, wherein the layer (18) of the metal material is selected from the gold (An) layer;

Composite layer of Au layer, Cr layer and Au layer;

Composite layers of Cr layer, Ni layer and Au layer;

The composite layer of the Cr layer, the AiaSi layer, and the Au layer, among which the light absorptivity of the European resistance contact field 4 of the present invention is higher than that of the J conductor, and is composed of 0, y $ 1, body, and 0, y $ 1, One of the main surface (16) dimensions of the body is added to 0 &lt; y $ 1, and the concentration of the above-mentioned xi mass is one of C0, Cu, and one. -By. Righteousness -11-(8)

GnAeGa is a low-ohmic contact area. Therefore, it is possible to suppress light absorption in the European resistance contact area 4 and to allow most of the light generated in the semiconductor substrate 2 and radiated toward the other main surface 16 of the semiconductor substrate 2 to be in the European resistance contact area Reflection occurs at the interface between 4 and the Ga-based compound semiconductor layer 1 1. In addition, when the European resistance contact area 4 is formed thin, a part of the light generated in the semiconductor substrate 2 and emitted toward the other main surface 16 of the semiconductor substrate 2 passes through the European resistance contact area 4 and thereafter The light is reflected in the reflective layer 5 and returns to one of the principal surfaces 15 of the semiconductor substrate 2 to become an effective light output. Therefore, the amount of light output from the semiconductor light emitting element is increased, and the light emitting efficiency can be improved. In addition, according to a preferred embodiment of the present invention, when the European resistance contact area 4 is provided on a part of the other main surface 16 of the semiconductor substrate 2, if the output light amount can be the same as in the past, the light is European resistance. The increase in the reflection amount at the interface between the contact area 4 and the light reflecting layer 5 can increase the area of the European resistance contact area 4. In other words, even if the area of the ohmic contact area 4 is increased, the output light amount can be made the same as before. As such, when the area of the European resistance contact area 4 is increased, the resistance of the current path at the time of light emission will be reduced, the forward voltage will be reduced, the power loss will be reduced, and the light emission efficiency will be improved. According to a preferred embodiment of the present invention, when the light-transmissive Euro-resistance contact area 4 is formed to a thinner 20 to 100 μA, the light absorption in the Euro-resistance contact area 4 will change. Is small, and the reflectance of the composite part of the Euro contact area 4 and the light reflecting layer 5 becomes larger. In addition, according to the manufacturing method of the present invention, the desired European resistance can be formed easily, easily, and productively by the function of the auxiliary layer 17 -12- (9) (9) 200425537 Point field 4. That is, since the transition metal has the function of solid-phase decomposition of the elements constituting the compound semiconductor and the function of cleaning the semiconductor surface, if the semiconductor layer and the metal material layer are heated through the auxiliary layer 17 containing the transition metal, Under comparative low temperatures (below eutectic temperature), semiconductor materials and metal materials are allowed to diffuse in a solid phase. The European resistance contact area 4 formed by the low-temperature solid-phase diffusion has a relatively thin thickness, and does not include the European resistance contact area 4 which may hinder light absorption. [Embodiment] The Best Mode for Implementing the Invention The First Embodiment Next, referring to FIG. 1 to FIG. 9, the semiconductor light emitting element 1 according to the first embodiment of the present invention, that is, a light emitting diode and a manufacturing method thereof . As shown in FIG. 1, the semiconductor light-emitting element 1 of the present invention is composed of a light-emitting semiconductor substrate 2 as a light-emitting semiconductor field, an anode 3 as a first electrode, and an ohmic contact field according to the present invention. 4. The light reflection layer 5, the first and second bonding metal layers 6, 7, a silicon support substrate 8 as a conductive support substrate, a cathode 9 as a second electrode, and a current blocking layer 10 are formed. The light-emitting semiconductor substrate 2 is an active layer in which the n-type semiconductor layer 1 as the first conductive type semiconductor layer is sequentially given]! 2. The P-type semiconductor layer 13 as the second conductive type semiconductor layer is formed by epitaxial growth of a current diffusion layer 14 composed of a p-type compound semiconductor. The light-emitting semiconductor substrate 2 has one of the principal surfaces 15 on the light extraction side and the other of the principal surface 16 on the opposite side to this (10) (10) 200425537. The light generated in the active layer 12 is extracted from one of the main surfaces 15 through the p-type semiconductor layer 13 and the current diffusion layer 14. The n-type semiconductor layer 11 also called a clad layer is a doped n-type impurity (such as Si) in the chemical formula AlxGayIni-x — yP, where x and y satisfy 0′χ &lt; 1 Ga + compound semiconductor composed of 0 &lt; ySl and 0 &lt; x + ySl. Here, the ratio X of A1 is preferably 0.1 5 to 0.45, more preferably 0.2 to 0.4. The ratio of Ga is preferably 0.15 to 0.35, and more preferably 0.4 to 0.6. The n-type impurity concentration of the n-type semiconductor layer 11 is preferably 5x10 17 3 or more. Ga contained in the n-type semiconductor layer 11 contributes to the formation of the ohmic contact region 4. As is well known, the n-type semiconductor layer 11 has a larger band gap than the active layer 12. In addition, at the position of the n-type semiconductor layer 11 in FIG. 1, an n-type contact layer composed of a Group 3 to 5 compound semiconductor that can be expressed by AlxGayIn] -x_yP is provided. An n-type cladding layer may be disposed between the layers 12, that is, an n-type semiconductor layer. When both an n-type contact layer and an n-type cladding layer are provided, these can be collectively referred to as a first conductive semiconductor layer. When the n-type contact layer is provided, the material of the n-type cladding layer can be set to be different from that of the n-type contact layer. The active layer 12 arranged on the n-type semiconductor layer 11 is also called a light-emitting layer. It is a chemical formula of AlxGayIn ^ x-yP, here; X, y are 0S 1, 0 $ 1, x + yS 1 is a p-type Group 3 to 5 compound semiconductor. In addition, X is preferably 0.1 or more. In this embodiment, although the conductive type impurity is not intentionally doped into the active layer 12, the p-type semiconductor layer may be doped at a lower concentration than that of the P-type semiconductor layer 13-14-(11) (11) 200425537. Impurities, and the n-type impurities are doped at a lower concentration than the n-type semiconductor layer U. Although FIG. 1 shows a single active layer 12, this may be a well-known multiple quantum well (MQW: Multi-Quantum-Well) structure or a single quantum well (SQW: Sing 1 e-Q uant U m — W e 11) structure. The p-type semiconductor layer 13 formed on the active layer 12 is also referred to as a p-type cladding layer, and has a chemical formula of AlxGayIni- x-yP. Here, X and y satisfy OSxSl, OSySl, and 〇 € χ + y S 1 is composed of a P-type 3 to 5 compound semiconductor. The concentration of the p-type impurity (for example, Zn) in the p-type cladding layer 13 is determined to be, for example, 5 × 10] 7 cm −3 or more. As is well known, the p-type semiconductor layer 1 3 has a larger band gap than the active layer 12. The current diffusion layer disposed on the p-type semiconductor layer 1 3 has a current flowing to the light-emitting semiconductor substrate 2. The effect of the uniformity of the distribution of the forward current can produce the effect of the European resistance contact with the anode 3 and the effect of exporting the light generated in the active layer 12 to the outside of the element. For example, it is composed of a p-type group 3-5 compound semiconductor such as Gap or O &amp; "11b 3 or AlxGa] -xAs. The p-type impurity concentration of the current diffusion layer 14 is set to be higher than that of a p-type semiconductor. The layer 13 is high. In addition, a p-type contact layer may be provided on the current diffusion layer 14. The current block layer 10 disposed on the center upper portion of the current diffusion layer 14 is made of an insulating layer. The current blocking layer 10 is for preventing a forward current from flowing to the central portion of the light-emitting semiconductor substrate 2. The anode 3 is composed of, for example, a composite layer of a Cr layer and an Au layer, and is -15- (12) (12) 200425537 It is placed on the top of the IL spreading layer 14 and the current blocking layer 10 and as a Euro-resistance contact with the current spreading layer 14. In addition, the anode 3 is to make the forward current flow uniformly. It is formed in a grid or lattice shape when viewed from a direction perpendicular to the main surface 15 of the substrate 2. In addition, the anode 3 may be a light-transmitting electrode. The Euroblock contact area 4 of the present invention is dispersed. It is arranged on the other main surface 16 of the light-emitting semiconductor substrate 2. That is, from the other main surface of the light-emitting semiconductor substrate 2 From the perspective of FIG. 16, each of the European resistance contact areas 4 is formed like an island-shaped buried semiconductor layer η. Therefore, each of the European resistance contact areas 4 and the n-type semiconductor layer located therebetween are formed. The two are exposed on the other main surface 1 of the light-emitting semiconductor substrate 2. Each of the ohmic contact areas 4 is essentially composed of only a mixed layer or alloy layer of Ga and Au, and is reflected from the n-type semiconductor layer 11 and light. The layer 5 is used as a European resistance contact. Each of the European resistance contact areas 4 composed of a GaAu mixed layer is preferably formed to a thickness of 20 to 1 000 A. When the thickness of the European resistance contact area 4 is thinner than 20 A , It is not possible to obtain a good European resistance contact, and when the thickness exceeds 1000A, the light transmission of the European resistance contact area 4 becomes poor. The European resistance contact area composed of an AuGa mixed layer The light absorptivity of 4 is smaller than that of the AuGeGa alloy layer of the above-mentioned Patent Document 1, and the light transmittance of the European resistance contact field 4 composed of the AiiGa alloy layer is higher than that of the AuGeGa alloy layer of the above-mentioned Patent Document 1. The light transmittance is large. That is, since the AuGeGa alloy layer of the above-mentioned Patent Document 1 contains Ge that can block light transmission, and It has a thickness of 2000 A or more. Therefore, in the European resistance contact field of the aforementioned patent document -16- (13) (13) 200425537, the majority of light is absorbed by the European resistance contact field, and there is almost no transmission. Light in the European resistance contact field. Compared to this, the European resistance contact field 4 in this embodiment is composed of an AuGa mixed layer not containing Ge and has a relatively thin thickness of 20 to 1,000 A. Therefore, the light transmittance is larger than that of the conventional AuGeGa. The surface of the ohmic contact area 4 and the surface of the n-type semiconductor layer 11 are covered by the light reflection layer 5. The reflectance of the surface of the light reflecting layer 5 is lower than the reflectance at the interface between the ohmic contact area 4 and the n-type semiconductor layer 11. Part of the light radiated from the active layer 12 to the other main surface 16 side of the light-emitting semiconductor substrate 2 is reflected at the interface between the n-type semiconductor layer 11 and the light reflection layer 5 between the European resistance contact areas 4 And it returns to the other main surface 15 side of the light-emitting semiconductor substrate 2, and another part of the light is reflected at the interface between the n-type semiconductor layer 11 and the European resistance contact area 4 and returns to one of the light-emitting semiconductor substrate 2. On the main surface 15 side, another part of the light is reflected at the interface between the European resistance contact area 4 and the light reflecting layer 5 after passing through the European resistance contact area 4 and returns to one of the main surfaces of the light-emitting semiconductor substrate 2. 1 to 5 sides. In this embodiment, the composite layer of the European resistance contact area 4 and the light reflection layer 5 is a light reflection layer, that is, an n-type semiconductor layer, which radiates light from the active layer 12 to the European resistance contact area 4 side. The total light reflectance at the interface between 1 1 and the European resistance contact area 4 and the optical reflectance at the interface between the European resistance contact area 4 and the light reflecting layer 5 is about 60%. Since the light reflectance of the composite layer of the European resistance contact field and the light reflection layer composed of AuGeGa in the above-mentioned Patent Document 1 is about 30%, the European resistance contact field 4 and the light reflection layer 5 of the present invention The light reflectivity of the composite layer is greatly improved. This -17- (14) (14) 200425537 invention can improve the light reflectance by the fact that the European resistance contact area 4 does not contain Ge, but is essentially composed of AuGa, and the European resistance contact area 4 is extremely thin. 20 ~ 1 000 A to reach. The first bonding metal layer 6 is made of All and is formed on the entire lower surface of the light reflection layer 5. The second bonding metal layer 7 is made of All and is formed on one surface of a silicon support substrate 8 having conductivity. The first and second bonding metal layers 6, 7 are bonded to each other by a thermal compression method. The silicon support substrate 8 which is a conductive support substrate is one which introduces impurities into the silicon, and has a mechanical support function of the light-emitting semiconductor substrate 2, a function as a heat sink, and a function as a current path. The cathode 9 is formed under the entire silicon support plug plate 8. When the metal supporting substrate is replaced instead of the silicon supporting substrate 8, since it becomes a cathode, the cathode 9 of Fig. 1 can be omitted. When manufacturing the semiconductor light emitting element 1 of FIG. 1, the light emitting semiconductor substrate 2 of FIG. 3 is first prepared. The light-emitting semiconductor substrate 2 of FIG. 3 allows the n-type semiconductor layer 1 1, the active layer 1 2, the p-type semiconductor layer 13, and the current diffusion layer to be dependent on each other by a well-known MOCVD (Metal Organic Chemical V a ρ 1 · Deposition) method. Sequential epitaxial growth was performed on a GaAs substrate (not shown), and was then obtained by removing the above-mentioned GaAs substrate. Next, a vacuum metallization method is used to sequentially form, on the surface of the other main surface 16 ′ of the light-emitting semiconductor substrate 2, that is, the n-type semiconductor layer 11, a transition metal layer made of, for example, C r and Al (gold). Floor. Next, an etch mask with a certain pattern is formed on the metal layer by the well-known light lithography technique, and the -18- (15) (15) 200425537 mask is used to remove the metal and the transition metal layer into a certain pattern by uranium etching. The transition metal layer 17 and the metal 18 shown in FIG. 4 are obtained. Thereby, a part of the other main surface 16 of the light-emitting semiconductor substrate 2 is exposed. In addition, in order to form the transition metal layer 17 and the metal into the pattern shown in FIG. 4, a photoresist layer having an opening is formed on the other main surface 16 of the light-emitting semiconductor substrate 2, and the opening is formed by vacuum evaporation and A transition metal layer 17 and a metal 18 are formed on the photoresist layer, and then the photoresist layer and the transition metal layer 17 and the metal 18 thereon can be removed. The thickness of the transition metal layer 17 in FIG. 4 is 10 to 500 A, and the thickness of the metal 18 is about 200 to 1000 0 A. Next, for the light-emitting semiconductor substrate 2 accompanied by the transition metal layer 17 and the metal 18 shown in FIG. 4, a Au (gold) eutectic point of Ga and metal 18 among the n-type semiconductor layers 11 is implemented. That is, the eutectic point (345 ° C) is a low temperature, and the temperature of Au (gold) or a similar metal can be diffused to the ^ -type semiconductor layer 11 with the help of a transition metal layer 17 (Eg 300 ° C) heat treatment (annealing). As a result, the Al of the metal 18 can be diffused to the transition metal layer 17 through the transition metal layer 7 to generate a Euro contact area 4 composed of a mixed layer of Ga and Au. The field of the European resistance contact may also be referred to as Au of metal 18 or a diffusion layer of a metal similar thereto. The temperature and time of the above-mentioned heat treatment are determined so as to limit the thickness of the European resistance contact area 4 to a range of 20 to 1,000 A. In addition, the heat treatment temperature is determined so that a thin and uniform thickness can be obtained, which has a low ® P and 'and the n-type semiconductor layer n can be used as a special resistance of the European resistance contact @ 欧 I® contact Arbitrary badger of field 4. That is, the heat treatment temperature is determined by -19- (16) (16) 200425537 to an arbitrary temperature lower than the eutectic point of Ga and An (gold), that is, the eutectic point (345 1). The characteristic line A in FIG. 9 shows the change of the reflectance of the composite part of the European resistance contact area 4 and the light reflecting layer 5 with respect to the change in the heat treatment temperature according to the present invention, and the characteristic line B indicates AuGeGa European resistance connection. The change in the reflectance of the composite portion of the point area and the light reflection layer is compared with the change in the heat treatment temperature when the European resistance contact area made of AuGeGa in the aforementioned patent document is formed. -The reflectance is measured with red light with a wavelength of 650 nm. In the case of the conventional ohmic contact area containing Ge as shown in the characteristic line B, the reflectance is about 30% under a heat treatment at 300 ° C, and when G is not included in the invention shown in the characteristic line A In the case of e, the reflectance under heat treatment at 300 ° C is about 60%. Therefore, it can be seen that the reflectance of the composite portion of the Euro contact area 4 and the light reflecting layer 5 can be increased by 30% by the present invention. According to the characteristic line A of Fig. 9, the lower the heat treatment temperature, the higher the reflectance becomes. However, when the heat treatment temperature is too low, the contact resistance between the European resistance contact region 4 and the n-type semiconductor layer 11 will increase. In order to suppress the contact resistance to 2 X 1 (T 4 Ω cm2 or less, it is preferable to set the heat treatment temperature to 250 to 34 (TC, and more preferably 290 to 3 3 0 ° C. The transition metal layer 17 is at During the heat treatment, AlGalnP constituting the n-type semiconductor layer u is decomposed into various elements, and it has the effect of making each element easy to operate and the effect of cleaning the surface of the n-type semiconductor layer 11 1. According to the above-mentioned effect of the transition metal layer 17 By heat treatment at a temperature lower than the eutectic point of Ga and au, Aι is diffused to the n-type semiconductor layer 1 丨, and a mixed layer or alloy layer composed of Ga -20- (17) (17) circle 425537 and Aι The formed European resistance contact area 4 is extremely thin. Then, the heat-treated transition metal layer 17 and metal 18 in FIG. 5 are removed by etching, and the European resistance contact area 4 in FIG. 6 is obtained. Light-emitting semiconductor substrate 2. The surface morphology (Morphology) of the ohmic contact area 4 composed of a mixed layer of Au and Ga obtained in a heat treatment at a lower temperature than the eutectic point of Alm and Ga will be borrowed. Structured by AnGeGa by heat treatment above eutectic point of Patent Document 1 mentioned above The surface morphology (Morphology) of the ohmic contact area is greatly improved. Therefore, the flatness of the other main surface 16 of the light-emitting semiconductor substrate 2 containing the ohmic contact area 4 in FIG. 6 is good. As shown in FIG. 7, the other main surface 16 that can cover the light-emitting semiconductor substrate 2, that is, the exposed surface of the n-type semiconductor layer 11 and the surface of the ohmic contact region 4 are formed by a vacuum evaporation method. The light reflection layer 5 formed of the A1 layer having a thickness of about 1 to 10 // m is subjected to a short-time heat treatment with an infrared lamp, etc. Thereby, the light reflection layer 5 having conductivity is connected to the European resistance. Field 4 is a Euro-resistance junction and is bonded to the n-type semiconductor layer ji. Since the light reflection layer 5 composed of A1 is in Schottky contact with the n-type semiconductor layer 1 1, the forward current of the semiconductor light-emitting element 1 does not change from The n-type semiconductor layer 11 flows to the light reflection layer 5. The surface resistance (Morphology) of the ohmic contact region 4 adjacent to the light reflection layer 5 is good, and therefore, the flatness of the light reflection layer 6 is excellent. Shaped on the light reflecting layer 5 by vacuum evaporation of A1 It becomes the first bonding metal layer 6. -21-(18) (18) 200425537 Next, it is ready to form a second bonding metal layer 7 made of Au by vacuum deposition on S containing impurities in FIG. One of the main surfaces of the conductive substrate 8 composed of the i substrate is formed by subjecting the first and second metal bonding layers 6 and 7 to pressure contact to perform a heat treatment at a temperature of 30 ° C. or less. Atom diffuses to each other and sticks the first and second metal bonding layers 6 and 7 together, so that the light-emitting semiconductor substrate 2 and the conductive silicon support substrate 8 are integrated. Next, as shown in FIG. 1, a current blocking layer 10 and an anode 3 are formed on one surface 15 of the light-emitting semiconductor substrate 2, and a cathode 9 is formed under the conductive support substrate 8, thereby completing the semiconductor light-emitting element 1. This embodiment has the following effects. (1) Since the European resistance contact area 4 does not contain G e with high light absorption and is formed to be extremely thin, the light reflectance of the composite layer of the European resistance contact area 4 and the light reflection layer 5 has a high 値(E.g. 60%). Therefore, most of the light emitted from the active layer 12 to the light reflection layer 5 side is returned to one of the substrate 15 sides of the light-emitting semiconductor substrate 2 and the luminous efficiency is increased. (2) Due to the Euro-resistance contact field The light reflectance of the composite layer of 4 and the light reflecting layer 5 becomes larger, so when a certain light output is to be obtained, the area of the European resistance contact area 4 accounts for the area of the other main surface 16 of the light emitting semiconductor substrate 2 The ratio can be increased over the past. When the area of the European resistance contact area 4 is increased, the forward resistance of the semiconductor light-emitting element 1 will be reduced, and the forward voltage drop and power loss will be reduced to improve the luminous efficiency. The maximum luminous efficiency of the red light-emitting diode according to this embodiment is 471 m / W (lumens / watt) at a current density of 40 A / cm2 -22- (19) (19) 200425537. (3) Diffusion of Al from the Au layer 18 to the n-type semiconductor layer 11 through the transition metal layer 17 makes it easy to form a Euro contact field composed of $ _AuGa at a temperature lower than the eutectic point 4 . (4) Since the surface morphology (Morphology) of the Euro contact area 4 is improved, the conductive support substrates 8 can be stuck together well. Second Embodiment Next, a semiconductor light emitting element 1a according to a second embodiment will be described with reference to Fig. 10. However, in FIG. 10, the same parts as those in FIG. 1 are assigned the same reference numbers, and descriptions thereof are omitted. The ohmic contact area 4 in the semiconductor light emitting element 1 a of FIG. 10 is formed on the entire other main surface 16 of the light emitting semiconductor substrate 2. ιρ forms the European resistance contact area 4 in this way. Since the composite layer of the European resistance contact area 4 and the light reflection layer 5 has a relatively high reflectance of 60%, a relatively high luminous efficiency can be obtained. In addition, compared with Fig. 1, if the area of the European resistance contact area 4 becomes larger, the resistance of the forward current path becomes smaller and the power loss is reduced. In Fig. 10, instead of the silicon support substrate 8 of Fig. 1, a metal support substrate 8a is thermocompression bonded to the light reflection layer 5. Therefore, the metal supporting substrate 8a has a supporting function of the light emitting semiconductor substrate 2 and a function as a cathode. The European resistance contact area 4 in FIG. 10 is formed by the same method as that shown in FIG. 1 with the same number -23- (20) (20) 200425537, and has the same composition and thickness. Therefore, even with the semiconductor light emitting element 1a of FIG. 10, the same results as those of the semiconductor light emitting element 1 of FIG. 1 can be obtained. The present invention is not limited to the above-mentioned embodiments, and may be modified as follows, for example. (1) When the mechanical strength of the light-emitting semiconductor substrate 2 is sufficient, the silicon support substrate 8 of FIG. 1 and the metal support substrate 8 a of FIG. 10 may be omitted. In this case, the conductive light reflection layer 5 is used as a cathode. (2) In FIG. 2, although the distribution pattern seen from the plane of the European resistance contact area 4 is a rectangular island shape, it may be deformed into a circular island shape or a lattice shape. (3) Although the Euro 4 contact area is in contact with the n-type semiconductor layer 11, it may be replaced with an n-type contact made of AlGalnP between the n-type semiconductor layer 11 and the light reflection layer 5. Layer, or an n-type buffer layer, or both, and the resistance contact area 4 can be contacted therewith. (4) Even if the European resistance contact area 4 is composed of other materials such as Au G e G a other than Au G a, as long as it is transparent, its thickness is limited to 20 to 1 0 00 A, can make the light reflectance of the composite layer of the European resistance contact area 4 and the light reflection layer 5 relatively high, and can improve the light emitting efficiency. (5) The metal 18 is alloyed with Ga other than Al, and can be used as a material for forming a European resistance contact. Industrial Applicability -24- (21) (21) 200425537 As described above, the present invention can be applied to a semiconductor light emitting device. [Brief Description of the Drawings] Fig. 1 is a sectional view showing a semiconductor light emitting device according to a first embodiment of the present invention. FIG. 2 is a sectional view taken along the line A-A of the semiconductor light-emitting element of FIG. 1. FIG. FIG. 3 is a cross-sectional view of a light-emitting semiconductor substrate for explaining the manufacturing process of the semiconductor light-emitting element of FIG. 1. FIG. Fig. 4 is a sectional view showing a state where a transition metal layer and a metal are provided on the light-emitting semiconductor substrate of Fig. 3; Fig. 5 is a cross-sectional view showing a case where a Euro-resistance contact region is formed by subjecting the light-emitting semiconductor substrate shown in Fig. 4 to heat treatment. 'FIG. 6 is a cross-sectional view showing a state where the transition metal layer and the metal are removed from FIG. 5. FIG. 8 is a cross-sectional view when a conductive support substrate is attached in FIG. 7. Fig. 9 is an explanatory diagram showing the relationship between the heat treatment temperature when forming the resistance contact area and the reflectance of the composite layer between the resistance contact area and the light reflecting layer according to the present invention and the conventional example. Fig. 10 is a sectional view showing a semiconductor light emitting device according to a second embodiment of the present invention in the same manner as Fig. 1; Element comparison table-25- (22) 200425537 1 _ · Semiconductor light-emitting element 2: Light-emitting semiconductor substrate 3: Anode 4: European resistance contact area 5: Light reflecting layer 6: First bonding metal layer 7: Second bonding Metal layer

8: silicon support substrate 9: cathode

1 〇 = current blocking layer 1 1: n-type semiconductor layer 12: active layer 1 3: p-type semiconductor layer 1 4: current diffusion layer 15: one of the main surfaces 16: the other of the main surfaces 17: transition Metal layer 18: metal-26-

Claims (1)

(1) (1) 200425537 Patent application scope 1 · A semiconductor light-emitting device, comprising: a main surface (15) having one of the main surfaces for extracting light and an opposite side of the main surface The other main surface (1 6), and a plurality of compound semiconductor layers for emitting light are provided between one of the main surfaces (15) and the other main surface (16), and are exposed on the plurality of The compound semiconductor layer (1 1) on the other main surface (16) in the compound semiconductor layer is a semiconductor substrate (2) formed of a compound semiconductor containing gallium (Ga); and is connected to the semiconductor substrate (2). At least a part of the electrode (3) on one of the main surfaces (15) and the compound semiconductor layer (1 1) exposed on the other main surface (1 6) of the other semiconductor substrate (2) is in European resistance black Occupy the European resistance contact area (4) composed of a mixed layer of metal material and gallium (G a); and for covering the other main surface (1 6) exposed on the semiconductor substrate (2) Compound semiconductor layer (η) One or both of the resistance contact areas (4) and a conductive light reflecting layer (5) 〇2. For example, the semiconductor light-emitting element of the first patent application scope, wherein the above-mentioned European resistance contact areas (4 ) Is composed of a mixed layer of Ga and Au. 3. The semiconductor light-emitting element according to item 1 of the patent application scope, wherein the thickness of the above-mentioned European resistance contact area (4) is 20 to 100 A. -27- (2) (2) 200425537 4. If the semiconductor light-emitting element of the first patent application scope, the compound semiconductor layer (11) exposed on the other main surface of the semiconductor substrate (2) is a conductive layer The type-determining impurity is added from the group consisting of A 1 XG ay I η -x _ y P, where X, y are 0 + X &lt; 1, 0 &lt; yg 1, 〇 &lt; x + y $ 1 The first compound semiconductor composed of numbers is composed of A] xGayIn] -x-yAs, where x and y are the numbers satisfying 0'x &lt; l, 0 &lt; y $ i, 0 &lt; x + yS 1 The second compound semiconductor and AlxGayln] — x-yN, where X and y are composed of numbers satisfying 0 S χ &lt; 1, 0 &lt; y $ l, 〇 &lt; x + yS; l It is one of the third compound semiconductors. 5. The semiconductor light-emitting device according to item 1 of the scope of patent application, wherein the light reflecting layer (5) is a metal layer having a reflectance larger than that of the above-mentioned Euro contact area (4). 6 · The semiconductor light-emitting device according to item 5 of the patent application, wherein the metal layer is an aluminum layer. 7 · If the semiconductor light-emitting device according to item 1 of the scope of patent application has a conductive support substrate (8) combined with the above-mentioned light reflection layer (5). 8. The semiconductor light-emitting element according to item 7 of the scope of patent application, wherein the conductive support substrate (8) is a silicon support substrate containing impurities, and further has other electrodes (9) connected to the silicon support substrate. 9. The semiconductor light-emitting element according to item 1 of the scope of patent application, wherein the above-mentioned European resistance contact area (4) is only provided on a part of the other main surface (1 6) of the semiconductor substrate (2), and the light-reflecting layer ( 5) The above-mentioned another -28- (3) (3) 200425537 main surface (1 6) which covers the above-mentioned European resistance contact area (4) and the semiconductor substrate (2) is not formed with the above-mentioned European resistance contact The part of the dot field (4) waits for both. 10. The semiconductor light emitting device according to item 1 of the patent application scope, wherein the semiconductor substrate (2) is provided with: a first conductive type semiconductor layer (1 1) composed of a first conductive type Ga-based compound semiconductor; An active layer (1 2) composed of a Ga-based compound semiconductor disposed on the above-mentioned first conductivity type semiconductor field (U); and is disposed on the above active layer (1 2) and is opposite to the first conductivity type A second conductivity type semiconductor layer (13) composed of a second conductivity type Ga-based compound semiconductor. 11. A method of manufacturing a semiconductor light-emitting element, characterized in that it is prepared to have one main surface (1 5) for taking out one of the light and the other main surface (, 1 on the opposite side of the one main surface) 6), and there is a plurality of compound semiconductor layers for emitting light between one of the main surfaces (15) and the other main surface (16), and the above is exposed in the plurality of compound semiconductor layers The compound semiconductor layer (Π) on the other main surface (16) is a process of a semiconductor substrate (2) formed of a compound semiconductor containing gallium (Ga); on the other main surface (16) of the semiconductor substrate (2), A process of forming at least a part of an auxiliary layer (17) containing a transition metal; forming on the above-mentioned auxiliary layer (17) a layer containing the above-mentioned auxiliary layer (17) which can be diffused to the semiconductor substrate (2) containing the above-mentioned The process of the layer (1 8) of the metal material of gallium; -29- (4) 200425537 The implementation temperature of the semiconductor substrate (2) having the auxiliary layer and the layer (1 8) containing the metal material is higher than that of the semiconductor substrate (2). The eutectic point of the element of the compound semiconductor layer (1 1) of the gallium and the metal material is low, and the metal material is introduced into the compound semiconductor layer (1) containing the gallium through the auxiliary layer (1 7). 1), and a process of forming a European resistance contact area (4) composed of a mixed layer of the element constituting the compound semiconductor layer (11) containing the above-mentioned gallium and the above-mentioned metal material; A process of removing the auxiliary layer (1 7) and the layer (1 8) containing the metal material, and forming a compound semiconductor layer (1) that can cover the other main surface (1 6) exposed on the semiconductor substrate (2) 1) Light-reflective layer (5) -30- 1 2 which is conductive with one or both of the above European resistance contact areas (1 2 3 4) In the method for manufacturing a semiconductor light-emitting device, the auxiliary layer (17) and the layer 2 containing the metal material are formed so as to cover only a part of the other main surface (16) of the semiconductor substrate (2). 3 1 3. According to the method for manufacturing a semiconductor light-emitting device according to item 12 of the scope of patent application, the light reflection layer (1 5) is formed so as to cover the above-mentioned European resistance contact area (4) and the semiconductor substrate (2). The other main surface (1 6) is not formed with the part of the above-mentioned European resistance contact area (4). 4 1 4. According to the method for manufacturing a semiconductor light-emitting device according to item 11 of the scope of patent application, the compound semiconductor layer (i) exposed on the other main surface of the semiconductor substrate (2) is an impurity that is determined by the conductivity type (5) (5) 200425537 is selected from the group consisting of AlxGayIn] —x—yP, where χ and y are numbers 满足 that satisfy 〇 $ χ &lt; ι, 〇 &lt; y $ 1, 0 &lt; x + y S 1 The first compound semiconductor 'AlxGayIn〗 -x-yAs' where X and y are numbers 2 that satisfy 0 $ χ &lt; 1, 〇 &lt; y S 1, 0 &lt; x + y $ 1 And a third compound semiconductor consisting of AlxGayln ^ x-yN, where X and y are numbers satisfying 0 ^ χ &lt; 1, 0 &lt; y ^ 1, 0 &lt; x + y S 1 Formed within one of them. 1 5 · According to the method for manufacturing a semiconductor light-emitting device according to item 11 of the scope of patent application, the compound semiconductor layer (11) exposed on the other main surface (16) of the semiconductor substrate (2) is an impurity that determines the conductivity type Added to AlxGayllM-x-yP, where X and y are compound semiconductors composed of a number of 满足 Sx &lt; 1, 〇 & y $ 1, 0 &lt; x + y S 1 0, and The X in the above X is 0.4 or larger, and the conductivity type determining impurity concentration is 1018 cm_3 or larger. 16 · The method for manufacturing a semiconductor light-emitting device according to item 11 of the scope of patent application, wherein the auxiliary layer is selected from the group consisting of Cr, Ti, Ni, S c, V, M η, F e, C ο, C a layer of at least one of u, Zn, and Be; a composite layer of an Au layer, a Cu layer, and an AU layer; a composite layer of a Cr layer, a Ni layer, and an Au layer; and a composite layer of a Cr layer, an AixSi layer, and an Atom layer One of them. 1 7. According to the method for manufacturing a semiconductor light-emitting element according to item 11 of the scope of patent application, the layer (18) containing the above-mentioned metal material is selected from the gold (Au) layer; -31-(6) 1200425537 Au layer and Cr layer and One of a composite layer of an Au layer; a composite layer of a Cr layer, a Ni layer and AU 餍; and a composite layer of a Cr layer, an AuSi layer, and an Au layer. 18 · The method for manufacturing a semiconductor light emitting device according to item 11 of the patent application range, wherein the above-mentioned European resistance contact area (4) is composed of Ga and Au gold layers. 1 9 · The method for manufacturing a semiconductor light-emitting device according to item n of the patent application park, wherein the thickness of the above-mentioned European resistance contact area (4) is 20 to A 〇2 〇. The semiconductor light-emitting device according to item 11 of the patent application range The manufacturing method, wherein the light reflecting layer (5) is a metal layer having a reflectance larger than that of the contact area (4). 2 1. The method for manufacturing a semiconductor light emitting device according to claim 20, wherein the metal layer is an aluminum layer. 22. The method for manufacturing a semiconductor light-emitting element according to item 11 of the patent application scope further includes a process of bonding a conductive support substrate (8) to the above-mentioned radiation layer (5). 23. A method for applying a semiconductor light-emitting element according to claim 22, wherein the conductive support substrate (8) is a support substrate containing impurities and further has a process of connecting the electrode (9) to the silicon support plate. The system of the system The system of the system 1000 The system of the system of resistance The system of photoresistance made of silicon -32-