TW200425320A - Manufacturing method of semiconductor device, automatic operation method of semiconductor device, automatic operation system, and automatic operation method of CMP apparatus - Google Patents

Manufacturing method of semiconductor device, automatic operation method of semiconductor device, automatic operation system, and automatic operation method of CMP apparatus Download PDF

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Publication number
TW200425320A
TW200425320A TW093109124A TW93109124A TW200425320A TW 200425320 A TW200425320 A TW 200425320A TW 093109124 A TW093109124 A TW 093109124A TW 93109124 A TW93109124 A TW 93109124A TW 200425320 A TW200425320 A TW 200425320A
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Taiwan
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film thickness
processing
host computer
semiconductor manufacturing
product wafer
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TW093109124A
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Chinese (zh)
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TWI277149B (en
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Hirofumi Tsuchiyama
Shinji Nishihara
Masahiro Aoyagi
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Trecenti Technologies Inc
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/34Accessories
    • B24B37/345Feeding, loading or unloading work specially adapted to lapping
    • EFIXED CONSTRUCTIONS
    • E21EARTH DRILLING; MINING
    • E21DSHAFTS; TUNNELS; GALLERIES; LARGE UNDERGROUND CHAMBERS
    • E21D9/00Tunnels or galleries, with or without linings; Methods or apparatus for making thereof; Layout of tunnels or galleries
    • E21D9/10Making by using boring or cutting machines
    • E21D9/11Making by using boring or cutting machines with a rotary drilling-head cutting simultaneously the whole cross-section, i.e. full-face machines
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B49/00Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation
    • B24B49/02Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B51/00Arrangements for automatic control of a series of individual steps in grinding a workpiece
    • EFIXED CONSTRUCTIONS
    • E21EARTH DRILLING; MINING
    • E21DSHAFTS; TUNNELS; GALLERIES; LARGE UNDERGROUND CHAMBERS
    • E21D9/00Tunnels or galleries, with or without linings; Methods or apparatus for making thereof; Layout of tunnels or galleries
    • E21D9/10Making by using boring or cutting machines
    • E21D9/1006Making by using boring or cutting machines with rotary cutting tools
    • EFIXED CONSTRUCTIONS
    • E21EARTH DRILLING; MINING
    • E21DSHAFTS; TUNNELS; GALLERIES; LARGE UNDERGROUND CHAMBERS
    • E21D9/00Tunnels or galleries, with or without linings; Methods or apparatus for making thereof; Layout of tunnels or galleries
    • E21D9/10Making by using boring or cutting machines
    • E21D9/1086Drives or transmissions specially adapted therefor

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  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Mining & Mineral Resources (AREA)
  • Environmental & Geological Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • General Life Sciences & Earth Sciences (AREA)
  • Geochemistry & Mineralogy (AREA)
  • Geology (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The subject of the present invention is to carry out automation in the semiconductor fabrication engineering such as CMP engineering having high manpower operation ratio so as to obtain reasonably less manpower, raising the processing capability, compressing the investment money, and indirect business efficiency increase. In the CMP processing, only the processing program 24 of the product wafer is loaded in the CMP apparatus 11 from the primary computer 19. Before processing the product wafer, by performing the predetermined treatment of the virtual wafer, it is capable of realizing unmanned operation. In addition, the processing data of the lapping time and the measured data of thickness measuring apparatus 17 mounted on the unmanned operated CMP apparatus 11 are transmitted to the primary computer 19 from the CMP apparatus 11. The program condition of CMP apparatus can be changed according to the latest data such that the measurement process of the next engineering can be omitted by feeding in advance and using flexibly in the processing condition of the next engineering based on the thickness measurement data.

Description

200425320 (1) 玖、發明說明 【發明所屬之技術領域】 本發明係關於半導體裝置的製造方法、半導體製造裝 置的自動運轉方法及自動運轉系統、以及CMP ( Chemical Mechanical Polishing:化學機械硏磨)裝置的自動運轉方 法,特別是關於有效適用於多種少量生產之半導體裝置之 製造工程的 APC(Advanced Process Control:先進製程控 制)技術之技術。 【先前技術】 本發明人所檢討的技術中,例如,在半導體製造裝置 之CMP裝置中,於硏磨初期,由於硏磨率不穩定故,乃 思考將虛擬晶片當成起始虛擬晶片做初期硏磨,在硏磨率 穩定後,才硏磨產品晶圓,以謀求處理的穩定化及精度的 提升。 但是,在多數之情形下,需要各別設定虛擬晶圓之處 理條件(程式)和產品晶圓之處理條件(程式),本來, 在往只指示、控制產品的處理條件之自動化邁進上,虛擬 晶圓的處理成爲瓶頸。 半導體製造裝置之CMP裝置的自動運轉方法中,有 由硏磨前之膜厚資料和硏磨後的膜厚資料之差,以及實際 的硏磨時間,以算出最新的硏磨率,由工廠的主電腦將製 程程式資訊當成最佳程式而設定於CMP裝置之方法(例 如,參考專利文獻1 )。 (2) (2)2|00425320 另外,存在有以前饋式決定進行CMP後的膜厚之條 件,以進行以後之蝕刻處理的方法(例如,參考專利文獻 2 )。 另外,存在有對硏磨後的晶圓照射可見光線,藉由光 學感測器以測量晶圓的膜厚,將測量結果送回控制部,以 設定下一晶圓的硏磨時間之方法(例如,參考專利文獻 3 ) 〇 另外,存在有在硏磨中,對晶圓照射紅外雷射光束, 藉由測量反射光的都卜勒位移量,以測量硏磨膜厚的變化 之方法(例如,參考專利文獻4 )。 另外’存在有在CMP中,由晶圓的反射光強度、頻 率頻譜以界定不是受到裝置圖案的影響之比較平坦的區 域’以高精度地測量晶圓的膜厚之方法(例如,參考專利 文獻5 )。 另外’存在有由投入的批量之硏磨前的膜厚資料和硏 磨後的膜厚資料的差和實際的硏磨時間,以算出最新的硏 磨率’當成變動參數加以保存,配合程式固定部份和程式 變動部份而當成最佳程式以設定在CMP裝置之方法(例 如’參考專利文獻6 )。 另外,存在有以CMP裝置加工前導晶圓,測量其之 膜厚,依據其測量結果,設定本體晶圓的硏磨時間以做加 工,測量、計算殘留膜厚,以判定需要再硏磨之晶圓的方 法(例如,參考專利文獻7 )。 [專利文獻1] ** 6 - (3) (3)200425320 日本專利特開平1 1 - 1 862 04號公報 [專利文獻2] 日本專利特開2002- 1 5 1 465號公報 [專利文獻3] 日本專利特開08- 1 7768號公報 [專利文獻4] 日本專利特開2000-3 5 3 1 6號公報 [專利文獻5] 日本專利特開2003 -4272 1號公報 [專利文獻6] 日本專利特開平1 1 - 1 8 62 04號公報 [專利文獻7] 日本專利特開2000- 1 5 5 74號公報 【發明內容】 可是,在如前述之 CMP裝置的自動化技術中,本發 明人檢討的結果,以下之事情變得很淸楚。 例如,如前述般,在將虛擬晶圓當成起始虛擬晶圓而 硏磨之情形’需要各別設定虛擬晶圓之處理條件(程式) 和產品晶圓之處理條件(程式),本來,在往只指示、控 制產品的處理條件之自動化邁進上,虛擬晶圓的處理成爲 瓶頸。 在CMP (化學機械硏磨)工程中,爲了可無人化運 轉,進而必須廢止先於產品處理之作業。其對策有記載於 (4) 200425320 專利文獻1之方法。專利文獻1所記載之方法係 CMP前後的製程,利用主電腦而高精度地進行裝置 造。但是,在批量數更少之多種少量的生產線中,膜 量裝置有位於與硏磨裝置不同場所之情形,其之搬運 變得複雜。另外,加工結果藉由測量知道爲止,須 間’控制上產生延遲,控制精度降低,在硏磨性能時 刻變化的CMP工程中,處理的響應性並不充分。 另外,專利文獻2所記載之方法係前饋CMP後 厚’以使用於特別是蝕刻工程的控制,但是,並無 CMP之回饋,或者對於CMP後之CVD工程之回饋。 因此,本發明之目的在於提供:於CMP工程等 作業比率高的半導體製造工程中,推進自動化,可謀 人化合理化、處理能力提升、投資金額壓縮、間接業 率提升之半導體裝置之製造方法、半導體裝置的自動 轉方法及自動運轉系統、及CMP裝置的自動運轉方g 本發明之前述以及其他目的和新的特徵,由本說 之記載以及所附圖面,理應會變得淸楚。 [解決課題之手段] 如簡單說明在本申請案所揭示之發明中的代表性 槪要,則如下述: 即依據本發明之半導體裝置之製造方法、半導體 裝置的自動運轉方法及自動運轉系統、及CMP裝置 動運轉方法係在CMP處理中,只將產品晶圓的處理 配合 的製 厚測 控制 花時 時刻 的膜 對於 人工 求少 務效 化運 〇 明書 者的 製造 的自 程式 (5) 200425320 (處理條件)由主電腦下載於CMP裝置,在處理產 圓前,以事先決定的處理條件進行虛擬晶圓的處理 此,以實現無人化運轉。 另外,藉由將搭載於無人化運轉之CMP裝置的 測量裝置的測量資料與硏磨時間等處理資料一同由 裝置傳送給主電腦,令依據最新的資料以變更CMP 的程式之條件成爲可能,藉由前述膜厚測量資料以前 地活用於下一工程的處理條件,省略下一工程之測 程。 另外,依據本發明之半導體製造裝置的自動運轉 係可由潔淨室外的終端藉由網路以變更位於主電腦內 一產品的處理程式之參數的系統。 具體如下= (1) 依據本發明之半導體裝置之製造方法,其 爲具有:由主電腦對於半導體製造裝置傳送產品晶圓 理條件之步驟,和依循事先決定的處理條件,在前述 體製造裝置中自動地處理虛擬晶圓之步驟,和依循前 傳送之產品晶圓之處理條件,在前述半導體製造裝置 理前述產品晶圓之步驟。 (2) 前述(1)之半導體裝置之製造方法,進 有:在前述產品晶圓之處理中途或結束時,藉由搭載 述半導體製造裝置之膜厚測量裝置以測量形成在前述 晶圓上之膜的膜厚之步驟,和將前述測量之膜厚資料 述半導體製造裝置的處理資料傳送給前述主電腦之步 品晶 ,藉 膜厚 CMP 裝置 饋式 量工 系統 之每 特徵 之處 半導 述所 中處 而具 在則 產品 及前 驟, -9- (6) 200425320 和依據前述所傳送之膜厚資料及處理資料,於前述主電腦 決定在前述半導體製造裝置中,之後所處理之產品晶圓的 處理條件之步驟。200425320 (1) Description of the invention [Technical field to which the invention belongs] The present invention relates to a method for manufacturing a semiconductor device, an automatic operation method and an automatic operation system for a semiconductor manufacturing device, and a CMP (Chemical Mechanical Polishing) device Automatic operation method, especially the technology related to APC (Advanced Process Control) technology, which is effectively applicable to the manufacturing process of a variety of small-scale production of semiconductor devices. [Prior technology] Among the technologies reviewed by the present inventors, for example, in a CMP device of a semiconductor manufacturing apparatus, since the honing rate is unstable at the initial stage of honing, the virtual wafer is considered as the initial virtual wafer for the initial stage. After honing, the honing rate is stable before honing the product wafers in order to stabilize the processing and improve the accuracy. However, in most cases, the processing conditions (programs) of virtual wafers and the processing conditions (programs) of product wafers need to be set individually. Originally, in the process of automating only the instruction and control of product processing conditions, virtual Wafer processing becomes a bottleneck. In the automatic operation method of the CMP device of the semiconductor manufacturing apparatus, the difference between the film thickness data before honing and the film thickness data after honing, and the actual honing time are used to calculate the latest honing rate. A method in which a host computer sets process program information as an optimal program to a CMP device (for example, refer to Patent Document 1). (2) (2) 2 | 00425320 In addition, there is a method of determining the film thickness after CMP by a feedforward method to perform subsequent etching treatment (for example, refer to Patent Document 2). In addition, there is a method of irradiating a honed wafer with visible light, measuring the film thickness of the wafer with an optical sensor, and sending the measurement result back to the control unit to set a honing time for the next wafer ( For example, refer to Patent Document 3) In addition, there is a method of measuring a change in the thickness of a honing film by irradiating a wafer with an infrared laser beam during honing and measuring the Doppler shift of the reflected light (for example, See Patent Document 4). In addition, “there is a method for measuring the film thickness of a wafer with high accuracy by defining the reflected light intensity and frequency spectrum of the wafer to define a relatively flat area that is not affected by the device pattern in CMP” (for example, refer to Patent Documents) 5). In addition, “there is a difference between the film thickness data before honing and the film thickness data after honing, and the actual honing time to calculate the latest honing rate,” which is stored as a variable parameter and fixed with the program. The part and the program change part are regarded as the optimal program to be set in the CMP apparatus (for example, 'refer to Patent Document 6). In addition, there is a CMP device for processing a leading wafer, measuring its film thickness, and setting the honing time of the main wafer for processing according to the measurement results, and measuring and calculating the residual film thickness to determine the crystals that need to be honed again. Round method (for example, refer to Patent Document 7). [Patent Document 1] ** 6-(3) (3) 200425320 Japanese Patent Laid-Open No. 1 1-1 862 04 [Patent Document 2] Japanese Patent Laid-Open No. 2002- 1 5 1 465 [Patent Document 3] Japanese Patent Laid-Open No. 08-1 7768 [Patent Document 4] Japanese Patent Laid-Open No. 2000-3 5 3 1 6 [Patent Document 5] Japanese Patent Laid-Open No. 2003 -4272 [Patent Document 6] Japanese Patent Japanese Patent Laid-Open No. 1 1-1 8 62 04 [Patent Document 7] Japanese Patent Laid-Open No. 2000- 1 5 5 74 [Summary of the Invention] However, in the automation technology of the CMP device as described above, the present inventors reviewed As a result, the following things became very clear. For example, as described above, when a virtual wafer is honed as a starting virtual wafer, 'the processing conditions (programs) of the virtual wafers and the processing conditions (programs) of the product wafers need to be set separately. Moving towards automation that only indicates and controls the processing conditions of products, the processing of virtual wafers becomes a bottleneck. In the CMP (Chemical Mechanical Honing) process, in order to be unmanned, it is necessary to abolish the operation prior to product processing. The countermeasure is described in (4) 200425320 Patent Document 1. The method described in Patent Document 1 is a process before and after CMP, and a host computer is used to manufacture the device with high accuracy. However, in a variety of small-volume production lines with a smaller number of batches, the film-quantity device may be located at a different place from the honing device, and the handling thereof becomes complicated. In addition, until the processing result is known by measurement, a delay occurs in the control of the time ', the control accuracy decreases, and the responsiveness of processing is not sufficient in the CMP process where the honing performance changes from moment to moment. In addition, the method described in Patent Document 2 is used to feed forward the thickness after CMP to control the etching process, but there is no feedback from CMP or feedback from CVD after CMP. Therefore, an object of the present invention is to provide a semiconductor device manufacturing method that promotes automation in semiconductor manufacturing projects with high operation ratios such as CMP engineering, can be rationalized, processing capacity can be improved, investment amount can be reduced, and indirect yield can be improved. The automatic operation method and the automatic operation system of the semiconductor device, and the automatic operation method of the CMP device. The foregoing and other objects and new features of the present invention should become clear from the description and the attached drawings. [Means for Solving the Problem] If the representative outline of the invention disclosed in the present application is briefly described, it is as follows: That is, a method for manufacturing a semiconductor device according to the present invention, a method for automatically operating a semiconductor device, and an automatic operation system, And the CMP device operation method is based on the CMP process, which only measures the thickness of the product wafer processing and controls the time-consuming film. It is a manual program for manual operation to reduce the work efficiency. (5) 200425320 (processing conditions) are downloaded from the host computer to the CMP device, and the virtual wafer is processed under the predetermined processing conditions before processing the production circle to realize unmanned operation. In addition, the measurement data of the measurement device mounted on the unmanned operation CMP device and the processing data such as honing time are transmitted from the device to the host computer, which makes it possible to change the conditions of the CMP program based on the latest data. The aforementioned film thickness measurement data was previously used in the processing conditions of the next process, and the measurement range of the next process was omitted. In addition, the automatic operation of the semiconductor manufacturing apparatus according to the present invention is a system that can change the parameters of a processing program of a product located in a host computer through a network from a clean outdoor terminal. The details are as follows: (1) The method for manufacturing a semiconductor device according to the present invention includes the steps of transferring the wafer wafer processing conditions from the host computer to the semiconductor manufacturing device, and following the processing conditions determined in advance, in the aforementioned body manufacturing device. The steps of automatically processing the virtual wafers and the processing conditions of the product wafers transferred in advance, and the steps of processing the aforementioned product wafers in the aforementioned semiconductor manufacturing apparatus. (2) The method for manufacturing a semiconductor device according to the above (1), further comprising: measuring the film formed on the wafer by a film thickness measuring device mounted on the semiconductor manufacturing device during or at the end of the processing of the wafer of the product. The steps of the film thickness of the film, and the processing data of the semiconductor manufacturing device described above to transmit the measured film thickness data to the stepping crystal of the host computer, and a semi-introduction to each feature of the film thickness CMP device feed-type measuring system Where there is a current product and the previous step, -9- (6) 200425320 and the film thickness data and processing data transmitted in accordance with the foregoing, the aforementioned host computer decides to use the aforementioned semiconductor manufacturing equipment, and the product processed thereafter Steps for processing conditions in circles.

(3) 前述(1)之半導體裝置之製造方法,進而具 有:在則述產品晶圓之處理中途或結束時,藉由搭載在前 述半導體製造裝置之膜厚測量裝置以測量形成在前述產品 晶圓上之膜的膜厚之步驟,和將前述測量之膜厚資料傳送 給前述主電腦之步驟,和依據前述所傳送之膜厚資料,於 前述主電腦決定前述產品晶圓之下一工程的處理條件之步 驟。 (4) 前述(2)之半導體裝置之製造方法,進而具 有:依據前述所傳送之膜厚資料,在前述主電腦中決定前 述產品晶圓之下一工程的處理條件之步驟。(3) The method for manufacturing a semiconductor device according to the above (1), further comprising: measuring a crystal formed on the product by a film thickness measuring device mounted on the semiconductor manufacturing device during or at the end of the processing of the product wafer. The step of the film thickness of the film on the circle, the step of transmitting the measured film thickness data to the host computer, and the step of determining the project under the product wafer on the host computer based on the transmitted film thickness data. Steps to deal with conditions. (4) The method for manufacturing a semiconductor device according to the above (2), further comprising: determining a processing condition of a process under the aforementioned product wafer in the aforementioned host computer based on the film thickness data transmitted as described above.

(5 )依據本發明之半導體製造裝置的自動運轉方 法,其特徵爲具有:將產品晶圓之處理條件由主電腦傳送 給半導體製造裝置之步驟,和依循事先所決定的處理條 件,在前述半導體製造裝置中,自動地處理虛擬晶圓之步 驟,和依循前述所傳送之產品晶圓的處理條件,在前述半 導體製造裝置中處理前述產品晶圓之步驟。 (6)前述(5)之半導體製造裝置的自動運轉方法, 進而具有:在前述產品晶圓之處理中途或結束時,藉由搭 載在前述半導體製造裝置之膜厚測量裝置以測量形成在前 述產品晶圓上之膜的膜厚之步驟,和將前述測量之膜厚資 料及前述半導體製造裝置的處理資料傳送給前述主電腦之 -10- (7) (7)200425320 步驟’和依據則述所傳送之膜厚資料及處理資料,於前述 主電腦決定在前述半導體製造裝置中,之後所處理之產品 晶圓的處理條件之步驟。 (7 )前述(5 )之半導體製造裝置的自動運轉方法, 進而具有:在前述產品晶圓之處理中途或結束時,藉由搭 載在前述半導體製造裝置之膜厚測量裝置以測量形成在前 述產品晶圓上之膜的膜厚之步驟,和將前述測量之膜厚資 料傳送給前述主電腦之步驟,和依據前述所傳送之膜厚資 料,於前述主電腦決定前述產品晶圓之下一工程的處理條 件之步驟。 (8)前述(6)之半導體製造裝置的自動運轉方法, 進而具有:依據前述所傳送之膜厚資料,在前述主電腦中 決定前述產品晶圓之下一工程的處理條件之步驟。 (9 )依據本發明之CMP裝置的自動運轉方法,其特 徵爲具有:將產品晶圓之處理條件由主電腦傳送給CMP 裝置之步驟,和依循事先所決定的處理條件,在前述 C Μ P裝置中,自動地處理虛擬晶圓之步驟,和依循前述 所傳送之產品晶圓的處理條件,在前述CMP裝置中處理 目IJ述產品晶圓之步驟。 (10)前述(9)之CMP裝置的自動運轉方法,進而 具有:在前述產品晶圓之處理中途或結束時,藉由搭載在 前述CMP裝置之膜厚測量裝置以測量形成在前述產品晶 圓上之膜的膜厚之步驟,和將前述測量之膜厚資料及前述 CMP裝置的處理資料傳送給前述主電腦之步驟,和依據 -11 - (8) 200425320 前述所傳送之膜厚資料及處理資料,於前述主電腦決 前述CMP裝置中,之後所處理之產品晶圓的硏磨時 步驟。 (1 1 )前述(9 )之CMP裝置的自動運轉方法, 具有:在前述產品晶圓之處理中途或結束時,藉由搭 則述C Μ P裝置之膜厚測量裝置以測量形成在前述產 圓上之膜的膜厚之步驟’和將前述測量之膜厚資料傳 前述主電腦之步驟,和依據前述所傳送之膜厚資料, 述主電腦決定前述產品晶圓之下一工程的處理條件 驟。 ()前述(10 )之CMP裝置的自動運轉方法 而具有:依據前述所傳送之膜厚資料,在前述主電腦 定前述產品晶圓之下一工程的處理條件之步驟。 (1 3 )依據本發明之半導體製造裝置的自動運 統,其特徵爲:具有保有產品晶圓之處理條件之主電 和控制半導體製造裝置之裝置控制部,前述裝置控制 在由則述主電腦¥彳則述半導體製造裝置傳送則述產品 之處理條件時,依循事先決定之處理條件,在前述半 製造裝置中自動地處理虛擬晶圓(將被硏磨膜之薄膜 當成前處理所施行之虛擬晶圓),依循前述所傳送之 晶圓的處理條件,在前述半導體製造裝置中處理前述 晶圓。 (14)前述(13)之半導體製造裝置的自動運 統,其中,前述裝置控制部係在前述產品晶圓之處理 定在 間之 進而 載在 品晶 送給 於前 之步 ,進 中決 轉系 腦, 部係 晶圓 導體 形成 產品 產品 轉系 中途 -12- 200425320 Ο) 或結束時,藉由搭載在前述半導體製造裝置之膜厚測量裝 置,以測量形成在前述產品晶圓上之膜的膜厚,將前述測 量之膜厚資料及前述半導體裝置之處理資料傳送給前述主 電腦,前述主電腦依據前述所傳送之膜厚資料及處理資 料,決定在前述半導體製造裝置中,在之後所處理之產品 晶圓的處理條件。 (15) 前述(13)之半導體製造裝置的自動運轉系 統,前述裝置控制部係在前述產品晶圓之處理中途或結束 時,藉由搭載在前述半導體製造裝置之膜厚測量裝置,以 測量形成在前述產品晶圓上之膜的膜厚,將前述測量之膜 厚資料傳送給前述主電腦,前述主電腦依據前述所傳送之 膜厚資料,決定前述產品晶圓之下一工程的處理條件。 (16) 前述(13)〜(15)之半導體製造裝置的自動 運轉系統,前述主電腦和前述裝置控制部係藉由網路而連 接,可由連接於前述網路而位於潔淨室外之終端變更前述 主電腦內之前述產品晶圓的處理條件。 因此,如依據前述之半導體裝置之製造方法、半導體 製造裝置的自動運轉方法及自動運轉系統、及CMP裝置 的自動運轉方法,作業人員之等待時間減少,可少人化合 理化,提升處理能力,投資金額得以壓縮,間接業務效率 提升,配線層間膜厚的精度提升,產品之產品率也得以提 升。 【實施方式】 -13- (10) 200425320 以下,依據圖面詳細說明本發明之實施形態。 在說明實施形態之全部圖中,對於同一構件賦予 號’省略其之重複說明。 第1圖係顯示在本發明之一實施形態中,半導 裝置的自動運轉系統的構造及自動運轉方法之說明 2圖係顯示在本實施形態中,c Μ P裝置的處理流 圖’第3 ( a )圖係顯示在本實施形態中的s ΤΙ構 面圖’第3 ( b )圖係顯示在本實施形態中的S TI 程說明圖,第4 ( a )圖係顯示在本實施形態中的 造之剖面圖,第4 ( b )圖係顯示在本實施形態中 的處理流程說明圖,第5 ( a )圖係顯示在本實施 的IMD構造之剖面圖,第5 ( b )圖係顯示在本實 中的IMD的處理流程說明圖,第6圖係顯示在本 恶中’ ·φ導體裝置之製造方法的—*例之流程圖。 首先,依據第1圖,說明本實施形態之半導體 置的自動運轉系統的構造及自動運轉方法的一例。 形態之半導體製造裝置,例如設爲CMP裝置1 1, 制CMP裝置丨丨之裝置控制部1 2、由虛擬晶圓用±! 產品晶圓用嗥1 4所成之載入埠、進行晶圓的硏磨 部1 5、進行晶圓的淸洗之淸洗部1 6、測量形成在 之膜的膜厚之膜厚測量裝置1 7等所構成,設置在 內。CMP裝置11係藉由潔淨室內的網路18而與 1 9連接。 主電腦1 9係管理半導體製造工程,保有產品 另外, 相同符 體製造 圖,第 程說明 造之剖 處理流 ILD構 的 ILD 形態中 施形態 實施形 製造裝 本實施 由:控 ^ 13及 之硏磨 晶圓上 潔淨室 主電腦 晶圓之 -14 - (11) (11)200425320 產品晶圓的處理程式24、各產品·工程之爹數25寺資 訊。在主電腦19中,由各產品·工程之參數25等可計算 CMP裝置1 1的產品晶圓之硏磨時間PT(I)。所計算的硏 磨時間P T (I)則被取入產品晶圓之處理程式2 4。而且,藉 由從主電腦19將產品晶圓之處理程式24下載於CMP裝 置11,CMP裝置11可自動運轉。 在潔淨室內的網路1 8連接有終端2 0等’在潔淨室外 的網路2 1連接有終端22、23等,潔淨室內的網路1 8和 潔淨室外的網路21係相互連接。而且,可由終端2 0、 22、23等對保存在主電腦19或CMP裝置1 1之資料進行 閱覽或編輯。 CMP裝置1 1的虛擬晶圓之CMP處理係如第1圖之箭 頭所示般,具有:首先,虛擬晶圓由虛擬晶圓用璋1 3被 移送於硏磨部1 5,在硏磨部1 5中,虛擬晶圓經過硏磨 後,被移往淸洗部1 6,在淸洗部1 6中,虛擬晶圓受到淸 洗後,被儲存於虛擬晶圓用埠1 3之各步驟。作爲前處 理,對此處所使用之虛擬晶圓施以被硏磨膜之薄膜形成工 程,更提高作爲起始虛擬晶圓之功能。例如,在產品晶圓 中硏磨金屬膜之情形下,當成前處理施以相同金屬膜或氧 化膜(Si02膜等)形成工程,另外,在產品硏磨絕緣膜之 情形下,當成前處理同樣地施以氧化膜(Si 02膜等)形成 工程。接著,產品晶圓之CMP處理係具有:由產品晶圓 用璋1 4對於硏磨部1 5移送產品晶圓,在硏磨部1 5中將 產品晶圓做完硏磨後,移送於淸洗部1 6,在淸洗部1 6中 -15- (12) (12)200425320 將產品晶圓淸洗後,移送於膜厚測量裝置1 7,在膜厚測 量裝置1 7中,測量形成在產品晶圓上之膜的膜厚後,儲 存於產品晶圓用埠1 4之各步驟。膜厚之測量資料和c MP 裝置的處理資料係當成結束貪料2 6,由C Μ P裝置1 1被 送往主電腦1 9。 接著,依據第2圖〜第6圖,說明在本實施形態中包 含前述之CMP處理工程的半導體裝置之製造方法及半導 體製造裝置的自動運轉方法之一例。本實施形態之半導體 裝置之製造方法及半導體製造裝置的自動運轉方法,在 C Μ Ρ處理工程中,係具有以下各步驟。 如第2圖所示般,CMP裝置1 1事先保有虛擬晶圓的 處理程式(處理條件)2 7,在產品晶圓之處理程式24由 主電腦19被下載於CMP裝置1 1時,依循事先決定的處 理條件,自動地處理虛擬晶圓2 8。非產品之晶圓被當成 開始虛擬晶圓或起始虛擬晶圓在由硏磨部1 5及淸洗部1 6 所形成的晶圓處理部29中,進行CMP處理。在CMP處 理後,虛擬晶圓2 8被儲存在晶圓儲存部3 〇。在產品晶圓 之處理程式24由主電腦19被下載於CMP裝置1 1時,藉 由自動地處理虛擬晶圓2 8,半導體製造工程的自動化變 得容易。 虛擬晶圓2 8係佔有載入埠中的1個,或儲存在c Μ Ρ 裝置1 1內保有虛擬晶圓2 8用的緩衝槽。C Μ Ρ裝置1 1內 的裝置控制部1 2雖處理由虛擬晶圓之處理程式2 7所決定 的片數,但是’進行應均等使用所儲存之虛擬晶圓2 8而 -16- (13) (13)200425320 令依序處理虛擬晶圓28之棚架管理。另外,CMP裝置1 1 內的裝置控制部1 2管理虛擬晶圓2 8的使用次數或累積使 用量,在到達特定的使用量(時間、次數等)時,產生警 示。超過使用量之虛擬晶圓在被儲存於移載體時,對主電 腦1 9送出卸載之要求,超過使用量之虛擬晶圓自動地被 卸載。 虛擬晶圓2 8之處理後,依循自主電腦1 9所下載之產 品晶圓之處理程式24,產品晶圓3 1在晶圓處理部2 9中 進行CMP處理。 藉由搭載於CMP裝置1 1的膜厚測量裝置1 7,在產 品晶圓3 1之硏磨、淸洗的中途或結束時,至少1次測量 形成在產品晶圓3 1上之膜的膜厚,膜厚的測量雖也可在 硏磨前爲之,但是,在前工程中已經測量膜厚之情形,可 由該硏磨前之膜厚和硏磨厚的膜厚計算硏磨率故,並不特 別需要硏磨前的膜厚測量。 之後,產品晶圓31的CMP處理結束後,由CMP裝 置1 1將由硏磨頭及硏磨墊的使用時間、硏磨時間、硏磨 壓力、旋轉數、漿料量等處理資料和膜厚測量資料所成之 結束資料2 6傳送給主電腦1 9。 然後,依據由CMP裝置11所傳送之膜厚測量資料及 處理資料和產品晶圓之各硏磨層的參數,在主電腦1 9中 決定接著處理之產品晶圓的硏磨時間等處理條件。 如以上般,藉由即時更新處理條件的最新資訊,即時 之回饋成爲可能。作爲將最新資訊回饋給接著處理之批次 -17- (14) 200425320 的方法,例如藉由下述式子來決定硏磨時間ptg) ° 硏磨時間P T (I) = f(硏磨前膜厚(I )、硏磨前 (1-1 )、硏磨後膜厚(1-1 )、硏磨後膜厚(1-1 )、 墊使用時間、各產品·工程之參數) 另外,硏磨率RR可藉由下述式子來計算。 硏磨率RR(I-1) = (硏磨前膜厚(1-1)-硏磨後膜眉 1 ) )/硏磨後膜厚(1-1 )(5) The automatic operation method of the semiconductor manufacturing apparatus according to the present invention is characterized by the steps of: transferring the processing conditions of the product wafer from the host computer to the semiconductor manufacturing apparatus; and in accordance with the processing conditions determined in advance, In the manufacturing device, the step of automatically processing the virtual wafer and the step of processing the product wafer in the semiconductor manufacturing device in accordance with the processing conditions of the product wafer transferred as described above. (6) The automatic operation method of the semiconductor manufacturing apparatus of the above (5), further comprising: measuring the film formed on the product by a film thickness measuring device mounted on the semiconductor manufacturing apparatus during or at the end of processing of the product wafer. The steps of the film thickness of the film on the wafer and the transmission of the film thickness data and the processing data of the semiconductor manufacturing device to the host computer are described in the -10- (7) (7) 200425320 step 'and the basis The transmitted film thickness data and processing data are the steps for the host computer to determine the processing conditions of the product wafers to be processed in the semiconductor manufacturing device. (7) The automatic operation method of the semiconductor manufacturing apparatus according to the above (5), further comprising: measuring the film formed on the product by a film thickness measuring device mounted on the semiconductor manufacturing apparatus during or at the end of processing of the product wafer. The step of film thickness of the film on the wafer, and the step of transmitting the measured film thickness data to the host computer, and based on the transmitted film thickness data, the host computer determines a project below the product wafer Of processing conditions. (8) The automatic operation method of the semiconductor manufacturing apparatus of the above (6), further comprising: determining a processing condition of a next process of the product wafer in the host computer according to the film thickness data transmitted as described above. (9) The automatic operation method of the CMP device according to the present invention is characterized in that it has the steps of transmitting the processing conditions of the product wafer from the host computer to the CMP device, and according to the processing conditions determined in advance, in the aforementioned CMP In the device, the step of automatically processing the virtual wafer and the step of processing the product wafer described in the above-mentioned CMP device according to the processing conditions of the product wafer transferred as described above. (10) The automatic operation method of the CMP device according to the above (9), further comprising: measuring the film formed on the product wafer by a film thickness measuring device mounted on the CMP device during or at the end of the processing of the product wafer. The film thickness step of the above film, and the step of transmitting the measured film thickness data and the processing data of the CMP device to the host computer, and according to -11-(8) 200425320 the previously transmitted film thickness data and processing Data, in the aforementioned host computer and the aforementioned CMP device, the honing steps of the processed product wafer thereafter. (1 1) The automatic operation method of the CMP device of the above (9) includes: during the processing of the wafer of the aforementioned product or at the end, a film thickness measuring device of the CP device is used to measure the formation of the wafer in the aforementioned product. The step of the film thickness of the film on the circle, and the step of transmitting the measured film thickness data to the host computer, and based on the transmitted film thickness data, the host computer determines the processing conditions for the next project of the product wafer. Step. () The automatic operation method of the CMP device of the above (10) has the step of determining the processing conditions of a process under the product wafer on the host computer according to the film thickness data transmitted as described above. (1 3) The automatic operation system of a semiconductor manufacturing apparatus according to the present invention is characterized in that it has a main unit that maintains processing conditions for product wafers and a device control unit that controls the semiconductor manufacturing apparatus. The aforementioned device is controlled by the host computer. ¥ When the semiconductor manufacturing equipment transfers the processing conditions of the products, the virtual wafers are automatically processed in the aforementioned semi-manufacturing equipment according to the processing conditions determined in advance (the thinned film is treated as a virtual one implemented by the pre-processing). Wafer), the wafer is processed in the semiconductor manufacturing apparatus according to the processing conditions of the transferred wafer. (14) The automatic operation system of the semiconductor manufacturing apparatus of the above (13), wherein the aforementioned device control section sets the processing time of the aforementioned product wafer and then loads the product crystal to the previous step, and then makes a decision. At the end of the process, the product is transferred to the middle of the wafer conductor forming product (-12-200425320 0) or at the end, the film thickness measurement device mounted on the semiconductor manufacturing device is used to measure the film thickness of the film formed on the product wafer. For the film thickness, the measured film thickness data and the processing data of the semiconductor device are transmitted to the host computer, and the host computer decides on the semiconductor manufacturing device for subsequent processing based on the transmitted film thickness data and processing data. Product wafer processing conditions. (15) The automatic operation system of the semiconductor manufacturing apparatus of the above (13), wherein the device control section measures the formation of the film thickness measuring device mounted on the semiconductor manufacturing apparatus during or at the end of the processing of the product wafer. The film thickness of the film on the product wafer is transmitted to the host computer, and the host computer determines the processing conditions for the next project of the product wafer based on the transmitted film thickness data. (16) In the automatic operation system of the semiconductor manufacturing device of (13) to (15), the host computer and the device control unit are connected through a network, and the terminal can be changed by a terminal connected to the network and located in a clean room. The processing conditions of the aforementioned product wafers in the host computer. Therefore, according to the aforementioned method for manufacturing a semiconductor device, an automatic operation method and an automatic operation system for a semiconductor manufacturing device, and an automatic operation method for a CMP device, the operator's waiting time can be reduced, which can be streamlined and rationalized, processing capacity can be improved, and investment can be increased. The amount is reduced, the efficiency of indirect business is improved, the accuracy of the film thickness between wiring layers is improved, and the product yield of the product is also improved. [Embodiment] -13- (10) 200425320 Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. In all the drawings for explaining the embodiment, the same member is given the number ', and its repeated description is omitted. FIG. 1 is a diagram showing a structure and an automatic operation method of an automatic operation system of a semiconducting device in an embodiment of the present invention. FIG. 2 is a process flow diagram of a c MP device in this embodiment. (a) The figure is the sTI plane view shown in this embodiment. The third figure (b) is the STI process explanatory diagram shown in this embodiment. The fourth (a) figure is shown in this embodiment. Figure 4 (b) is a cross-sectional view of the processing structure in this embodiment, and Figure 5 (a) is a cross-sectional view of the IMD structure shown in this embodiment. Figure 5 (b) It is an explanatory diagram of the processing flow of the IMD shown in the present example, and FIG. 6 is a flowchart showing an example of the manufacturing method of the φ conductor device in the present example. First, an example of a structure and an automatic operation method of the automatic operation system of the semiconductor device according to this embodiment will be described with reference to FIG. For example, the semiconductor manufacturing device is set as a CMP device 1 1 and a device control unit 1 for manufacturing a CMP device. 2. A loading port formed by a dummy wafer for a wafer! The honing unit 15 includes a honing unit 16 for performing wafer honing, and a film thickness measuring device 17 for measuring a film thickness of the formed film. The CMP device 11 is connected to 19 through a network 18 in the clean room. The host computer 19 manages the semiconductor manufacturing process and maintains the product. In addition, the same symbol manufacturing drawing, the process description of the ILD structure of the ILD structure of the manufacturing process, and the implementation of the manufacturing form are implemented by: Control ^ 13 和 之 硏-14-(11) (11) 200425320 Product wafer processing program for wafers on polished wafers. 24. Information on the number of fathers of each product and project. In the host computer 19, the honing time PT (I) of the product wafer of the CMP apparatus 11 can be calculated from the parameters 25 of each product and process. The calculated honing time P T (I) is taken into the processing program of the product wafer 2 4. Further, by downloading the processing program 24 for the product wafer from the host computer 19 to the CMP device 11, the CMP device 11 can automatically operate. Terminals 20 and the like are connected to the network 18 in the clean room. Terminals 22 and 23 are connected to the network 2 1 in the clean room. The networks 18 and 21 in the clean room are connected to each other. Furthermore, the data stored in the host computer 19 or the CMP device 11 can be viewed or edited by the terminals 20, 22, and 23. The CMP processing of the virtual wafer of the CMP device 11 is as shown by the arrow in FIG. 1. The virtual wafer has the following steps: First, the virtual wafer is transferred from the virtual wafer honing 13 to the honing unit 15, and in the honing unit In 15, after the virtual wafer is honed, it is moved to the cleaning unit 16. In the cleaning unit 16, after the virtual wafer is cleaned, it is stored in the virtual wafer port 13. . As a pre-processing, a thin film formation process of a honing film is applied to the virtual wafer used here, so as to further improve the function as the initial virtual wafer. For example, in the case of honing a metal film in a product wafer, the same metal film or oxide film (Si02 film, etc.) is used as a pre-treatment to form a pre-treatment process. In addition, in the case of honing an insulating film, the same pre-treatment is used as a pre-treatment. An oxide film (Si 02 film, etc.) is formed on the ground. Next, the CMP processing of the product wafer includes: transferring the product wafer from the honing unit 14 to the honing unit 15; after honing the product wafer in the honing unit 15, the product wafer is transferred to the honing unit 15; Washing section 16 and rinsing section 16 -15- (12) (12) 200425320 After cleaning the product wafer, it is transferred to the film thickness measuring device 17 and measured in the film thickness measuring device 17 After the film thickness of the film on the product wafer is stored in each step of the product wafer port 14. The measurement data of the film thickness and the processing data of the c MP device are regarded as the end material 2 6, and the C MP device 11 is sent to the host computer 19. Next, an example of a method of manufacturing a semiconductor device including the aforementioned CMP processing process and an automatic operation method of a semiconductor manufacturing device in this embodiment will be described with reference to Figs. 2 to 6. The method for manufacturing a semiconductor device and the method for automatically operating a semiconductor manufacturing device according to this embodiment include the following steps in a CMP process. As shown in FIG. 2, the CMP device 11 1 has a processing program (processing conditions) 2 7 for the virtual wafer in advance. When the processing program 24 for the product wafer is downloaded from the host computer 19 to the CMP device 11, The determined processing conditions automatically process the virtual wafer 2 8. Non-product wafers are treated as a start dummy wafer or a start dummy wafer, and are subjected to CMP processing in a wafer processing section 29 formed by a honing section 15 and a honing section 16. After the CMP process, the dummy wafer 28 is stored in the wafer storage unit 30. When the processing program 24 for the product wafer is downloaded from the host computer 19 to the CMP device 11, by automatically processing the virtual wafer 28, the automation of the semiconductor manufacturing process becomes easy. The virtual wafer 28 takes up one of the loading ports, or is stored in the cMP device 11 and holds a buffer slot for the virtual wafer 28. Although the device control unit 12 in the C MP device 1 1 processes the number of pieces determined by the processing program 2 7 of the virtual wafer, 'the stored virtual wafer 2 should be used evenly and the -16- (13 ) (13) 200425320 Order to deal with the scaffold management of the virtual wafer 28 in order. In addition, the device control unit 12 in the CMP device 1 1 manages the number of times of use of the virtual wafer 28 or the cumulative usage amount, and generates a warning when a specific amount of use (time, number of times, etc.) is reached. When the virtual wafer exceeding the used amount is stored on the transfer carrier, the host computer 19 is required to send and unload, and the virtual wafer exceeding the used amount is automatically unloaded. After the processing of the virtual wafer 28, the processing procedure 24 of the product wafer downloaded by the autonomous computer 19 is followed, and the product wafer 31 is subjected to CMP processing in the wafer processing section 29. The film thickness measuring device 17 mounted on the CMP device 11 measures the film formed on the product wafer 31 at least once during the honing and finishing of the product wafer 31. The thickness and film thickness can be measured before honing, but if the film thickness has been measured in the previous process, the honing rate can be calculated from the film thickness before honing and the film thickness before honing. There is no particular need for film thickness measurement before honing. After the CMP process of the product wafer 31 is completed, the CMP apparatus 11 will measure the processing data and film thickness of the honing head and the honing pad using time, honing time, honing pressure, number of rotations, and slurry amount. The completed data 2 6 is transmitted to the host computer 19. Then, according to the film thickness measurement data and processing data transmitted by the CMP device 11, and the parameters of each honing layer of the product wafer, the host computer 19 determines processing conditions such as honing time of the product wafer to be processed next. As mentioned above, real-time feedback is possible by updating the latest information on processing conditions in real time. As a method of feeding back the latest information to the batch to be processed -17- (14) 200425320, for example, the honing time ptg is determined by the following formula: ° Honing time PT (I) = f (the film before honing Thickness (I), before honing (1-1), film thickness after honing (1-1), film thickness after honing (1-1), pad use time, parameters of each product and process) In addition, 硏The grinding rate RR can be calculated by the following formula. Honing rate RR (I-1) = (film thickness before honing (1-1)-film eyebrow after honing 1)) / film thickness after honing (1-1)

另外,在前述式子中,I係表示處理號碼之自然I 硏磨時間 PT(I)係就每一硏磨頭所計算,被下 CMP裝置1 1。在計算之際,硏磨前膜厚(I )係使用 前的絕緣膜 CVD(Chemical Vapor Deposition:化學 沈積)工程等之膜厚測量資料。即使在前工程之CVD 等中,雖期望以搭載在CVD裝置之膜厚測量裝置就 晶圓所測量的膜厚資料,但是,也可爲批次內之1片 的晶圓的測量値。 另外,還由CMP裝置11所傳送之膜厚資料,主 1 9前饋式的決定產品晶圓3 1之下一工程(触刻、 等)的處理條件。藉此,可省略作爲下一工程的前處 膜厚測量工程。 例如,在進行如第3 ( a )圖所示之元件分 STI(Shallow Trench Isolation:淺溝槽絕緣)工程中, 基板40之上圖案形成氮化膜35,塡埋氧化膜36, C Μ P硏磨後,進行氮化膜3 5之蝕刻的情形,在c Μ P 1 1所測量之C Μ Ρ硏磨後的膜厚測量資料3 2可前饋 膜厚 硏磨 載於 硏磨 氣相 工程 每一 以上 電腦 C VD 理之 離之 於石夕 進行 裝置 式的 -18- (15) (15)200425320 使用在決定下一蝕刻工程之處理程式(處理條件(第3 (b )圖)。在此情形,在CMP工程和蝕刻工程之間’不 含被追加的膜厚測量工程故,自動化可容易實現。另外’ 測量全部晶圓故,比起每一片地決定處理條件,可做高精 度的控制。 另外,例如在與如第4(a)圖所示之MOS(Metal Oxide Semiconductor :金屬氧化半導體)形成後之第1金屬配線 間的層間膜 ILD(Interlebel Dieletcric:層間介電質)的平 坦化工程中,在矽基板4 1之上形成氧化膜4 3、多晶矽 42、源極.汲極46、氧化膜37,進行01^硏磨後,藉由 CVD護罩以形成氧化膜45之情形,由CMP裝置1 1所傳 送之CMP硏磨後的膜厚測量資料33係前饋式的被使用在 決定下一絕緣膜CVD護罩工程的處理條件上(第 4(b) 圖)。在CMP工程和絕緣膜CVD護罩工程之間不含膜厚 測量工程故,自動化可容易實現。另外,測量全部晶圓 故,比起每一片地決定處理條件,可做高精度的控制。 另外,在例如如第5 (a)圖所示之金屬配線形成後的金 屬層間膜IMD(Inter Metal Dielectric:層間金屬介電質) 的平坦化工程中,於形成矽基板上的氧化膜44、鎢49(插 塞)、阻障層48(Ti + TiN)、鋁50、阻障層47(Ti + TiN)、氧 化膜38,進行CMP硏磨後,藉由CVD護罩以形成氧化膜 3 9之情形,由CMP裝置所傳送之硏磨後的膜厚測量資料 34係前饋式的被使用在決定下一絕緣膜CVD護罩工程之 處理條件上(第5(b)圖)。在CMP工程和絕緣膜CVD護 -19- (16) (16)200425320 罩工程之間不含被追加的膜厚測量工程故,自動化可容易 實現。另外,測量全部晶圓故,比起每一片地決定處理條 件,可做高精度的控制。 以上所述之回饋及前饋之參數可在潔淨室外之終端 22、23做編輯、確認故,間接業務可有效率化,控制精 度得以格外提升。在潔淨室外的編輯、確認作業之終端 22、23係連接於與主電腦或CMP裝置相同或不同的基幹 網路。藉此,可分散網路的處理負荷,變成可做更高響應 性之處理。 接著,依據第6圖槪略說明包含前述之C Μ P處理的 半導體裝置之製造方法的一例。藉由該製造方法所製造的 半導體裝置,例如係在晶圓的主面上具有 η通道型 MISFET等之裝置。 在η通道型MIS FET完成後,例如藉由在晶圓上以 C VD法堆積氧化矽膜,形成層間絕緣膜(步驟S 6 i )。接 著,藉由基於 CMP法之硏磨,令此層間絕緣膜平坦化 (步驟S 6 2 )。 接著,藉由將以微影法所被圖案化之光阻膜當成遮罩 之蝕刻’在晶圓主面之η型半導體領域上之層間絕緣膜設 置連接孔(步驟S 6 3 )。 接著,藉由濺鍍法,例如在晶圓上堆積氮化鈦等阻障 層導體膜,進而藉由CVD法,例如在阻障層導體膜上堆 積鎢等導電性膜(步驟S 64 )。 接著,藉由例如CMP法以去除層間絕緣膜上之阻障 -20- (17) 200425320 層導體膜以及導電性膜,在連接孔內殘留阻障層導體膜 導電性膜,形成由阻障層導體膜及導電性膜所成之插 (步驟S 6 5 )。 接著,藉由在晶圓上依序由下層起堆積Ti (鈦)膜、 合金膜及氮化鈦膜,形成導電性膜(步驟S66)。 接著,藉由以由微影法所圖案化之光阻膜爲遮罩, 刻導電性膜,形成由導電性膜所成之配線,製造半導體 置(步驟S 6 7 )。 以上,雖依據實施形態而具體說明由本發明人所完 之發明,但是,本發明並不限定於前述實施形態,在不 離其要至之範圍內,不用說可有種種變更可能性。 例如,在前述實施形態中,雖就適合於c M p裝置 情形做說明,但是,並不限定於此,也可使用於濺鍍 置、CVD裝置等其他的半導體製造裝置。例如,在濺 裝置中,爲了靶之表面狀態穩定化,分別區要起始虛擬 理,可適用前述實施形態之虛擬處理的方法。另外’在 要膜厚測量之CVD裝置中,於裝置內配備前述實施形 之膜厚測量部,藉由將測量資料前饋式的使用於下一工 之CMP工程等,也可使用此方法。 [發明效果] 如簡單說明由本申請案所揭示發明中之代表性者所 得之效果,則如下述: (1 )在維修等人工作業比率高的CMP工程中,藉 及 塞 A1 蝕 裝 成 脫 之 裝 鍍 處 需 態 程 獲 由 -21 - (18) 200425320 令CMP工程自動化,少人化合理化成爲可能。 (2 )藉由作業人員等待時間的最小化,可提升裝置 的稼動率至極限,處理能力提升、投資金額壓縮皆可能。 (3 )由潔淨室外可令處理程式之條件最佳化,間接 業務效率得以提升。 (4 )配線層間膜厚之精度提升,產品產品率得以提 升0In addition, in the foregoing formula, I is a natural I honing time representing a processing number. PT (I) is calculated for each honing head and is downloaded to the CMP apparatus 11. At the time of calculation, the film thickness (I) before honing is the film thickness measurement data of the insulating film CVD (Chemical Vapor Deposition) engineering before use. Even in CVD and the like of the previous process, although it is desirable to measure the film thickness data of the wafer using a film thickness measuring device mounted on the CVD device, it can also be used to measure one wafer in a batch. In addition, the film thickness data transmitted by the CMP device 11 determines the processing conditions of the next process (touch engraving, etc.) of the product wafer 31 in a feedforward manner. This makes it possible to omit the previous film thickness measurement process as the next process. For example, in the case of the STI (Shallow Trench Isolation) process shown in FIG. 3 (a), a nitride film 35, a buried oxide film 36, and CMP are patterned on the substrate 40. After honing, the etching of the nitride film 3 5 is performed. The film thickness measurement data 3 after C MH honing measured at c M P 1 1 can be fed forward. Each of the above-mentioned computer C VD processes of the project is performed by Shi Xi in a device type -18- (15) (15) 200425320 used to determine the processing program (processing conditions (Figure 3 (b))) for the next etching process. In this case, between the CMP process and the etching process, 'the added film thickness measurement process is not included, so automation can be easily realized. In addition,' all the wafers are measured, and the processing conditions can be determined more accurately than each wafer. In addition, for example, the interlayer film ILD (Interlebel Dieletcric) of the first metal wiring between the first metal wiring and the MOS (Metal Oxide Semiconductor) as shown in FIG. 4 (a) is formed. During the planarization process, an oxide film 4 3 is formed on the silicon substrate 4 1 In the case of polycrystalline silicon 42, source, drain 46, and oxide film 37, the thickness of the film after CMP honing is transmitted by the CMP apparatus 11 after being etched by the CVD shield to form an oxide film 45. Document 33 is a feedforward type used to determine the processing conditions for the next insulating film CVD shield project (Figure 4 (b)). The film thickness measurement process is not included between the CMP process and the insulating film CVD shield project Therefore, automation can be easily realized. In addition, by measuring all wafers, it is possible to perform high-precision control than to determine the processing conditions for each wafer. In addition, after the metal wiring is formed as shown in FIG. 5 (a), for example, In the planarization process of IMD (Inter Metal Dielectric), an oxide film 44, tungsten 49 (plug), barrier layer 48 (Ti + TiN), and aluminum 50 on a silicon substrate are formed on a silicon substrate. , Barrier layer 47 (Ti + TiN), oxide film 38, after CMP honing, the CVD shield is used to form the oxide film 39, and the honing film thickness measurement data 34 transmitted by the CMP apparatus The feedforward type is used to determine the processing conditions of the next insulating film CVD shield project (Figure 5 (b)) The CMP process and the insulation film CVD protection-19- (16) (16) 200425320 cover process are not included in the additional film thickness measurement process, so automation can be easily realized. In addition, all wafers are measured, compared to each wafer The processing conditions can be determined locally, and high-precision control can be done. The above-mentioned feedback and feedforward parameters can be edited and confirmed at the clean outdoor terminals 22 and 23. Therefore, the indirect business can be efficient and the control accuracy can be improved. The terminals 22 and 23 for editing and checking operations in the clean room are connected to the same or different backbone network as the host computer or CMP device. As a result, the processing load of the network can be distributed, and a more responsive process can be performed. Next, an example of a method for manufacturing a semiconductor device including the above-mentioned CMP process will be briefly described with reference to FIG. 6. A semiconductor device manufactured by this manufacturing method is, for example, a device having an n-channel type MISFET on the main surface of a wafer. After the n-channel MIS FET is completed, for example, a silicon oxide film is deposited on the wafer by the C VD method to form an interlayer insulating film (step S 6 i). Next, the interlayer insulating film is planarized by honing based on the CMP method (step S 6 2). Next, a connection hole is provided in the interlayer insulating film on the n-type semiconductor region on the main surface of the wafer by etching using the photoresist film patterned by the lithography method as a mask (step S 6 3). Next, a barrier layer conductor film such as titanium nitride is deposited on the wafer by a sputtering method, and a conductive film such as tungsten is deposited on the barrier layer conductor film by a CVD method (step S64). Next, the barrier layer on the interlayer insulating film is removed by, for example, the CMP method. (20) (17) 200425320 conductive film and conductive film, and the conductive film of the barrier layer conductive film remains in the connection hole to form a barrier layer. Insertion of the conductive film and the conductive film (step S 6 5). Next, a Ti (titanium) film, an alloy film, and a titanium nitride film are sequentially deposited from the lower layer on the wafer to form a conductive film (step S66). Next, by using the photoresist film patterned by the lithography method as a mask, the conductive film is etched to form wirings made of the conductive film, and a semiconductor device is manufactured (step S 6 7). Although the invention made by the present inventors has been specifically described above based on the embodiments, the present invention is not limited to the foregoing embodiments, and it is needless to say that various modifications are possible without departing from the scope of the invention. For example, in the foregoing embodiment, the case where it is suitable for the c M p device is described, but it is not limited to this, and it can be used for other semiconductor manufacturing devices such as a sputtering device and a CVD device. For example, in the sputtering device, in order to stabilize the surface state of the target, virtual processing is initiated separately, and the virtual processing method of the foregoing embodiment may be applied. In addition, in a CVD apparatus that requires film thickness measurement, the film thickness measurement section of the aforementioned embodiment is provided in the apparatus, and this method can also be used by using the feedforward measurement data for the next CMP process. [Effects of the Invention] If the effects obtained by the representative of the invention disclosed in this application are briefly explained, they are as follows: (1) In the CMP project with a high manual operation rate such as maintenance, the plug A1 is etched and removed. The required process of the plating place was granted from -21-(18) 200425320 to automate the CMP project and make it possible to rationalize less labor. (2) By minimizing the waiting time of the operator, the productivity of the device can be increased to the limit, the processing capacity can be improved, and the investment amount can be reduced. (3) The condition of the processing program can be optimized by the clean room, and the indirect business efficiency can be improved. (4) The accuracy of the film thickness between wiring layers is improved, and the product yield is increased.

【圖式簡單說明】 第1圖係顯示在本發明之一實施形態中,半導體製造 _ ®的自動運轉系統的構造及自動運轉方法之說明圖。 第2圖係顯示在本實施形態中,CMP裝置的處理流 程說明圖。[Brief description of the drawings] FIG. 1 is an explanatory diagram showing a structure and an automatic operation method of an automatic operation system of a semiconductor manufacturing device in one embodiment of the present invention. Fig. 2 is an explanatory diagram showing a processing flow of the CMP apparatus in this embodiment.

第3 ( a )圖係顯示在本實施形態中的STI構造之剖 面圓I ’第3 ( b )圖係顯示在本實施形態中的s TI處理流 程說明圖。 第4 ( a )圖係顯示在本實施形態中的ILD構造之剖 面圖’第4 ( b )圖係顯示在本實施形態中的ILD的處理 流程說明圖。 第5 ( a )圖係顯示在本實施形態中的imd構造之剖 面圖’第5 ( b )圖係顯示在本實施形態中的imD的處理 流程說明圖。 第6圖係顯示在本實施形態中,半導體裝置之製造方 法的一例之流程圖。 -22- (19)200425320Figure 3 (a) is a cross-sectional circle I 'showing the STI structure in the present embodiment. Figure 3 (b) is an explanatory diagram showing the sTI processing flow in the present embodiment. Fig. 4 (a) is a sectional view showing the ILD structure in the present embodiment. Fig. 4 (b) is an explanatory diagram showing the processing flow of the ILD in the present embodiment. Fig. 5 (a) is a cross-sectional view showing the imd structure in this embodiment. Fig. 5 (b) is an explanatory diagram showing the processing flow of imD in this embodiment. Fig. 6 is a flowchart showing an example of a method for manufacturing a semiconductor device in this embodiment. -22- (19) 200425320

主要元件對照表 1 1 : CMP裝置 1 2 :裝置控制部 1 3 :虛擬晶圓用璋 1 4 :產品晶圓用ί阜 1 5 :硏磨部 1 6 :淸洗部 1 7 :膜厚測量裝置 1 8 ·_潔淨室內之網路 1 9 :主電腦 20、 22、 23:終端 2 1 :潔淨室外之網路Main component comparison table 1 1: CMP device 12 2: Device control unit 1 3: Virtual wafer 1 4: Product wafer 1 5: Honing unit 1 6: Washing unit 1 7: Film thickness measurement Device 1 8__ clean room network 1 9: host computer 20, 22, 23: terminal 2 1: clean outdoor network

24 :產品晶圓之處理程式 2 5 :各產品·工程之參數 2 6 :結束資料 2 7 :虛擬晶圓之處理程式 2 8 :虛擬晶圓 2 9 :晶圓處理部 3 0 :晶圓儲存部 3 1 :產品晶圓 3 2、3 3、3 4 :膜厚測量資料 35 :氮化膜(SiN) 36、37、38、39、43、44、45:氧化膜(Si02) -23- (20) (20)200425320 4 0、4 1 :矽基板 4 2 :多晶矽 46 :源極·汲極 47、48 :阻障層(Ti + TiN ) 49 :鎢(W ) ,50 :鋁(A1 )24: Product wafer processing program 2 5: Parameters of each product and process 2 6: End data 2 7: Virtual wafer processing program 2 8: Virtual wafer 2 9: Wafer processing section 3 0: Wafer storage Part 3 1: Product wafer 3 2, 3 3, 3 4: Film thickness measurement data 35: Nitrided film (SiN) 36, 37, 38, 39, 43, 44, 45: Oxide film (Si02) -23- (20) (20) 200425320 4 0, 4 1: silicon substrate 4 2: polycrystalline silicon 46: source · drain 47, 48: barrier layer (Ti + TiN) 49: tungsten (W), 50: aluminum (A1 )

-24--twenty four-

Claims (1)

(1) (1)200425320 拾、申請專利範圍 1. 一種半導體裝置的製造方法,其特徵爲具有: 由主電腦對於半導體製造裝置傳送產品晶圓之處理條 件之步驟, 和依循事先決定的處理條件,在前述半導體製造裝置 中自動地處理虛擬晶圓之步驟, 和依循前述所傳送之產品晶圓之處理條件,在前述半 導體製造裝置中處理前述產品晶圓之步驟。 2 ·如申請專利範圍第1項所記載之半導體裝置的製 造方法,其中,進而具有:在前述產品晶圓之處理中途或 結束時,藉由搭載在前述半導體製造裝置之膜厚測量裝置 以測量形成在前述產品晶圓上之膜的膜厚之步驟, 和將前述測量之膜厚資料及前述半導體製造裝置的處 理資料傳送給前述主電腦之步驟, 和依據前述所傳送之膜厚資料及處理資料,於前述主 電腦決定在前述半導體製造裝置中,之後所處理之產品晶 圓的處理條件之步驟。 3 ·如申請專利範圍第1項所記載之半導體裝置的製 造方法,其中,進而具有:在前述產品晶圓之處理中途或 結束時,藉由搭載在前述半導體製造裝置之膜厚測量裝置 以測量形成在前述產品晶圓上之膜的膜厚之步驟, 和將前述測量之膜厚資料傳送給前述主電腦之步驟, 和依據前述所傳送之膜厚資料,於前述主電腦決定前 述產品晶圓之下一工程的處理條件之步驟。 -25- (2) (2)200425320 4 .如申請專利範圍第2項所記載之半導體裝置的製 造方法,其中,進而具有:依據前述所傳送之膜厚資料, 在則述主電腦中決定則述產品晶圓之下一工程的處理條件 之步驟。 5. —種半導體製造裝置的自動運轉方法,其特徵爲 具有: 將產品晶圓之處理條件由主電腦傳送給半導體製造裝 置之步驟, 和依循事先所決定的處理條件,在前述半導體製造裝 置中,自動地處理虛擬晶圓之步驟, 和依循前述所傳送之產品晶圓的處理條件,在前述半 導體製造裝置中處理前述產品晶圓之步驟。 6 .如申請專利範圍第5項所記載之半導體製造裝置 的自動運轉方法,其中,進而具有:在前述產品晶圓之處 理中途或結束時,藉由搭載在前述半導體製造裝置之膜厚 測量裝置以測量形成在前述產品晶圓上之膜的膜厚之步 驟, 和將前述測量之膜厚資料及前述半導體製造裝置的處 理資料傳送給前述主電腦之步驟, 和依據前述所傳送之膜厚資料及處理資料,於前述主 電腦決定在前述半導體製造裝置中,之後所處理之產品晶 圓的處理條件之步驟。 7 ·如申請專利範圍第5項所記載之半導體製造裝置 的自動運轉方法,其中,進而具有:在前述產品晶圓之處 -26- (3) (3)200425320 理中途或結束時,藉由搭載在前述半導體製造裝置之膜厚 測量裝置以測量形成在前述產品晶圓上之膜的膜厚之步 驟, 和將前述測量之膜厚資料傳送給前述主電腦之步驟, 和依據則述所傳送之膜厚資料,於前述主電腦決定前 述產品晶圓之下一工程的處理條件之步驟。 8 ·如申請專利範圍第6項所記載之半導體製造裝置 的自動運轉方法,其中’進而具有:依據前述所傳送之膜 厚資料’在前述主電腦中決定前述產品晶圓之下一工程的 處理條件之步驟。 9 · 一種CMP(化學機械硏磨)裝置的自動運轉方法, 其特徵爲具有: 將產品晶圓之處理條件由主電腦傳送給C Μ P (化學機 械硏磨)裝置之步驟, 和依循事先所決定的處理條件,在前述C Μ Ρ (化學機 械硏磨)裝置中,自動地處理虛擬晶圓之步驟, 和依循前述所傳送之產品晶圓的處理條件,在前述 CMP(化學機械硏磨)裝置中處理前述產品晶圓之步驟。 1 0 ·如申請專利範圍第9項所記載之CMP (化學機械 硏磨)裝置的自動運轉方法,其中,進而具有:在前述產 品晶圓之處理中途或結束時,藉由搭載在前述CMP(化學 機械硏磨)裝置之膜厚測量裝置以測量形成在前述產品晶 圓上之膜的膜厚之步驟, 和將前述測量之膜厚資料及前述CMP(化學機械硏磨) -27- (4) (4)200425320 裝置的處理資料傳送給前述主電腦之步驟, 和依據前述所傳送之膜厚資料及處理資料,於前述主 電腦決定在前述CMP (化學機械硏磨)裝置中,之後所處理 之產品晶圓的硏磨時間之步驟。 1 1 ·如申請專利範圍第9項所記載之c Μ P (化學機械 硏磨)裝置的自動運轉方法,其中,進而具有:在前述產 品晶圓之處理中途或結束時,藉由搭載在前述CMP(化學 機械硏磨)裝置之膜厚測量裝置以測量形成在前述產品晶 圓上之膜的膜厚之步驟, 和將前述測量之膜厚資料傳送給前述主電腦之步驟, 和依據前述所傳送之膜厚資料,於前述主電腦決定前 述產品晶圓之下一工程的處理條件之步驟。 12 ·如申請專利範圍第1〇項所記載之CMP (化學機械 硏磨)裝置的自動運轉方法,其中,進而具有:依據前述 所傳送之膜厚資料,在前述主電腦中決定前述產品晶圓之 下一工程的處理條件之步驟。 1 3 · —種半導體製造裝置的自動運轉系統,其特徵 爲.具有^ 保有產品晶圓之處理條件之主電腦,和控制半導體製 造裝置之裝置控制部, 前述裝置控制部係在由前述主電腦對前述半導體製造 裝置傳送前述產品晶圓之處理條件時,依循事先決定之處 理條件,在前述半導體製造裝置中自動地處理虛擬晶圓, 依循前述所傳送之產品晶圓的處理條件,在前述半導體製 -28- (5) (5)200425320 造裝置中處理前述產品晶圓。 1 4 .如申請專利範圍第1 3項所記載之半導體製造裝 置的自動運轉系統,其中,前述裝置控制部係在前述產品 晶圓之處理中途或結束時,藉由搭載在前述半導體製造裝 置之膜厚測量裝置,以測量形成在前述產品晶圓上之膜的 膜厚,將前述測量之膜厚資料及前述半導體裝置之處理資 料傳送給前述主電腦, 前述主電腦依據前述所傳送之膜厚資料及處理資料, 決定在前述半導體製造裝置中,在之後所處理之產品晶圓 的處理條件。 1 5 ·如申請專利範圍第1 3項所記載之半導體製造裝 置的自動運轉系統,其中,前述裝置控制部係在前述產品 晶圓之處理中途或結束時,藉由搭載在前述半導體製造裝 置之膜厚測量裝置,以測量形成在前述產品晶圓上之膜的 膜厚,將前述測量之膜厚資料傳送給前述主電腦, 前述主電腦依據前述所傳送之膜厚資料,決定前述產 品晶圓之下一工程的處理條件。 1 6 ·如申請專利範圍第1 3〜1 5項中任一項所記載之 半導體製造裝置的自動運轉系統,其中,前述主電腦和前 述裝置控制部係藉由網路而連接,可由連接於前述網路而 位於潔淨室外之終端變更前述主電腦內之前述產品晶圓的 處理條件。 17 .如申請專利範圍第9項所記載之CMP(化學機械 硏磨)裝置的自動運轉系統,其中,前述CMP (化學機械硏 -29- (6)200425320 磨)裝置係進行:依序處理存放在前述CMP(化學機械硏磨) 裝置內之複數的前述虛擬晶圓之棚架管理,和在前述虛擬 晶圓成爲特定的處理量時,予以更換之使用量管理。(1) (1) 200425320 Scope of patent application 1. A method for manufacturing a semiconductor device, comprising: a step of transferring processing conditions of a product wafer by a host computer to the semiconductor manufacturing device, and following a predetermined processing condition A step of automatically processing a virtual wafer in the aforementioned semiconductor manufacturing apparatus, and a step of processing the aforementioned product wafer in the aforementioned semiconductor manufacturing apparatus in accordance with the processing conditions of the transferred product wafer. 2. The method for manufacturing a semiconductor device according to item 1 of the scope of patent application, further comprising: measuring the film thickness measurement device mounted on the semiconductor manufacturing device during or at the end of the processing of the product wafer. A step of forming the film thickness of the film on the product wafer, a step of transmitting the measured film thickness data and the processing data of the semiconductor manufacturing apparatus to the host computer, and a step of transmitting the film thickness data and processing in accordance with the transmitted film thickness data Data, the step of determining the processing conditions of the product wafers to be processed in the aforementioned semiconductor manufacturing device by the aforementioned host computer. 3. The method for manufacturing a semiconductor device according to item 1 of the scope of patent application, further comprising: measuring the film thickness measurement device mounted on the semiconductor manufacturing device during or at the end of the processing of the product wafer. A step of forming the film thickness of the film on the product wafer, a step of transmitting the measured film thickness data to the host computer, and determining the product wafer on the host computer based on the transmitted film thickness data Steps to deal with the conditions of the next project. -25- (2) (2) 200425320 4. The method for manufacturing a semiconductor device as described in item 2 of the scope of patent application, further comprising: according to the film thickness data transmitted as described above, determining the rule in the host computer The steps of processing conditions for the next process of the product wafer are described. 5. An automatic operation method of a semiconductor manufacturing apparatus, comprising: a step of transmitting processing conditions of a product wafer from a host computer to the semiconductor manufacturing apparatus; and in accordance with the processing conditions determined in advance, in the aforementioned semiconductor manufacturing apparatus , The step of automatically processing the virtual wafer, and the step of processing the product wafer in the semiconductor manufacturing apparatus in accordance with the processing conditions of the product wafer transferred as described above. 6. The method for automatically operating a semiconductor manufacturing apparatus according to item 5 of the scope of patent application, further comprising: a film thickness measuring device mounted on the semiconductor manufacturing apparatus during or at the end of processing of the product wafer. The step of measuring the film thickness of the film formed on the aforementioned product wafer, and the step of transmitting the measured film thickness data and the processing data of the semiconductor manufacturing apparatus to the host computer, and according to the transmitted film thickness data And processing data, the steps in which the host computer determines the processing conditions of the product wafers to be processed in the semiconductor manufacturing apparatus described later. 7 · The method for automatically operating a semiconductor manufacturing apparatus as described in item 5 of the scope of patent application, further comprising: at the place of the aforementioned product wafer-26- (3) (3) 200425320 at the middle or end of processing, A step of measuring the film thickness of the film formed on the product wafer, a step of transmitting the film thickness data of the measured film thickness to the host computer, and a step of transmitting the film thickness measurement device mounted on the semiconductor manufacturing device For the film thickness data, the host computer determines the processing conditions for the next process of the product wafer. 8 · The automatic operation method of the semiconductor manufacturing device as described in item 6 of the scope of the patent application, wherein 'further has: based on the film thickness data transmitted' to determine the processing of the next process of the product wafer in the host computer Conditional steps. 9. An automatic operation method of a CMP (chemical mechanical honing) device, which is characterized by: a step of transmitting processing conditions of a product wafer from a host computer to a CMP (chemical mechanical honing) device; The determined processing conditions are the steps of automatically processing virtual wafers in the aforementioned CMP (chemical mechanical honing) device, and in accordance with the processing conditions of the transferred product wafers, in the aforementioned CMP (chemical mechanical honing) The device processes the aforementioned product wafers. 10 · The automatic operation method of the CMP (chemical mechanical honing) device as described in item 9 of the scope of the patent application, further comprising: mounting the CMP ( A step of measuring the film thickness of a film formed on the aforementioned product wafer by a film thickness measuring device of the chemical mechanical honing) device, and transferring the film thickness information of the foregoing measurement and the aforementioned CMP (chemical mechanical honing) -27- (4 ) (4) The step of transferring the processing data of 200425320 device to the aforementioned host computer, and according to the previously transmitted film thickness data and processing data, the aforementioned host computer decides to be in the aforementioned CMP (chemical mechanical honing) device and then processes it Steps for honing time of product wafers. 1 1 · The automatic operation method of the c MP (chemical mechanical honing) device described in item 9 of the scope of the patent application, further comprising: loading the product wafer in the middle of or at the end of the processing of the product wafer. A step of measuring a film thickness of a CMP (chemical mechanical honing) device to measure the film thickness of a film formed on the aforementioned product wafer, a step of transmitting the measured film thickness data to the host computer, and The film thickness data transmitted is a step of determining the processing conditions of the next process of the aforementioned product wafer by the aforementioned host computer. 12 · The automatic operation method of the CMP (chemical mechanical honing) device as described in item 10 of the scope of patent application, further comprising: determining the product wafer in the host computer according to the film thickness data transmitted as described above. Steps to deal with the conditions of the next project. 1 3 · An automatic operation system for a semiconductor manufacturing device, characterized in that it has a host computer that holds processing conditions for product wafers, and a device control section that controls the semiconductor manufacturing device. The device control section is controlled by the host computer. When transferring the processing conditions of the product wafer to the semiconductor manufacturing apparatus, the virtual wafers are automatically processed in the semiconductor manufacturing apparatus in accordance with the processing conditions determined in advance, and the processing conditions of the product wafers transferred in the semiconductor are Manufacturing-28- (5) (5) 200425320 manufacturing equipment to process the aforementioned product wafers. 14. The automatic operation system for a semiconductor manufacturing device as described in item 13 of the scope of patent application, wherein the device control unit is mounted on the semiconductor manufacturing device during or at the end of processing of the product wafer. The film thickness measuring device measures the film thickness of the film formed on the product wafer, and transmits the measured film thickness data and the processing data of the semiconductor device to the host computer, and the host computer according to the film thickness transmitted The data and processing data determine the processing conditions of the product wafers to be processed in the semiconductor manufacturing device. 1 5 · The automatic operation system for a semiconductor manufacturing device as described in item 13 of the scope of patent application, wherein the device control unit is mounted on the semiconductor manufacturing device during or at the end of processing of the product wafer. The film thickness measuring device measures the film thickness of the film formed on the product wafer, transmits the measured film thickness data to the host computer, and the host computer determines the product wafer based on the transmitted film thickness data. Processing conditions for the next project. 16 · The automatic operation system for a semiconductor manufacturing device as described in any one of claims 1 to 15 in the scope of the patent application, wherein the host computer and the device control unit are connected via a network, and may be connected to The terminal located in the clean room on the aforementioned network changes the processing conditions of the aforementioned product wafer in the host computer. 17. The automatic operation system of the CMP (chemical mechanical honing) device as described in item 9 of the scope of the patent application, wherein the aforementioned CMP (chemical mechanical honing-29- (6) 200425320 grinding) device is performed: sequentially processing storage In the CMP (Chemical Mechanical Honing) device, a plurality of the virtual wafers are managed in a scaffolding manner, and when the virtual wafers become a specific processing amount, the usage amount management is changed. -30--30-
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10559709B2 (en) 2014-10-20 2020-02-11 Aurora Solar Technologies (Canada) Inc. Mapping of measurement data to production tool location and batch or time of processing

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050197721A1 (en) * 2004-02-20 2005-09-08 Yung-Cheng Chen Control of exposure energy on a substrate
JP4864402B2 (en) * 2005-09-29 2012-02-01 株式会社東芝 Manufacturing method of semiconductor device
KR100640667B1 (en) * 2005-11-22 2006-11-01 삼성전자주식회사 Control method for semiconductor device manufacturing process and control system for the same process
US20070145538A1 (en) * 2005-12-28 2007-06-28 Tsang-Jung Lin Cmp apparatus for polishing dielectric layer and method of controlling dielectric layer thickness
US7248936B1 (en) 2006-01-31 2007-07-24 International Business Machines Corporation Automated tool recipe verification and correction
US7305320B2 (en) * 2006-02-15 2007-12-04 International Business Machines Corporation Metrology tool recipe validator using best known methods
JP4942174B2 (en) 2006-10-05 2012-05-30 東京エレクトロン株式会社 Substrate processing system processing recipe optimization method, substrate processing system, substrate processing apparatus
DE102007035833B3 (en) * 2007-07-31 2009-03-12 Advanced Micro Devices, Inc., Sunnyvale Advanced automatic deposition profile targeting and control through the use of advanced polishing endpoint feedback
JP5221979B2 (en) * 2008-02-25 2013-06-26 シャープ株式会社 Manufacturing method of semiconductor device
JP5305729B2 (en) * 2008-05-12 2013-10-02 株式会社荏原製作所 Polishing method, polishing apparatus, and program for controlling polishing apparatus
WO2010132998A1 (en) * 2009-05-22 2010-11-25 Telere Technologies Inc . Process for improving the production of photovoltaic products
US20110195636A1 (en) * 2010-02-11 2011-08-11 United Microelectronics Corporation Method for Controlling Polishing Wafer
JP5853382B2 (en) 2011-03-11 2016-02-09 ソニー株式会社 Semiconductor device manufacturing method and electronic device manufacturing method
JP7081544B2 (en) * 2019-03-22 2022-06-07 株式会社Sumco Work double-sided polishing method and work double-sided polishing device
JP2022128233A (en) * 2021-02-22 2022-09-01 株式会社Sumco Process condition setting device, process condition setting method, and wafer manufacturing system

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3341887B2 (en) * 1991-04-02 2002-11-05 株式会社ニコン Lithography system
US5571366A (en) * 1993-10-20 1996-11-05 Tokyo Electron Limited Plasma processing apparatus
AU4673797A (en) * 1996-10-04 1998-04-24 Exclusive Design Company, Inc. A method and system for controlling chemical mechanical polishing thickness removal
JPH10294300A (en) * 1997-04-17 1998-11-04 Tokyo Seimitsu Co Ltd Wafer polishing method and device
JP3077656B2 (en) * 1997-12-22 2000-08-14 日本電気株式会社 Method of correcting recipe in semiconductor manufacturing equipment
JP2000015574A (en) * 1998-06-30 2000-01-18 Toshiba Corp Polishing system and finish control method
US6169931B1 (en) * 1998-07-29 2001-01-02 Southwest Research Institute Method and system for modeling, predicting and optimizing chemical mechanical polishing pad wear and extending pad life
US6213848B1 (en) * 1999-08-11 2001-04-10 Advanced Micro Devices, Inc. Method for determining a polishing recipe based upon the measured pre-polish thickness of a process layer
JP4437611B2 (en) * 2000-11-16 2010-03-24 株式会社ルネサステクノロジ Manufacturing method of semiconductor device
EP1253497B1 (en) * 2001-04-27 2008-04-02 Qimonda Dresden GmbH & Co. oHG Method for adjusting processing parameters of plate-like objects in a processing tool
JP2003068689A (en) * 2001-08-22 2003-03-07 Tokyo Seimitsu Co Ltd Apparatus for feedback polishing and method for polishing

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10559709B2 (en) 2014-10-20 2020-02-11 Aurora Solar Technologies (Canada) Inc. Mapping of measurement data to production tool location and batch or time of processing
TWI702732B (en) * 2014-10-20 2020-08-21 加拿大商奧羅拉太陽能技術(加拿大)有限公司 Mapping of measurement data to production tool location and batch or time of processing

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