TW200419677A - A method to grow silicon germanium (SiGe) layer on different materials and produce a bipolar junction transistor including SiGe layer - Google Patents

Abstract

This invention provides a method to grow silicon germanium (SiGe) layer on different materials, and to produce a bipolar junction transistor including SiGe layer. The method of growing SiGe layer includes some steps shown below. Provide a substrate, wherein there is a different-material region composed of a material different from that of the substrate on the surface of the substrate. Afterward, form a doped silicon seed layer on the substrate and the different-material region Finally, deposit a SiGe layer on the doped silicon seed layer. Forming the doped silicon seed layer first can help the growth of SiGe layer and shorten the growth time to form a continuous SiGe layer.

Description

200419677 V. Description of the invention (1) Technical field of the invention The present invention relates to a method for growing a silicon germanium layer on different materials, and more particularly to a method for manufacturing a bipolar transistor with a silicon germanium layer. Bipolar complementary meta1-semiconductor transistor (BiCM〇S) in the prior art includes a bipolar transistor (bip〇lar transistor) and a complementary metal oxide semi-transistor ( CMOS), is to process the parts of the entire circuit that require high speed and high current actuation (such as the input / output part of the circuit) with Bipoiar, and the areas in the circuit that require high integration and low energy consumption (such as arrays) ) To CMOS. In this way, BiCM0s can combine the advantages of both 盯 1 盯 and ·.

BiCMOS transistors in BiCMOS mainly include collectors, bases, and emitters to form nPn or pnp transistors. Since the material of Shixi germanium is lower than the energy gap of pure Shixi, therefore, in recent years, a silicon germanium silicide layer (si_Ge epitaxial layer) has been used as the base of a heterojunction bipolar transistor. Has become the mainstream, silicon germanium epitaxial layer can provide higher emitter injection efficiency (11 er injection efficiency) and lower base transit time (M " transit time) °, when growing Shi Xi split layer, 4 There is already a Xiaoxian area composed of oxidized stone on the base of Chang Shixi. Due to the closeness of the Shi Xi staggered layer and its thin layer and the material of the silicon substrate, the lattice constant Page 5 0503-S259TW; TSMC2002-0029; Cathy.ptd 200419677 V. Description of the invention (2) —

Uattie.pa]: ameter) is very close, so a silicon germanium layer in epitaxial form can be grown on the silicon substrate. However, the crystal structure of the silicon oxide and silicon germanium layers is very different. The silicon germanium layer on the silicon oxide isolation region can only grow into a V-shaped day-to-day and is not easy to grow, there will be discontinuity In some cases, the resistance value of the silicon germanium layer is high. ^ In order to solve the above-mentioned discontinuity of the silicon germanium layer, traditionally, an un-doped complex was first formed by chemical vapor dep Spar seed layer (see 砬 y) When growing here on the non-doped polyspar seed layer, because the material of ^ Ge and polycrystalline silicon is close, Therefore, the valley is easier to grow into a continuous silicon germanium layer. When the undoped polycrystalline silicon seed layer is formed to have a thickness of sufficient thickness, it can grow into a continuous lithium germanium layer, but this will increase the jointing degree (j u n c t i 〇 d e p t h), which is not conducive to electrical properties. When the thickness of the undoped silicon seed layer is insufficient, the silicon germanium layer is still discontinuous. In addition, the undoped polycrystalline silicon seed layer has an incubat fon long ′ step coverage capability. SUMMARY OF THE INVENTION In view of this, the purpose of the present invention is to shorten the growth time by growing a silicon germanium layer on different materials, and to achieve the purpose of the invention, the layer method includes the following steps. On the first side, a material different from the substrate is provided to provide a method to solve the above problems, which can form a continuous silicon germanium layer with a step coverage capability. In the present invention, silicon germanium is grown on different materials. First, a substrate is provided, and the substrate is provided with different material regions. Then, at the base

200419677 Description of the invention (3) _ A doped stone seed layer is formed on different material shells. Finally, the silicon seed species Bu Bing # ^ 隹 doped is deposited on the wrong layer. Fang Benming also provided the beauty of manufacturing a bipolar transistor with a silicon germanium layer, which includes the following steps. First, a substrate is provided as a collector, and the surface of t soil has a different material area from the substrate. A doped silicon seed layer is formed on the substrate and regions of different materials. Then, a silicon germanium layer is deposited on the hybrid silicon seed layer as a base 9 to form an emitter on the silicon germanium layer. After taking

Embodiments FIGS. 1 to 3 are schematic cross-sectional views showing a process of forming a carrier crystal having a silicon germanium layer according to a preferred embodiment of the present invention. Mingling read the first figure, and provided a substrate 10 with regions 12 and 14 on the surface that are different from the substrate 1, * 〇 = one of the same material. For example, the substrate 10 may be a semiconductor substrate (such as a silicon substrate), and the regions of different materials may include an isolation region 12 and a polycrystalline silicon layer or a silicon nitride (8 ") layer 14. The isolation region 12 may be a shallow trench (STI) formed by silicon oxide (STI).

Next, referring to FIG. 2, a doped silicon seed layer is formed on the silicon substrate 10 and the regions 12 and 14 of different materials. The formation method may be that a silicon-containing compound and a dopant compound are used as a gas source. A chemical vapor deposition (CVD) method is performed, and the thickness thereof may be between 10 ^ and 200 A. The doped silicon seed layer formed can be divided into two parts. The doped silicon seed layer formed on the silicon substrate 10 is an epitaxial doped silicon seed layer 21e. While in §1 ^ region 12 and polycrystalline silicon

200419677 V. Description of the invention (4) The doped silicon seed layer formed on the layer 4 or SiN layer 14 is in the form of a complex crystal. 220 ° When the doped silicon seed layers 21 and 22 are p-type In this case, si lanes and p-type doping compounds can be used, such as boron-containing dopant compounds as the gas source. Specific examples of the deleterious dopant compound include diiborane and diron (8 卩 3; boron trifluoride). In addition, when the doped silicon seed layers 2 1 0 and 2 2 0 are n-type, silane (s i 1 ane) and n-type doped compounds can be used as the gas source. Specific examples of the n-type doping compound include Pfj3; phosphine and ash3; arsine ^. Next, referring still to FIG. 2, a stone germanium layer is deposited on the doped silicon seed layers 21 and 20. The silicon-germanium layer formed can be divided into two parts. The epitaxial silicon-germanium layer 2 4 0 is formed on the doped stone seed layer 2 1 0 in the epitaxial form, and the doping in the complex ss form is performed. Formed on the stone evening seed layer 2 2 0 is a polycrystalline stone evening germanium layer 250. The thickness of the stone Xi germanium layers 240 and 250 may be between 20A and 100 A, and various methods such as MBE (molecular beam epitaxy) can be formed. Uhv-CVD (ultra-high vacuum chemical vapor deposition) ; Ultra-high vacuum chemical vapor deposition) 'RT-CVD (rapid thermal CVD); and LRP CVD (limited reaction processing CVD; limited reaction process CVD). The silicon seed layers 21 and 22 formed in the present invention are doped silicon seed layers. Compared with non-doped ones, doped silicon seed layers 2 丨 〇 and 2 2〇 can reduce the activation energy (activation energy) and increase the nucleation site (nucleati〇ri site), so it can help polycrystalline silicon Growth of the germanium layer 25

p ^ 3-8259TWF; TSMC2002-0029; Cathy.ptd page 8 200419677 V. Description of the invention (5) '(incubation), the time required to grow the polycrystalline silicon germanium layer 25 can be reduced, and there are better Step coverage. In this way, although the semiconductor substrate i 0 and the regions of different materials (12 and 14) belong to different materials, due to the help of the doped polycrystalline silicon seed layer 2 2 0, the grown polycrystalline silicon germanium Layer 2 50 is continuous and has no adverse effect on electrical properties. Finally, referring to FIG. 3, an insulating layer 300 and an emitter 40 are formed on the silicon germanium layers 24 and 25 to complete the fabrication of the bipolar transistor. In order to form a bipolar transistor, the semiconductor substrate 10 can be used as a collector, and both the semiconductor substrate collector 10 and the emitter 400 can have a first conductivity type. The epitaxial silicon germanium layer 240 can be used as a base and has a second conductivity type. The doped silicon seed layers 21 and 22 are preferably of the same conductivity type as the semiconductor substrate collector 10. For example, the semiconductor substrate collector 10, the doped silicon seed layers 210 and 220, and the emitter 400 are all shaped, and the epitaxial silicon germanium layer dysprosium 240 is p-type, forming an npn bicarrier. Transistor. To sum up, before the silicon germanium layer is formed in the present invention, a doped silicon seed layer is formed, which can reduce the activation energy and increase the nucleation point. Therefore, the growth of the stone layer can be shortened and the growth time of the stone layer can be shortened , @Has better coverage ability. Such as &, although grown on different materials, a continuous SiGe layer can still be formed without adversely affecting electrical properties. Although the present invention has been disclosed in the preferred embodiment as above, it does not limit the present invention to those skilled in the art, without departing from the scope of the present invention: "It can be modified and retouched. Therefore, the present invention Baoguman: As defined in the scope of the patent application attached later, prevail.

200419677 Brief Description of Drawings Figs. 1 to 3 are schematic cross-sectional views showing a process of forming a bi-electric transistor with a silicon germanium layer according to a preferred embodiment of the present invention. Explanation of reference numerals 10 to semiconductor substrate; 12 to shallow trench isolation region; 1 to 4 polycrystalline silicon layer or silicon nitride layer; 2 10 to epitaxial doped silicon seed layer; 2 2 to polycrystalline doped Hetero-silicon seed layer; 240 to epitaxial silicon germanium layer; 250 to polycrystalline stone Xi germanium layer; 300 to insulating layer; 400 to emitter.

Q303-S259TWF; TSMC2002-0029; Cathy.ptd page 10

Claims (1)

200419677 VI. Scope of Patent Application 1. A method for growing a silicon germanium layer on different materials, including: providing a substrate, the surface of the substrate having a region of a material of a different material from that of the substrate; Forming a doped silicon seed layer on the material region; and depositing a silicon germanium layer on the doped silicon seed layer. 2 · The method of growing a silicon germanium layer on different materials as described in item 1 of the scope of the patent application, wherein the method of forming a doped stone seed layer is to use a stone-containing compound and a dopant compound As a gas source, a chemical vapor deposition method was performed. 3. The method for growing a silicon germanium layer on different materials as described in item 2 of the scope of the patent application, wherein the silicon-containing compound is sUane. 4. The method of growing a silicon germanium layer on different materials as described in item 2 of the scope of the patent application, where is the dopant compound? Type dopant compound. 5. The method for growing a silicon germanium layer on different materials as described in item 4 of the scope of the patent application, wherein the dopant compound is a boron-containing dopant compound. 6. The method for growing a silicon germanium layer on different materials according to item 5 of the scope of the patent application, wherein the dopant compound is a boron-containing compound such as diboron hexahydrogen (4%) or boron trifluoride (BF3). 7. The method for growing a silicon germanium layer on different materials as described in item 2 of the scope of the patent application, wherein the dopant compound is an n-type dopant compound. 8. The method for growing silicon interlayers on different materials as described in item 7 of the scope of the patent application, wherein the dopant compound is phosphorus hydride (P &) or arsenic hydride (AsH3). 9Grow silicon on different materials as described in the first patent application 0503-8259TWF; TSMC2002-0029; Cathy.ptd p. 11 200419677 It is grown on different materials as described in item 1 of the patent, and the price of silicon germanium is 6, +,%, Ν, and is used for growth. The different material areas include isolation areas. Including 12. · A method for manufacturing a bipolar transistor with a silicon-germanium layer, which provides a substrate as a set of different materials with different material regions on the substrate and the doped stone seed crystals on the substrate A layer 13 is formed on the silicon germanium layer on the layer. As in the method of the patent application for the second carrier transistor method, wherein the conductivity type, the base of the silicon germanium layer has a region on the surface of the substrate with the base 9 region. A doped stone seed layer is formed on it; a stone germanium layer is deposited as a base electrode; and the base collector and the emitter having a silicon germanium layer described in item 12 described above have first and second conductivity types . 1 4. The method for manufacturing a bipolar transistor having a silicon interlayer as described in item 13 of the scope of the patent application, wherein the doped stone seed layer has a first conductivity type. ', 1 5 · The method for manufacturing a double carrier transistor with a stone germanium layer as described in item 12 of the scope of the patent application, wherein a doped silicon seed layer is formed = method is to use a silicon-containing compound and a dopant Chemical compounds are used as the gas source, and chemical vapor deposition is performed. 1 of 6 ・ Manufactured as described in item 15 of the scope of patent application 200419677 VI Scope of Patent Application A method for a double-carrier transistor, wherein the silicon-containing compound is silane 〇, 17 · The method for manufacturing a double-carrier transistor having a silicon-germanium layer as described in item 15 of the patent application scope, wherein The dopant compound is a p-type replacement compound. 18. The method for manufacturing a bipolar transistor with a stone germanium layer as described in item 17 of the scope of the patent application, wherein the dopant compound is a boron-containing dopant compound. 19. The method for manufacturing a double carrier transistor having a silicon germanium layer as described in item 8 of the scope of the patent application, wherein the dopant compound is hexahydrodifluorene (I) or boron trifluoride (BFs), etc. Boron-containing compounds. 20 · The method for manufacturing a double-carrier transistor having a silicon-germanium layer as described in item 15 of the scope of patent application, wherein the dopant compound is an n-type dopant compound. 21 · The method for manufacturing a double carrier transistor with a stone germanium layer as described in item 20 of the scope of the patent application, wherein the dopant compound is phosphorus hydride (P3) or arsenic (AsH3) 〇2 2 · The method for manufacturing a bipolar transistor having a silicon germanium layer as described in item 12 of the scope of the patent application, wherein the silicon germanium layer includes an epitaxial silicon germanium layer. 2 3. The method for manufacturing a double-carrier transistor with a silicon-germanium layer as described in item 12 of the scope of the patent application, wherein the different material regions include silicon oxide, polycrystallite, silicon nitride, or a combination thereof . 24. The method for manufacturing a bipolar transistor with a silicon germanium layer as described in item 23 of the scope of the patent application, wherein the regions of different materials include isolation regions. ^ 0_503-8259TWF; TSMC2002-0029; Cathy.ptd -L 'J-