TW200415546A - Anti-contouring display correction - Google Patents

Anti-contouring display correction Download PDF

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Publication number
TW200415546A
TW200415546A TW092121835A TW92121835A TW200415546A TW 200415546 A TW200415546 A TW 200415546A TW 092121835 A TW092121835 A TW 092121835A TW 92121835 A TW92121835 A TW 92121835A TW 200415546 A TW200415546 A TW 200415546A
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TW
Taiwan
Prior art keywords
offset
pixel
correction
value
display
Prior art date
Application number
TW092121835A
Other languages
Chinese (zh)
Inventor
Howard V Goetz
Steven H Linn
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Iljin Diamond Co Ltd
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Publication of TW200415546A publication Critical patent/TW200415546A/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0285Improving the quality of display appearance using tables for spatial correction of display data

Abstract

Correction values for a display are applied based on correction parameters that are associated with image locations and offsets that are based on row and frame number. Correction values associated with pixels located at at least two offsets are alternatingly applied to image values associated with a reference pixel location. The horizontal offsets are interlaced from row to row, and vertical offset alternate from frame to frame.

Description

200415546 玖、發明說明: 【發明所屬之技術領域】 本申請案優先於2〇〇2年8月9日申請的美國臨時專利申請 案60/402,190,其以引用方式併入本文中。 本發明係關於用於影像顯示的方法及裝置。 【先前技術】 已根據液晶顯示器 多種投影顯示器及所謂平板顯示器 (liquid crystal display ; LCD)面板而開發。與 ^ 〜像資矶一般係 藉由應用適當電壓於該LCD面板上一串逢的 甲運的列及行電極而 提供給該等面板 具有光學 該等列及行電極之交叉點定 應用於該等列 晶體(thin film 特性的圖像元素(像素),該等光學特性取決於 及行電極的電壓。某些LCD面板還包括薄膜電 transistor ; TFT)之一陣列,而且—或多個了打可與每個像 素關聯,以使應用於每個像素的電壓可更加獨立於應用於 其他像素的電壓而受到控制。200415546 (1) Description of the invention: [Technical field to which the invention belongs] This application has priority over US Provisional Patent Application 60 / 402,190, filed on August 9, 2002, which is incorporated herein by reference. The invention relates to a method and a device for image display. [Prior art] It has been developed based on a variety of liquid crystal display projection displays and so-called liquid crystal display (LCD) panels. And ^ ~ like Zi Ji is generally applied to the LCD panel by applying a suitable series of column and row electrodes on the LCD panel to these panels with optical column and row electrode intersections are applied to the Isometric crystals (thin film characteristic picture elements (pixels), such optical characteristics depend on the voltage of the row electrodes. Some LCD panels also include an array of thin film electrical transistors; TFT), and-or more It can be associated with each pixel so that the voltage applied to each pixel can be controlled more independently of the voltage applied to other pixels.

某些根據TFT LCD面板的顯示器具有陰影修正電路,該 電路補償其他顯示系統組件(例如顯示光學系統)中的某些 LCD面板之非均勻性或缺陷。典型非均勻性由光學投影系 統中的LCD單元間隙變化及缺陷產生。非均勻性在投影灰 色陰影時特別明!員,因為投影顏色上的輕微不均衡會產生 表現為著色或染色的灰斑。在許多情況下,該[CD上的逐 個區域之投影像素的外觀會逐漸改變。因為外觀上的逐漸 又化員示焦可藉由測量選擇點處的lcd面板之投影 光學傳送功能而改善’而且根據測量結果決定用於該等LCD 87225 2,00415546 面板之對應區域的修正數值。該等修正數值可包括在lcd 面板驅動電子組件中以修正或補償非均勻性。 特定功能積體電路可用以提供此類顯示修正’而且修正 數值可儲存在該顯示系統之一非揮發性記憶體中。在一先 前技術投影機中,- SONY CXD35()3R特定應用積體電路 (application-specific integrated circuit; ASIC)係提供用於 陰影修正。此SONY ASI^儲存在—内部修正表記憶體中 的修正數值用於產生彩色影像所用的三LCD面板之每個所 需的16水平點乘13垂直點之一矩陣。該ASIC包括内部邏輯, 其在該等點之間垂直内插以決定修正數值,並產生三類比 輸出(每個LCD面板一個),該等輸出可與一顯示處理電路(例 如SONY CXA2111E LCD顯示處理器)之亮度輸入(亦稱為放 大器偏壓輸入)連接。該等類比輸入提供類比電壓,該等類 比電壓會改變,因為該顯示器係根據該等儲存修正數值掃 描。應用於該顯示處理器之放大器偏壓輸入的電壓引起可 變偏移加入該等類比視訊輸入數值。例如,增加—正偏移 會引起一相關像素表現稍白。同樣地,增加一負偏移會引 起一顯示像素表現稍黑,而且會減小全白之亮度。 雖然此類系統使顯示外觀可以改善,但是其也表現出許 多缺陷。例如,與一單一列中的像素關聯之修正數值,在 寬度一般為50或更多像素的一區域内為常數,然後對於相 同列中的下__個區域之像素突然改變。雖然類比遽波可應 用於區域邊緣的平滑轉變,但是明顯間斷(例如鄰近水平區 域之間的亮度變化或顏色變化)會保留下來。此外,此類2 87225 200415546 系統只將一正或負偏移應用於影像資料數值,對 i +姑土 q 的光至#亥等相關像素,或者從該等相關 厂、二二固定量的光。可惜使修正具有必要性的該等顯 丁:際來源-般不能採用此方法予以良好地修正。 :用二維即時内插之更複雜區域修正系統可表現出位置 ::::工因纟。該等人工因素表現為分離區域的線條, 、、=區4中修正數值之差異為—或多個灰階而且具有類 :於氣,圖等壓線的一外觀。雖然該等差別微小(可能只有 灰階,或該等影像資料中的i最低有效元位(ieast bit; LSB)段差),但是該等位置差異之規則性質 及问清晰度使其比較明顯。 在許多影像中,明顯位置差異比較微小,而且沒有額外 解析度可用以將該等位置差異捧人該影像。對數位量化問 題的了方法係注人雜訊或顫動該等資料。此類方法可產生 類似於藉由增加可用位元之數量所獲得的結果。但是,將 雜訊加人影像資料會降低影像品f,而且難以產生數位邏 輯中的亂數。 因此’需要改善的顯示方法及裝置。 【發明内容】 顯示修正系、统包括一偏#交錯器,纟係、配置以提供至少 一第一偏移及一第二偏移。一計數器係配置以根據該第— 偏移及該第二偏移識別一第一偏移像素位置及一第二偏移 像素位置,而一處理器係配置以建立與該第一偏移像素位 置關聯的-第-修正數值及與該第二偏移像素位置關聯的 87225 -8 ‘ 200415546 一第二修正數值。在额外範例 ▲人t 、 r —影像組合器係配置以 ,且各人一選擇顯示像素關聯的— 罘一像素數值及該第一修 正數值,並組合與該選擇顯示 ^ 象京關聯的一弟二像辛教禮 及該第二修正數值。在進 冢素數值 〇 代表性範例中,該第—偏 ,订像素、—列像素或數行及數列像 素中的不同位置關聯。左並仙 在其他靶例中,該第一偏移及該第 二偏移係相等並對立。 弟 顯不處理器包括-修正處理器’其係配置以提供與一顧 1聯的修正數值。—偏移交錯器係配置以交替建立至少 弟偏移及-第二偏移,而—修正數值處理器係配置以 提供:該第-偏移及該第二偏移關聯的修正數值。一視訊 &制&係配置以組合與該第—偏移關聯的修正數值及一選 擇像素之—第—像素數值,並組合與該S二偏移關聯的修 正數值及該選擇像素之—第二像素數值。在額外範例中, 該偏移交錯器係配置以提供該第一偏移及該第二偏移,用 於至少複數列像素;而該視訊控制器係配置以組合與該第 一偏移關聯的修正數值及與一列像素關聯的第一組像素數 值,並組合與該第二偏移關聯的修正數值及該列像素之一 第二組像素數值。 影像處理方法包括獲得一像素數值,用於至少一顯示像 素,並建乂與從該顯示像素獲得的一像素偏移關聯之至少 一修正數值。該像素數值及該修正數值係組合在一起。在 :外例中,至少_第一像素數值及—第二像素數值係獲 知用於忒至少一顯示像素。建立一第一修正數值及一第二 87225 -9- 200415546 ::數值:該等修正數值係與從該顯示像素偏移的至少一 二::象:位置及一第二像素位置關聯。該第-修正數值係 二"冑素數值組合’而該第二修正數值係與該第二像 组合。在其他範例中’顯示該第-修正數值與該第 一像素數值之該组入,芬斤 、,口及顯不孩第二修正數值與該第二像 '、=後組合。在額外範例中,該第一像素位置及該第 :素位置係在垂直及水平方向從該至少-顯示像素偏 移0 /示㈣包括—视訊驅動器’其係配置以接收-視訊信 並根據從該視訊信號獲得的影像資料及與至少—修正 2料偏移μ的交錯修正資料之—組合產生—影像信號。 1晶顯示器係配置以接收該影像信號並提供一顯示影 像。在代表性範例中,一記憶體係配置以儲存修正參數, 而内插為係配置以根據該等儲存參數產生修正數值。在 其他範例中,該等修正參數係與複數個顯示區域關聯。在 額外乾例中,該交錯器係配置以產生與—列偏移及_ 移關聯的交Jit i ;备划_ + # L ^ a、,、人亀t正貝料在其他範例中,該等修正資料係 與孩液晶顯示器之區域修正關聯。 ’、 影像修正控制器包括一同步偵測器,其係配置以倩則— 垂^同步信號及一水平同步信號,並分別指示一影像頂部 及一影像側面。一記憶體係配置以儲存至少一第一像素偏 移及-第二像素偏移,而—計數器係配置以制與該第2 偏移關聯的一第一像素及與該第二偏移關聯的一第二像 素。—處理器係配置以產生與該第—偏移像素關聯的 87225 200415546 一修正數值及與該第二偏移像素關聯的—第二修正數值。 -視訊輸出係配置以交替應用該第—修正數值及該第二修 正數值於與沒有偏移的-像素關聯之—影像數值。在代表 性範例中’該處理器根據儲存在—記憶體中的修正區域資 料產生該等第一及第二修正數值。 该等及其他特徵係參考附圖說明如下。 【實施方式】 雖然在-顯示影像中的明顯位置差異可介紹為各種顯示 修正的—結果’但是’顯示方法及系統之範例性具體實施 例係參考以區域為基礎之修正說明如下。此類方法及系統 可結合其他㈣的修正數值(例如列修正、行修正或個別像 素修正)而應用。4了方便’與邏輯「真實(TRUE)」或「虛 假(FALSE)」關聯的邏輯數值係分別指「even㈠禺數)」或 一選擇偏移可用在二或多個連續訊框中,而且可使用—不 同偏移。偏移數值還可在其他f複圖帛中交錯。 「ODD(奇數)」’或「!」或「〇」。在某些範例中,偏移數值 在具有相同大小的正及負數值之間交替。在某些範例中, 在某些範例中’顫動用以定義修正點、修正區域或修正 數值的-協im此顫動在—重案中的每個訊框時 間開始時在垂直、水平或二方向上移動少數像素之修正區 域的格柵。此類方法使位置差異線模糊,但是在某些情況 下可在修正所應用的區域中產生明顯閃爍。該重複圖案有 效地減小該顯示之再新率。 參考圖1 〜像區域100係根據一區域修正協調系統^们 87225 200415546 分成若干區域(例如代表性區域1 02、105)。該等區域一般係 與由一區域高度及一區域寬度識別的一群組像素關聯。該 等區域可方便地選擇成具有一恆定高度及寬度,但是在其 他範例中,區域高度及寬度可因區域不同而變化。例如在 包含約480,000像素的一 SVGA顯示器中,該影像區域1〇〇可 分成16個區域寬乘12個區域高以便該等區域為5〇像素乘5〇 像素。也可採用將該影像區域100分成矩形、方形或其他區 域形狀之不同分割。 基於區域的修正數值之應用係根據在偵測垂直及水平同 步脈衝後計數像素行及列。偵測一垂直同步脈衝之一結束 以指示一訊框開始,並計數一選擇數量的像素行直至達到 一影像頂部。識別該影像頂部後,偵測一下一個水平同步 脈衝以指示一列之一開始。計數一預定數量的像素(像素行) 直至達到該影像之一左邊緣。然後該等修正區域係根據該 影像頂部及該左邊緣映射至該影像上。修正數值係採用該 等區域修正資料決定並應用於該等影像資料。對額外訊框 重複修正區域之此映射。 修正區域至該影像的映射使修正數值可以應用。可採用 各種方法來計算用於每個修正區域1〇5中的像素之修正數 值。在一範例中,用於每個區域中的角落像素之最初數值 係用以内插用於該區域中的剩餘像素之修正數值。一般而 言,一區域中的二像素不會具有相同修正數值。例如,參 考圖1B,一圓形影像區域15〇包括與修正數值_丨、-2、關 聯的區域152至154,其中一修正數值差別丨對應一最小修正 87225 -12- 200415546 數值差別。此類修正數值上的逐步變化產生該等區域i52至 154之間的明顯差別。-般而言,此類影像區域表現出包括 在該等區域⑽154及其他具有不同修正數值的鄰近區域 之邊界處的位置差異線。 此類影像缺陷可以採用圖2中說明的-代表性方法減少、 補償或消除。在步驟2〇2中,—訊框計數器魔赃係指定一 數值「EVEN」’而一訊框之一開始係在一步驟2〇4中偵測, 一般藉由偵測一垂直同步脈衝。在一步驟2〇6中,—垂直偏 移(糟Ucal offset; V0)係從一記憶體中獲得,該記憶體 係配置以儲存-或多個v〇數值。在圖2之範例中,該記憶 體儲存-第一垂直偏移ν〇ι及一第二垂直偏移v〇2,但是在 其他範例中可儲存較少或額外數值。然後在一步驟210中計 數列直至已偵測與該數值v〇關聯的數個列,而且定位一影 像頂部。 / ,識別該影像頂部後,在一步驟212中—列計數器R〇w係指 定數值「EVEN」,而-列之開始係在一步驟2丨4中偵測, 般係根據一水平同步脈衝。在一步驟2丨8中從記憶體 擷取一水平偏移數值(h〇dz〇ntal · H〇)。像素係計數 為β數值H0以在一步騾222中識別一影像左邊緣(「影像左 邊」)在步驟224中決定用於該當前列中的剩餘像素之 〜像修正數值。該等修正數值可從一記憶體226中擷取,或 根據儲存數值(例如與圖1之修正區域關聯的數值)決定。完 成汸選擇列後,在一步驟228中決定該當前訊框包括額外 列。若在該訊框中有更多可用列,則在一步驟216中一列計 87225 -13- 200415546 數器係指定一數值ROW XOR FRAME,而且下一列之處理 又在該步驟2 14中開始。若該訊框已完成而且沒有額外列可 用,則在一步驟230中該訊框計數器FRAME係指定一互補數 值〜FRAME,而且處理在該步驟204中開始。 在該方法200中,區域修正數值係互相交錯。訊框及列係 看作為偶數或奇數。偶數及奇數訊框可指定不同垂直偏移 (VO),而且列可根據該訊框編號FRAME及該列編號ROW之 一 XOR函數(即FRAME XOR ROW)指定不同水平偏移(HO)。 一般採用二大小相等的水平偏移(HC^及H02)。例如, 像素及H02=+3像素。以下表格表示與一第一至一第 四訊框之一第一列及一第二列關聯的代表性垂直及水平偏 移。為了方便,該等第一及第二列及該等第一至第四訊框 係分別識別為列1至2及訊框1至4。雖然垂直偏移只為FRAME 函數,但是水平偏移為FRAME及ROW函數。在此範例中, VO^O,V〇2=+l,叫=-3及H〇2=+3。 87225 -14- 200415546Some displays based on TFT LCD panels have shading correction circuits that compensate for non-uniformities or defects in some LCD panels in other display system components, such as display optical systems. Typical non-uniformities are caused by changes in LCD cell gaps and defects in optical projection systems. Non-uniformity is particularly noticeable when projecting gray shadows! As a slight imbalance in the projected color can produce gray spots that appear as tinted or stained. In many cases, the appearance of the projected pixels per area on the CD will gradually change. Because the appearance gradually changes, the focus can be improved by measuring the projection optical transmission function of the LCD panel at the selected point, and the correction value for the corresponding area of these LCD 87225 2,00415546 panels is determined based on the measurement results. Such correction values may be included in the LCD panel drive electronics to correct or compensate for non-uniformities. Specific function integrated circuits can be used to provide such display corrections' and the correction values can be stored in a non-volatile memory of the display system. In a prior art projector, the SONY CXD35 () 3R application-specific integrated circuit (ASIC) is provided for shading correction. This SONY ASI ^ correction value stored in the internal correction table memory is used to generate a matrix of 16 horizontal dots by 13 vertical dots for each of the three LCD panels used to generate color images. The ASIC includes internal logic that vertically interpolates between these points to determine the correction value and produces three analog outputs (one for each LCD panel). These outputs can be processed with a display processing circuit (such as the SONY CXA2111E LCD display processing) The brightness input (also called amplifier bias input) connection. The analog inputs provide analog voltages, and the analog voltages change because the display is scanned based on the stored correction values. The voltage applied to the bias input of the amplifier of the display processor causes a variable offset to add to these analog video input values. For example, increasing-positive offset will cause a related pixel to appear slightly whiter. Similarly, adding a negative offset will cause a display pixel to appear slightly darker and reduce the brightness of all white. Although such a system allows the display appearance to be improved, it also exhibits many defects. For example, the correction value associated with pixels in a single column is constant in an area where the width is generally 50 or more pixels, and then suddenly changes for the pixels in the next __ area in the same column. Although analog chirps can be applied to smooth transitions at the edges of an area, significant discontinuities (such as changes in brightness or color between adjacent horizontal areas) persist. In addition, this type of 2 87225 200415546 system only applies a positive or negative offset to the value of the image data, from the light of i + Gu Tu q to the relevant pixels such as # 海, or from these related factories, a fixed amount of light . It is a pity that these amendments that made the correction necessary: the international source-generally cannot use this method to make a good correction. : A more complex area correction system using two-dimensional real-time interpolation can show the position :::: 工 因 纟. These artificial factors are shown as the lines of the separation area, and the difference between the correction values in the zone 4 is-or more gray levels-and has an appearance similar to that of isolines such as gas and map. Although these differences are small (may be only grayscale, or the iast bit (LSB) segment difference in the image data), the regular nature and clarity of these position differences make it obvious. In many images, the apparent positional differences are relatively small, and there is no additional resolution available to bring the positional differences to the image. A way to digitally quantify problems is to inject noisy or trembling information. Such methods can produce results similar to those obtained by increasing the number of available bits. However, adding noise to the image data reduces the image quality f, and it is difficult to generate random numbers in digital logic. Therefore, there is a need for an improved display method and device. SUMMARY OF THE INVENTION The display correction system includes a bias #interleaver, which is configured to provide at least a first offset and a second offset. A counter is configured to identify a first offset pixel position and a second offset pixel position based on the first offset and the second offset, and a processor is configured to establish a position with the first offset pixel. An associated-first-corrected value and a second corrected value of 87225-8'200415546 associated with the second offset pixel position. In the additional example ▲ person t, r — the image combiner is configured, and each person selects the display pixel associated — the first pixel value and the first correction value, and combines a brother associated with the selected display ^ Xiangjing Second like Xin Jiaoli and the second correction value. In a representative example of the prime pixel value 〇, the -biased, ordered pixels, -column pixels, or rows and columns of pixels are associated at different positions. Zuo Bianxian In other targets, the first offset and the second offset are equal and opposite. The display processor includes a correction processor 'which is configured to provide a correction value associated with the first look. The -offset interleaver is configured to alternately establish at least a younger offset and a -second offset, and the -correction value processor is configured to provide: a correction value associated with the first offset and the second offset. A video & system is configured to combine a correction value associated with the first offset and a first pixel value of a selected pixel, and combine a correction value associated with the second offset and the selected pixel— The second pixel value. In an additional example, the offset interleaver is configured to provide the first offset and the second offset for at least a plurality of columns of pixels; and the video controller is configured to combine the pixels associated with the first offset. The correction value and the first group of pixel values associated with a column of pixels, and the correction value associated with the second offset and a second group of pixel values of the column of pixels are combined. The image processing method includes obtaining a pixel value for at least one display pixel, and establishing at least one correction value associated with a pixel offset obtained from the display pixel. The pixel value and the correction value are combined. In the external example, at least _ first pixel value and-second pixel value are known to be used for at least one display pixel. A first correction value and a second 87225 -9- 200415546 :: value are established: the correction values are associated with at least one second :: image: position and a second pixel position offset from the display pixel. The first correction value is a " prime value combination " and the second correction value is a combination with the second image. In other examples, the combination of the first correction value and the first pixel value is displayed, and the second correction value of the first and second pixel values is combined with the second image after the second image. In an additional example, the first pixel position and the first: prime position are offset from the at least-display pixel by 0 in the vertical and horizontal directions. / Included-the video driver 'is configured to receive- The image data obtained from the video signal and the interlaced correction data that corrects at least 2 materials offset μ are combined to produce an image signal. A 1-chip display is configured to receive the image signal and provide a display image. In a representative example, a memory system is configured to store correction parameters, and interpolation is a system configuration to generate correction values based on the stored parameters. In other examples, the correction parameters are associated with a plurality of display areas. In an additional dry example, the interleaver is configured to generate the intersection Jit i associated with -column offset and _shift; prepare for _ + # L ^ a, ,, and 亀 t is expected in other examples, the The correction data is related to the area correction of the LCD. ′ The image correction controller includes a sync detector, which is configured with Qian-Zi sync signal and a horizontal sync signal, and indicates a top of the image and a side of the image, respectively. A memory system is configured to store at least a first pixel offset and a second pixel offset, and a counter is configured to make a first pixel associated with the second offset and a first pixel associated with the second offset. Second pixel. The processor is configured to generate a 87225 200415546 correction value associated with the first offset pixel and a second correction value associated with the second offset pixel. -The video output is configured to alternately apply the first correction value and the second correction value to the -image value associated with the -pixel without offset. In a representative example, the processor generates the first and second correction values based on the correction area data stored in the memory. These and other features are described below with reference to the drawings. [Embodiment] Although the obvious position difference in the display image can be introduced as various display corrections—results ”, the exemplary implementation of the display method and system is described below with reference to the correction based on the area. Such methods and systems can be applied in combination with other correction values (such as column correction, row correction, or individual pixel correction). 4 Convenience 'The logical value associated with the logical "TRUE" or "FALSE" refers to the "even number" respectively, or a selection offset can be used in two or more consecutive frames, Use—different offsets. The offset values can also be staggered in other f complex graphs. "ODD (odd number)" 'or "!" Or "〇". In some examples, the offset value alternates between positive and negative values of the same size. In some examples, in some examples, 'tremor' is used to define the correction point, the correction area, or the correction value. This tremor is in the vertical, horizontal, or two directions at the beginning of each frame time in the case. Move up the grid of the correction area for a few pixels. Such methods blur the position difference lines, but in some cases can produce noticeable flicker in the area where the correction is applied. The repeating pattern effectively reduces the refresh rate of the display. Referring to FIG. 1 to FIG. 100, the image area 100 is divided into several areas according to a region correction coordination system 87225 200415546 (for example, representative areas 102 and 105). The regions are generally associated with a group of pixels identified by a region height and a region width. These regions can be conveniently selected to have a constant height and width, but in other examples, the height and width of the region can vary from region to region. For example, in an SVGA display containing about 480,000 pixels, the image area 100 can be divided into 16 areas wide by 12 areas high so that these areas are 50 pixels by 50 pixels. Different divisions of the image area 100 into rectangles, squares, or other area shapes may also be used. The application of area-based correction values is based on counting pixel rows and columns after detecting vertical and horizontal sync pulses. Detecting the end of one of the vertical sync pulses indicates the start of a frame and counts a selected number of pixel rows until it reaches the top of an image. Once the top of the image is identified, a horizontal sync pulse is detected to indicate the start of one of the columns. Count a predetermined number of pixels (pixel rows) until one of the left edges of the image is reached. The corrected regions are then mapped onto the image according to the top and left edges of the image. The correction value is determined using these area correction data and applied to the image data. This mapping is repeated for additional frames. The mapping of the correction area to the image allows correction values to be applied. Various methods can be used to calculate the correction values for the pixels in each correction area 105. In one example, the initial values for the corner pixels in each area are used to interpolate the correction values for the remaining pixels in the area. In general, two pixels in a region will not have the same correction value. For example, referring to FIG. 1B, a circular image area 150 includes areas 152 to 154 associated with the correction values _, -2, and a correction value difference 丨 corresponds to a minimum correction 87225 -12- 200415546 value difference. A gradual change in the value of such a correction produces a noticeable difference between these areas i52 to 154. -In general, such image areas show a line of position difference including the boundaries of these areas ⑽154 and other adjacent areas with different correction values. Such image defects can be reduced, compensated, or eliminated using the representative method illustrated in FIG. 2. In step 202, the frame counter magic is assigned a value "EVEN" and one of the frames is detected in step 204, usually by detecting a vertical synchronization pulse. In a step 206, the vertical offset (Ucal offset; V0) is obtained from a memory configured to store-or a number of v0 values. In the example of FIG. 2, the memory stores a first vertical offset v0m and a second vertical offset v02, but in other examples less or additional values may be stored. The sequence is then counted in step 210 until several sequences associated with the value v0 have been detected, and the top of an image is positioned. /, After identifying the top of the image, in a step 212-the column counter Row is the specified value "EVEN", and the beginning of the-column is detected in a step 2-4, which is generally based on a horizontal synchronization pulse. A horizontal offset value (h0dzontal · H0) is retrieved from the memory in a step 2-8. The pixel system is counted as the β value H0 to identify the left edge of an image ("the left edge of the image") in step 222. In step 224, the image correction value for the remaining pixels in the current column is determined. The correction values may be retrieved from a memory 226 or determined based on stored values (such as values associated with the correction area of FIG. 1). After completing the selection of columns, it is determined in a step 228 that the current frame includes additional columns. If there are more columns available in this frame, then in a step 216 one column counts 87225 -13- 200415546. The counter specifies a value ROW XOR FRAME, and the processing of the next column starts in step 2 14 again. If the frame is complete and no additional columns are available, the frame counter FRAME in step 230 specifies a complementary value ~ FRAME, and processing starts in step 204. In the method 200, the area correction values are interleaved. Frames and columns are treated as even or odd. Even and odd frames can be assigned different vertical offsets (VO), and columns can be assigned different horizontal offsets (HO) based on one of the XOR functions (FRAME XOR ROW) of the frame number FRAME and the column number ROW. Two horizontal offsets of the same size (HC ^ and H02) are generally used. For example, pixels and H02 = + 3 pixels. The following table shows representative vertical and horizontal offsets associated with one of the first and one of the first to fourth frames. For convenience, the first and second columns and the first to fourth frames are identified as columns 1 to 2 and frames 1 to 4, respectively. Although the vertical offset is only the FRAME function, the horizontal offset is the FRAME and ROW functions. In this example, VO ^ O, V〇2 = + 1, called = -3 and H〇2 = + 3. 87225 -14- 200415546

用於四順序訊框中的二列之代表性垂直及水平偏 圖3A至3C表示根教替偏移決定的修正數值之一範例。 在圖3A至3C之範例中,垂直偏移數值並不包括在其中,但 是一般交錯水平偏移係與垂直偏移組合。圖3A表示一顯示 區域310,其包括修正數值可應用於其上的顯示像素之一陣 列。非陰影像素(例如一代表性像素3 12)代表一修正數值「〇」 所應用於其上的像素。陰影像素(例如一代表性像素3 14)代 表一修正數值「-1」所應用於其上的像素。與修正數值「〇」 及「1」關聯的像素之間的一鋸齒狀邊界比較明顯,而且為 了參考’一平滑位置差異3 16係顯示沿該鋸齒狀邊界。為了 方便’修正數值之應用係採用列3 2 〇、3 2 2、3 2 4說明。 圖3B至3C表示根據顫動偏移將修正數值應用於圖3A之顯 示區域3 1 〇的效果。圖3B說明將修正數值應用於一偶數訊框 之情况。用於該等列的水平偏移係如上所述而決定。對於 87225 -15- 200415546 該代表性列320,一相關水平偏移為_3像素,而且用於該列 320的知正數值係向左偏移三像素。如圖所示,該列gw 中的陰影係相對於圖3 A所示的陰影向左偏移3像素。對於該 列322,一相關水平偏移為+3像素,而且用於該列322的修 正數值係向右偏移三像素。如圖3B所示,該列322中的陰影 係就圖3A所示的該列322之陰影向右偏移3像素。剩餘列的 修正類似,水平偏移在-3像素與+3像素之間交替。 奇數訊框之修正係在圖3 C中說明。水平偏移係相對於 偶數訊框而以一相反順序應用。例如,一+3像素之偏移係 應用於該列320 ’而一 -3像素之偏移係應用於該列322。與 孩等偏移關聯的修正數值之應用係顯然為一 3像素右偏移及 一 3像素左偏移。修正數值可以相同方法應用於該等剩餘 列。 又錯、顫動偏移之應用在該灰階位置差異線3 16周圍產生 一顯示區域,在此範例中該位置差異線具有在〇與-;1或約_〇5 义間的一平均灰階修正數值。因此,偏移顫動能增加視區 域修正解析度至小於一顯示系統之一最低有效位元(LSB)的 修正數值。因為該等修正係應用於緊密間隔的列當中,所 以該等修正對於一典型顯示器使用者而言為摻入型,而且 閃爍不明顯。 圖4說明一代表性系統,其係配置以應用此類顯示修正數 值。一視訊接收器402係配置以獲得輸入影像資料,一般為 一視訊信號。一顯示處理器4〇4缓衝該視訊信號並採用一顯 不器之一第一列及行對準該視訊影像。一般而言,該顯示 87225 -16- 處理器包括偏移,令菩低孩办 用於像素之適當列二 定以便該等影像資料係應 尸士 订 同步揭取器406從該視訊輸入獲 仔水千及垂4同步脈衝,而1數絲置料數列及 I ’ 數數值與從—偏移交錯器410獲得的偏移數 值。該計數器決定一 選擇頭不列及/或行已達到後,一修正 處理益提供顯示修左輪 、 ’ 值。一視訊組合器一般接收顯示資 料及修正資料,並輪吴 叩 ^ ^该寺組合影像/修正數值至一顯示 器0 在上述範例中,修正勃枯 I止數值义應用係根據交替、交錯或其Representative vertical and horizontal offsets for two columns in a four-sequence frame. Figures 3A to 3C show an example of the correction values determined by the root offset. In the example of Figs. 3A to 3C, the vertical offset value is not included, but it is a combination of a general staggered horizontal offset system and a vertical offset. Fig. 3A shows a display area 310 including an array of display pixels to which correction values can be applied. Non-shadow pixels (for example, a representative pixel 3 12) represent pixels to which a correction value "0" is applied. A shadow pixel (for example, a representative pixel 3 14) represents a pixel to which a correction value "-1" is applied. A jagged boundary between the pixels associated with the correction values "0" and "1" is relatively obvious, and for reference 'a smooth position difference 3 16 series are shown along the jagged boundary. For the sake of convenience, the application of the correction value is described using columns 3 2 0, 3 2 2, 3 2 4. 3B to 3C show the effect of applying a correction value to the display area 3 1 0 of FIG. 3A according to the flutter offset. Fig. 3B illustrates a case where the correction value is applied to an even frame. The horizontal offsets for these columns are determined as described above. For the representative column 320 of 87225 -15- 200415546, a related horizontal offset is _3 pixels, and the known positive value used for the column 320 is offset three pixels to the left. As shown, the shadow in the column gw is shifted to the left by 3 pixels relative to the shadow shown in FIG. 3A. For this column 322, a correlation horizontal offset is +3 pixels, and the correction value used for this column 322 is offset three pixels to the right. As shown in FIG. 3B, the shadow in the column 322 is offset by 3 pixels to the right from the shadow in the column 322 shown in FIG. 3A. The corrections for the remaining columns are similar, with horizontal offsets alternating between -3 and +3 pixels. The correction of the odd frame is illustrated in FIG. 3C. Horizontal offset is applied in a reverse order with respect to the even frame. For example, an offset of +3 pixels is applied to the column 320 'and an offset of -3 pixels is applied to the column 322. The application of the correction value associated with the child offset is obviously a 3-pixel right offset and a 3-pixel left offset. Corrected values can be applied to these remaining columns in the same way. The application of the wrong and flutter offset generates a display area around the gray level position difference line 3 16. In this example, the position difference line has an average gray level between 0 and-; 1 or about _〇5. Correct the value. Therefore, the offset jitter can increase the viewing area correction resolution to less than a correction value of one of the least significant bits (LSB) of a display system. Because these corrections are applied to closely spaced columns, they are blended for a typical display user and flicker is not noticeable. Figure 4 illustrates a representative system configured to apply such display correction values. A video receiver 402 is configured to obtain input image data, which is generally a video signal. A display processor 400 buffers the video signal and uses a first column and row of a display to align the video image. Generally speaking, the display 87225 -16- processor includes an offset, which allows the Peltier to set the appropriate row for the pixels so that the image data is obtained from the video input by the cadaver synchronous extractor 406. The water pulse and vertical sync pulse are 4 pulses, and the number of filaments and the number of I 'and the offset value obtained from the offset interleaver 410. The counter determines whether a selection header is not listed and / or a row has been reached, and a correction process is provided to display the value of the repair left wheel. A video combiner generally receives display data and correction data, and then combines the image / correction value of this temple to a display device. 0 In the above example, the correction of bleaching is only applied based on alternate, interlaced, or

他各種應用於一協I固系姑Μ A 周系、,无的偏移,該協調系統係用以決定 修正數值。影像資料可繼终一 -行了 ,,fe 1顯不,而該等修正數值可繼續 顫動。 U支術人士應明白該等範例性方法及裝置可進行配置 及、、、田即方面的修改。例&,視訊處理硬體可在(例如)一 FPGA、離散邏輯、—ASIC、—Dsp或其他硬體中實施。或 者’ -通用或其他處理器可配置以採用儲存在—軟碟、“Μ f其他記憶體中的電腦可執行指令提供修正數值。所有該 等内容均包含在所附的申請專利範圍中。 【圖式簡單說明】 圖1為一不思圖,說明與修正數值關聯的一顯示區域分成 若干區域的情況。 圖2為一方塊圖,說明一種決定顯示修正數值的方法。 圖3A至3C說明一顯示器之—部分,修正數值在不顫動情 況下應用於該部分(圖3 A),及修正數值在顫動情況下應用 87225 -17- 200415546 於該部分(圖3B至3C)。 圖4為'一代表性系統之一方塊圖,該代表性系統係配置以 應用顯示修正數值並提供組合顯示資料及影像資料至一顯 示器。 【圖式代表符號說明】 100 影像區域 102 代表性區域 103 區域修正協調系統 105 代表性區域 150 圓形影像區域 152 區域 153 區域 154 區域 220 記憶體 226 記憶體 310 顯示區域 312 代表性像素 314 代表性像素 316 平滑位置差異 320 列 322 列 324 列 402 視訊接收器 404 顯示處理器 87225 -18- 200415546 406 擷取器 408 計數器 410 偏移交錯器 412 修正處理器It is used in a variety of applications, such as a fixed-line system and an undisturbed system. The coordination system is used to determine the correction value. The image data can be continued, and fe 1 is displayed, and these correction values can continue to tremble. U practitioners should understand that these exemplary methods and devices can be modified and modified. For example, the video processing hardware may be implemented in, for example, an FPGA, discrete logic, -ASIC, -Dsp, or other hardware. Or '-a general purpose or other processor can be configured to provide revised values using computer-executable instructions stored in-a floppy disk, "Mf other memory. All such content is included in the scope of the attached patent application." Brief Description of the Drawings] Fig. 1 is a diagram illustrating a case where a display area associated with a correction value is divided into several areas. Fig. 2 is a block diagram illustrating a method for determining a display correction value. Figs. 3A to 3C illustrate one For the display part, the correction value is applied to this part without flutter (Figure 3A), and the correction value is applied to this part (Figures 3B to 3C) in the case of flutter. (Figure 3B to 3C). A block diagram of a representative system that is configured to apply display correction values and provide combined display data and image data to a monitor. [Illustration of Symbols in the Figures] 100 Image Area 102 Representative Area 103 Area Correction Coordination System 105 Representative area 150 Circular image area 152 Area 153 Area 154 Area 220 Memory 226 Memory 310 Display area 312 Table pixels 314 representative of the position difference smoothing pixel 316 320 322 324 402 404 a video receiver display processor 87225-18- extractor 408 200 415 546 406 410 counter offset correction processor interleaver 412

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Claims (1)

200415546 拾、申請專利範圍: 1· 一種顯示修正系統,包括: 一偏移交錯器,其係配置以提供至少一第—偏移及一 第二偏移; 一計數器,其係配置以根據該第一偏移及該第二偏移 識別一第一偏移像素位置及一第二偏移像素位置;及 一處理為,其係配置以建立與該第一偏移像素位置關 本”的第知正數值及與該第二偏移像素位置關聯的一第 二修正數值。 2·如申請專利範圍第丨項之顯示修正系統,進一步包括一影 像組合态,其係配置以組合與一選擇顯示像素關聯的一第 一像素數值及與該第一偏移像素位置關聯的一修正數值, 並組合與該選擇顯示像素關聯的一第二像素數值及與該第 二偏移像素位置關聯的一修正數值。 々申:專利la圍第1項《顯示修正系統,其中該第一偏移 及孩第二偏移係與一行像素中的不同位置關聯。 4·如申凊專利範圍第”頁之顯示修正系統’其中該第—偏移 及孩第二偏移係與一列像素中的不同位置關聯。 5. 如申請專利範園第1項之顯示修正㈣,其中該第-偏移 及该米二偏移係與不同的行與列位置關聯。 6. ::!專利範圍第1項之顯示修正系統,其中該第一偏移 及该罘一偏移係相等並對立。 7· 一種顯示處理器,包括·· 一修正處理器 其係配置以提供與一顯示相關聯的修 87225 200415546 正數值; 偏移又錯器,其係配置以交替建立至少一第一偏移 及一第二偏移; —修正數值處理器,其係配置以提供與該第—偏移及 该第二偏移關聯的修正數值;及 欠-視訊控制器,其係配置合併與該第一偏移關聯的該 t正數值至一選擇像素之一第一像素數值,並合併與該第 二偏移關聯的該修正數值至該選擇像素之—第二像素數 值。 8·如申晴專利範圍第7項之顯示處理器,其中該偏移交錯器 、酉置以楗供該第-偏移及該第二偏移,用於至少複數列 ^ 而該視訊控制咨係配置以組合與該第一偏移關聯的 修=數值及與-列像素關聯的第一組像素數值,並組合與 孩第二偏移關聯的修正數值及該列像素之一第二組像素數 值。 9· 一種影像處理方法,包括: 獲得一像素數值,用於至少一顯示像素; —建上至^/一修正數值,該修正數值係與從該顯示像素 獲得的一像素偏移關聯;及 組合該像素數值及該修正數值。 10·如2專利範圍第9項之方法,其中至少_第—像素數值 及第一像素數值係獲得用於該至少一顯示像素,並 步包括: 建乂第一修正數值及一第二修正數值,該等修正數 87225 *2* 200415546 值係與從該顯示像素偏移的至少一第一像素位置及—第二 像素位置關聯;以及 組合該第一修正數值及該第一像素數值,並組合該第 二修正數值與該第二像素數值。 11.如申請專利範圍第10項之方法’進一步包括顯示該第一修 正數值與該第一像素數值之該組合,及顯示該第二修正數 值與該第二像素數值之該組合。 12土申請專利範圍第1G項之方法,其中該第—像素位置及該 第二像素位置係在垂直及水平方向從該至少一顯示像素偏 移。 —種顯示系統,包括: 視訊驅動器’其係配置以接收一視訊信號,並根據 從該视訊信號獲得的影像資料及與至少一修正資料偏移關 聯的交錯修正資料之一組合產生一影像信號;以及 一欣晶顯示器,其係配置以接收該影像信號並提供一 顯示之影像。 从如申請專利範圍第13項之顯示系統,進一步包括: 一記憶體,其係配置以儲存修正參數;以及 一内插器,其係配置以根據該等儲存參數產生修正 值。 " &如申請專利範圍第14項之顯㈣統,其中該等修正參數係 與複數個顯示區域關聯。 16·如申請專利範圍第13項之方法,其中該交錯器係配置以產 生與一列偏移及一行偏移關聯的交錯修正資料。 87225 -3- 200415546 π·如申請專利範圍第13項之方法,其中該等修正資料係與該 液晶顯示器之區域修正關聯。 18·—種影像修正控制器,包括·· 一同步偵測器,其係配置以偵測一垂直同步信號及一 水平同步信號,並分別指示一影像頂部及一影像側面; 一記憶體,其係配置以儲存至少一第一像素偏移及一 弟一像素偏移; 一計數器,其係配置以根據該偵測到的垂直同步信號 及該偵測到的水平同步信號偵測與該第一偏移關聯的一第 一像素及與該第二偏移關聯的一第二像素; 處理益,其係配置以產生與該第一偏移像素關聯的 一第一修正數值及與該第二偏移像素關聯的一第二修正數 值;以及 一視訊輸出,其係配置以交替應用該第一修正數值及 S第一修正數值於一影像數值。 19·如申請專利範圍第18項之影像修正控制器,其中該處理器 根據儲存在一記憶體中的修正區域資料產生該等第一及第 一修正數值。 87225 -4-200415546 Scope of patent application: 1. A display correction system including: an offset interleaver configured to provide at least a first offset and a second offset; a counter configured to be based on the first An offset and the second offset identify a first offset pixel position and a second offset pixel position; and a process is that it is configured to establish a relationship with the first offset pixel position " Value and a second correction value associated with the position of the second offset pixel. 2. The display correction system according to item 丨 of the patent application range further includes an image combination state configured to be associated with a selected display pixel in combination A first pixel value and a correction value associated with the first offset pixel position, and a second pixel value associated with the selected display pixel and a correction value associated with the second offset pixel position. Yishen: Patent No. 1 "Display Correction System, in which the first offset and the second offset are associated with different positions in a row of pixels. 4 · Rushen Patent Scope" page The display correction system 'wherein the first offset and the second offset are associated with different positions in a row of pixels. 5. For example, the display correction of item 1 of the patent application park, where the-offset and the meter offset are associated with different row and column positions. 6 .: The display correction system of item 1 of the patent scope, wherein the first offset and the first offset are equal and opposite. 7. A display processor comprising: a correction processor configured to provide a positive 87225 200415546 value associated with a display; an offset and error device configured to alternately establish at least a first offset and A second offset; a correction value processor configured to provide a correction value associated with the first offset and the second offset; and an under-video controller configured to merge with the first offset Shift the associated positive t value to a first pixel value of a selected pixel, and merge the corrected value associated with the second offset to one of the selected pixels—a second pixel value. 8. The display processor according to item 7 of Shen Qing's patent scope, wherein the offset interleaver is configured for the first offset and the second offset for at least a complex sequence ^ and the video control consult It is configured to combine the correction value associated with the first offset and the first group of pixel values associated with the-column pixel, and combine the correction value associated with the second offset and the second group of pixels in the column Value. 9. An image processing method comprising: obtaining a pixel value for at least one display pixel;-building up to ^ / a correction value, which is associated with a pixel offset obtained from the display pixel; and a combination The pixel value and the correction value. 10. The method according to item 9 of the patent scope, wherein at least the first pixel value and the first pixel value are obtained for the at least one display pixel, and the steps include: establishing a first correction value and a second correction value The values of the correction numbers 87225 * 2 * 200415546 are associated with at least a first pixel position and a second pixel position shifted from the display pixel; and the first correction value and the first pixel value are combined and combined The second correction value and the second pixel value. 11. The method according to item 10 of the scope of patent application, further comprising displaying the combination of the first correction value and the first pixel value, and displaying the combination of the second correction value and the second pixel value. The method of item 1G in the 12th patent application range, wherein the first pixel position and the second pixel position are offset from the at least one display pixel in the vertical and horizontal directions. A display system comprising: a video driver configured to receive a video signal and generate an image signal based on a combination of image data obtained from the video signal and one of interlaced correction data associated with at least one correction data offset And a Xinjing display, which is configured to receive the image signal and provide a displayed image. The display system according to item 13 of the patent application scope further includes: a memory configured to store correction parameters; and an interpolator configured to generate correction values according to the storage parameters. " & If the display system of the scope of patent application No. 14, the correction parameters are associated with a plurality of display areas. 16. The method of claim 13 in the scope of patent application, wherein the interleaver is configured to generate interlaced correction data associated with a column of offsets and a row of offsets. 87225 -3- 200415546 π. If the method of claim 13 is applied, the correction data is associated with the area correction of the liquid crystal display. 18 · —An image correction controller, including a synchronization detector, which is configured to detect a vertical synchronization signal and a horizontal synchronization signal, and respectively indicate an image top and an image side; a memory, which Is configured to store at least one first pixel offset and one pixel to one pixel offset; a counter configured to detect the first vertical offset signal and the detected horizontal synchronization signal and the first A first pixel associated with the offset and a second pixel associated with the second offset; and a processing benefit configured to generate a first correction value associated with the first offset pixel and the second offset Shifting a second correction value associated with the pixel; and a video output configured to alternately apply the first correction value and the S first correction value to an image value. 19. The image correction controller according to item 18 of the patent application scope, wherein the processor generates the first and first correction values according to the correction area data stored in a memory. 87225 -4-
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