JP4571782B2 - Image processing method and liquid crystal display device using the same - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an image processing method for improving the image quality of an image displayed on a display device, and a liquid crystal display device using the image processing method.
[0002]
[Prior art]
In recent years, an active matrix liquid crystal display device (hereinafter referred to as “TFT-LCD”) including a thin film transistor (TFT) as a switching element has been widely used for various display applications. Under such circumstances, it is desired to improve the display quality of the TFT-LCD. In particular, there is a demand for a TFT-LCD having a wide viewing angle capable of obtaining a good display even when the screen is viewed from an oblique direction.
[0003]
An MVA (Multi-domain Vertical Alignment) type liquid crystal display device has been put to practical use as a wide viewing angle TFT-LCD. The MVA-LCD has an overwhelmingly wide viewing angle compared to a TN (twisted nematic) type LCD or the like. However, the MVA-LCD has a problem that the luminance of the halftone increases when the screen displaying the halftone is observed from the diagonal directions of the top, bottom, left and right. For example, when a human face is displayed, the color that should originally be a skin color becomes a white and smooth color when viewed from an oblique direction up, down, left, or right with respect to the screen normal.
[0004]
In order to solve this phenomenon, a halftone driving technique (hereinafter referred to as “HT driving”) is known. When displaying a color of a certain gradation in the HT drive, a display brighter than the original luminance and a display darkened are alternately displayed every frame, and the original color is displayed by the afterimage effect of human eyes. It is a technique.
[0005]
[Problems to be solved by the invention]
By the way, it has been a concern to display a video signal input from the system side by an interlace method on a liquid crystal display device by HT driving. In a normal television display, interlaced driving is used in which video data is combed and an odd line display and an even line display are alternately displayed in order to save a broadcast band. FIG. 28 schematically shows a video signal transmission procedure in the interlace method. In the interlace system, first, video signals O11 to O15 (for five lines are illustrated for the first odd-numbered (Odd) field O1. The same applies hereinafter) are transmitted from the transmission side to the television receiver. Subsequently, the video signals E11 to E15 for the first even field E1 are sequentially sent, the video signals O21 to O25 for the second odd field O2 are then sent, and then the second even number. Station increase signals E21 to E25 for field E2 are sent.
[0006]
FIG. 29 schematically shows a state in which an image is displayed on a CRT (Cathode Ray Tube) using the interlace video signal shown in FIG. First, the video signal O11 for the first odd field O1 is written to the top (first line) of the horizontal line, and the video signals O12 to O15 are sequentially written to the subsequent odd lines. At this time, the video signal is not written to the even lines E11 to E15. Since the CRT is a self-luminous display device, the even lines E11 to E15 become the black display 105. Thus, the odd field O1 is displayed.
[0007]
Next, the video signal E11 for the first even field E1 is written to the second horizontal line, and the video signals E12 to E15 are sequentially written to the subsequent even lines. At this time, the video signal is not written to the odd lines O11 to O15, and the black display 105 is obtained. In this way, the even field E1 is displayed.
[0008]
The first odd field O1 and the first even field E1 constitute a first frame, and one screen is displayed by writing the first frame. In the same manner, images after the second frame are also displayed.
[0009]
FIG. 30 schematically shows a general method for displaying an image on a TFT-LCD using the interlaced video signal shown in FIG. First, the video signal O11 for the first odd frame f1 is written to the top (first line) of the horizontal line, and the video signals O12 to O15 are sequentially written to the subsequent odd lines. In the odd frame f1, the interpolated video signal SD generated based on the video signals O1n and O1n + 1 of the preceding and following odd lines adjacent to each even line is written in the second and subsequent even lines.
[0010]
Next, the video signal E11 for the first even frame f2 is written to the second line, and the video signals E12 to E15 are sequentially written to the subsequent even lines. In this even frame f2, an interpolated video signal SD generated based on the video signals E1n and E1n + 1 of the preceding and following even lines adjacent to each odd line is written in each odd line. For example, the video signal E11 is written for the first line. Similarly, images of the second and subsequent odd frames f (2n + 1) and even frames f (2n) are sequentially displayed.
[0011]
However, when an image is displayed on the TFT-LCD by the display method as shown in FIG. 30, there is a drawback that the amount of information originally included in the video signal is reduced. Although the amount of information is increased by writing the interpolated video signal SD in the non-written line, the information is only inaccurate information that is predicted. In the writing of the odd frame f (2n + 1), the true video signal to be written to the even line is erased, and the same applies to the even frame f (2n). Therefore, the erased information corresponds to half of the entire information. End up.
[0012]
An object of the present invention is to provide an image processing method capable of displaying an image having a wide viewing angle and excellent color reproducibility even when an interlace video signal is input, and a liquid crystal display device using the image processing method.
[0013]
[Means for Solving the Problems]
The above object is to generate high gradation side data and low gradation side data from an image signal input in an interlaced manner, and the high gradation side data and the low gradation side data are at least one of temporal and spatial. This is achieved by an image processing method characterized in that the image is mixed and displayed.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
[First Embodiment]
An image processing method and a liquid crystal display device using the image processing method according to the first embodiment of the present invention will be described with reference to FIGS. The image processing method according to the present embodiment is characterized in that an improved halftone driving technique is used when an interlace video signal is input to an MVA-LCD to display an image.
The operation principle of the image processing method according to this embodiment will be described with reference to FIG. FIG. 1 schematically shows a method for displaying an image on the MVA-LCD, taking the interlace video signal shown in FIG. 28 as an example.
[0015]
First, a video signal O11H having a higher luminance than the original gradation is generated for the first odd-numbered frame f1 video signal O11 and written to the head (first line) of the horizontal line. Next, an interpolated video signal SDL with a lower luminance than the video signal O11 is generated and written to the second line. Video signals having higher luminance than the original gradation are generated and written to the odd lines after the third line, respectively, and for the even lines after the fourth line, the luminance of the adjacent odd lines in the previous stage is determined. A low interpolated video signal SDL is generated and written.
[0016]
When the image of the first odd-numbered frame f1 is displayed, an interpolated video signal SDL having a lower luminance than the video signal E11 for the first even-numbered frame f2 is generated and written to the first line. Next, a video signal E11H having a higher luminance than the original gradation is generated for the video signal E11 and written to the second line. Also for the even lines after the fourth line, video signals having higher luminance than the original gradation are generated and written respectively, and for the odd lines after the third line, the luminance of the adjacent even lines in the subsequent stage is determined. A low interpolated video signal SDL is generated and written.
[0017]
Similarly, images of the second and subsequent odd frames f (2n + 1) and even frames f (2n) are sequentially displayed. By performing the image display method according to the present embodiment, HT drive can be performed temporally and spatially, and therefore, when an interlace video signal is input and displayed on the MVA-LCD, a wide viewing angle is obtained. Image display with excellent color reproducibility is possible.
[0018]
[First driving method]
Next, in the image processing method according to the present embodiment, a first driving method for displaying an interlace video signal on a liquid crystal display device using HT driving will be described. FIG. 2 schematically shows a method for displaying an image on the MVA-LCD, taking the interlace video signal shown in FIG. 28 as an example. In FIG. 2, the symbol O represents an odd frame (Odd frame), the symbol E represents an even frame (Even frame), the symbol H represents that the luminance is higher than the original gradation, and the symbol L represents the original frame. This means that the luminance is lower than the gradation. Further, the two subscripts following the symbol O represent the frame order for odd frames and the line order for odd lines. The two subscripts following the symbol E represent the frame order for even frames and the line order for even lines. For example, “O21H” indicates that the video signal of the first line of the second odd-numbered frame is written with the brightness higher than the original gradation of the pixel.
[0019]
First, a video signal O11H having a higher luminance than the original gradation is generated for the first odd-numbered frame f1 video signal O11 and written to the head (first line) of the horizontal line. Next, an interpolated video signal O11L having a lower luminance than the video signal O11 is generated and written to the second line so that the combined luminance with the generated video signal O11H is substantially equal to the luminance generated by the video signal O11. For the odd lines after the third line, the video signals O1nH having higher luminance than the original gradation are generated and written respectively, and for the even lines after the fourth line, the luminance of the adjacent odd lines in the previous stage is written. A lower interpolation video signal O1nL is generated and written.
[0020]
When the image of the first odd frame f1 is displayed, a video signal E11H having a higher luminance than the original gradation is generated with respect to the video signal E11 for the first even frame f2. An interpolated video signal E11L having a luminance lower than that of the video signal E11 is generated and written to the first line so that the synthesized luminance with the generated video signal E11H is substantially equal to the luminance generated by the video signal E11. The video signal E11H is written to the second line. The video signals E1nH having higher luminance than the original gradation are generated and written to the even lines after the fourth line, respectively, and the luminance of the adjacent even lines in the subsequent stage is written to the odd lines after the third line. A lower interpolation video signal E1nL is generated and written.
[0021]
Similarly, images of the second and subsequent odd frames f (2n + 1) and even frames f (2n) are sequentially displayed. By performing the image display method according to the present embodiment, HT drive can be performed temporally and spatially, and therefore, when an interlace video signal is input and displayed on the MVA-LCD, a wide viewing angle is obtained. Image display with excellent color reproducibility is possible. Note that the combination of raising or lowering the original luminance when writing video signals to odd lines and even lines is not limited to the above, and can be changed as appropriate when an image is displayed on the MVA-LCD.
[0022]
[Second Driving Method]
Next, in the image processing method according to the present embodiment, a second driving method for displaying an image based on an interlaced video signal on the MVA-LCD using HT driving will be described. This driving method is characterized in that the luminance is changed from the original gradation for odd-numbered column lines and even-numbered column lines. FIG. 3 shows a second driving method, in which 16 pixels of (first to fourth) rows × (first to fourth) columns in an n-row × m-column pixel region of the MVA-LCD are arranged. Illustrated. In FIG. 3 and subsequent figures, symbol O represents an odd frame (Odd frame), symbol E represents an even frame (Even frame), symbol H represents that the luminance is higher than the original gradation, and symbol L is originally This means that the luminance is lower than the gray level. Further, the three subscripts following the symbol O indicate the frame order in the odd frame, the line order io in the odd horizontal line, and the line order j in the odd vertical line. The three subscripts following the symbol E indicate the frame order in even frames, the line order ie in even horizontal lines, and the line order j of odd vertical lines. For example, “O213H” is the second odd frame, and the video signal of i = 1 for the odd horizontal line and j = 3 for the vertical line is written with higher brightness than the original gradation of the pixel. It shows that.
[0023]
3, in the first odd-numbered frame f1, it is described as a pixel in the even-numbered horizontal line ie row and (2j-1) column (hereinafter referred to as pixel (ie, (2j-1)). Is the line order in even horizontal lines, ie = 1, 2,..., (N−1) / 2, n / 2, and j = 1, 2,. The video signal O1io (2j-1) for the pixel (io, (2j-1)) in the odd-numbered horizontal line io row in the preceding stage is used for the video signal of (/ 2, m / 2). Here, io is the line order in odd horizontal lines, and io = 1, 2,..., (N−1) / 2, n / 2. The video signal O1io (2j) for the previous pixel (io, 2j) is used for the video signal of the pixel (ie, 2j).
[0024]
In addition, the video signal O1io (2j-1) H having a higher luminance than the original gradation of the video signal O1io (2j-1) is written into the pixel (io, (2j-1)). On the other hand, the video signal O1io (2j-1) L having a lower luminance than the original gradation of the video signal O1io (2j-1) is written to the pixel (ie, (2j-1)).
[0025]
In addition, a video signal O1io (2j) L having a lower luminance than the original gradation of the video signal O1io (2j) is written into the pixel (io, (2j)). On the other hand, the video signal O1io (2j) H having a higher luminance than the original gradation of the video signal O1io (2j) is written into the pixel (ie, (2j)).
[0026]
Therefore, the luminance of the video signal written to each pixel is such that the pixels whose luminance is higher than the original luminance and the pixels whose luminance is lowered are arranged in a vertical and horizontal alternate (checkered pattern).
[0027]
Next, in the first even frame f2, the video signal E1ie (2j-1) for the subsequent pixel (ie, (2j-1)) is included in the video signal of the pixel (io, (2j-1)). ) Is used. Further, the video signal E1ie (2j) for the subsequent pixel (ie, 2j) is used as the video signal of the pixel (io, 2j).
[0028]
In addition, a video signal E1ie (2j-1) L having a lower luminance than the original gradation of the video signal E1ie (2j-1) is written into the pixel (io, (2j-1)). On the other hand, the video signal E1ie (2j-1) H having a higher luminance than the original gradation of the video signal E1ie (2j-1) is written into the pixel (ie, (2j-1)).
[0029]
In addition, the video signal E1ie (2j) H whose luminance is higher than the original gradation of the video signal E1ie (2j) is written into the pixel (io, (2j)). On the other hand, the video signal E1ie (2j) L having a lower luminance than the original gradation of the video signal E1ie (2j) is written into the pixel (ie, (2j)).
[0030]
Therefore, the luminance of the video signal written to each pixel is such that the pixels whose luminance is higher than the original luminance and the pixels whose luminance is lowered are arranged in a vertical and horizontal alternate (checkered pattern). By applying this driving method to the second odd-numbered frame f3, the second even-numbered frame f4, and the subsequent frames in the same manner, an image display with a wide viewing angle and excellent color reproducibility can be achieved. It becomes possible.
[0031]
[Third driving method]
Next, in the image processing method according to the present embodiment, a third driving method for displaying an image based on an interlaced video signal on an MVA-LCD using HT driving will be described with reference to FIG. FIG. 4 schematically shows a method for displaying an image on the MVA-LCD, taking the interlace video signal shown in FIG. 28 as an example.
[0032]
First, video signals O11H to O15H having higher luminance than the original gradation are generated with respect to the video signals O11 to O15 for the first odd frame f1, and the original display line is started from the head of the horizontal line (first line). Are written sequentially.
[0033]
When the image of the first odd-numbered frame f1 is displayed, next, in the first even-numbered frame f2, the video signals E11H to E11H to which the luminance is higher than the original gradation with respect to the video signals E11 to E15 for the even-numbered frame f2. E15H is generated, and the video signals O11L to O15L having lower luminance than the original gradation are generated for the video signals O11 to O15 for the first odd frame f1, and these video signals O11L are generated on a predetermined horizontal line. To O15L and video signals E11H to E15H are sequentially written on predetermined horizontal lines.
[0034]
When the image of the first even-numbered frame f2 is displayed, next, in the second odd-numbered frame f3, the video signal O21H to which the luminance is higher than the original gradation with respect to the video signals O21 to O25 for the odd-numbered frame f3. O25H is generated, and the video signals E11L to E15L whose luminance is lower than the original gradation are generated for the video signals E11 to E15 for the first even frame f2, and these video signals E11L are generated on a predetermined horizontal line. To E15L and video signals O21H to O25H are sequentially written in predetermined horizontal lines.
[0035]
When the image of the second odd-numbered frame f3 is displayed, next, in the second even-numbered frame f4, the video signal E21H ~ whose luminance is higher than the original gradation with respect to the video signals E21-E25 for the even-numbered frame f4. E25H is generated, and video signals O21L to O25L with lower luminance than the original gradation are generated for the video signals O21 to O25 for the second odd frame f3, and these video signals O21L are generated on a predetermined horizontal line. ˜O25L and video signals E21H to E25H are sequentially written on predetermined horizontal lines.
[0036]
As described above, the video signal Okio (k = 1, 2, 3, 4,...) And the video signal Ekie are sent with a delay of one frame, but the video signal to be originally written is written to the odd and even lines. Can write. Furthermore, the video signal whose luminance is higher than the original luminance and the video signal whose luminance is lowered can be written alternately. In this way, HT driving can be performed temporally and spatially.
[0037]
[Fourth Driving Method]
Next, in the image processing method according to the present embodiment, a fourth driving method for displaying an image based on an interlaced video signal on an MVA-LCD using HT driving will be described with reference to FIG. FIG. 5 shows a fourth driving method, in which 16 pixels of (first to fourth) rows × (first to fourth) columns in an n-row × m-column pixel region of the MVA-LCD are arranged. Illustrated.
[0038]
First, a video signal O1io (2j-1) H having a higher luminance than the original gradation is generated for the video signal O1io (2j-1) for the first odd frame f1, and the video signal O1io (2j) is generated. On the other hand, the video signal O1io (2j) L having a lower luminance than the original gradation is generated, the video signal O1io (2j-1) H is written to the pixel (io, (2j-1)), and the video signal O1io (2j) is written. ) Write L to pixel (io, 2j).
[0039]
When the image of the first odd frame f1 is displayed, next, the video signal E1ie (2j−) whose luminance is higher than the original gradation with respect to the video signal E1ie (2j−1) for the first even frame f2. 1) Generate H, and generate a video signal E1ie (2j) L having a lower luminance than the original gradation with respect to the video signal E1ie (2j). At the same time, a video signal O1io (2j-1) L having a lower luminance than the original gradation is generated for the video signal O1io (2j-1) for the first odd frame f1, and the video signal O1io (2j) is generated. In contrast, a video signal O1io (2j) H having a higher luminance than the original gradation is generated.
[0040]
The video signal O1io (2j-1) L is written to the pixel (io, (2j-1)), the video signal O1io (2j) H is written to the pixel (io, 2j), and the video signal E1ie (2j-1) is written. ) H is written to the pixel (ie, (2j-1)), and the video signal E1ie (2j) L is written to the pixel (ie, (2j)).
[0041]
When the image of the first even-numbered frame f2 is displayed, the video signal o2io (2j−) whose luminance is higher than the original gradation with respect to the video signal O2io (2j-1) for the second odd-numbered frame f3. 1) Generate H, and generate a video signal O2io (2j) L having a lower luminance than the original gradation for the video signal o2io (2j). At the same time, a video signal E1ie (2j-1) L having a lower luminance than the original gradation is generated for the video signal E1ie (2j-1) for the first even frame f2, and the video signal E1ie (2j) is generated. On the other hand, a video signal E1ie (2j) H having a higher luminance than the original gradation is generated.
[0042]
The video signal O2io (2j-1) H is written to the pixel (io, (2j-1)), the video signal O2io (2j) L is written to the pixel (io, 2j), and the video signal E1ie (2j-1) is written. ) L is written to the pixel (ie, (2j-1)), and the video signal E1ie (2j) H is written to the pixel (ie, (2j)).
[0043]
When the image of the second odd frame f3 is displayed, next, the video signal E2ie (2j−) whose luminance is higher than the original gradation with respect to the video signal E2ie (2j−1) for the second even frame f4. 1) H is generated, and a video signal E2ie (2j) L having a luminance lower than the original gradation with respect to the video signal E2ie (2j) is generated. At the same time, a video signal O2io (2j-1) L having a lower luminance than the original gradation is generated for the video signal O2io (2j-1) for the second odd frame f3, and the video signal O2io (2j) is generated. In contrast, a video signal O2io (2j) H having a higher luminance than the original gradation is generated.
[0044]
Then, the video signal O2io (2j-1) L is written into the pixel (io, (2j-1)), the video signal O2io (2j) H is written into the pixel (io, 2j), and the video signal E2ie (2j-1). ) H is written to the pixel (ie, (2j-1)), and the video signal E2ie (2j) L is written to the pixel (ie, (2j)).
[0045]
In the write operation, the odd line video signal Okioj is written to the odd lines, and the even line video signal Ekiej is written to the even lines.
For example, paying attention to the pixel 2, the video signal O114H for increasing the luminance from the original luminance and the video signal O114L for decreasing the luminance are written over two frames.
The odd line starts the write operation from the odd frame f1 to which the video signal O1ioj for the odd line is sent, and the even line starts the write operation from the even frame f2 to which the video signal E1iej for the even line is sent. Therefore, the phase is shifted by one frame between the odd line writing and the even line writing. Note that when viewed on the entire screen, the luminance of the video signal written to each pixel is such that the pixels whose luminance is higher than the original luminance and the pixels whose luminance is lower are arranged vertically and horizontally (checkered pattern).
[0046]
[Effects of the first to fourth driving methods]
When the first driving method described with reference to FIG. 2 is used, there is no video signal that can be discarded. Further, since the pixels whose brightness is increased and the pixels whose brightness is lower than the original gradation are alternately arranged for each line, flicker does not occur. As shown in FIG. 2, the odd-numbered video signal OkioH (or OkioL) whose luminance is higher (or lower) than the original gradation of the odd-numbered video signal Okio is always written to the odd-numbered lines, and the even-numbered lines are even-numbered lines. The video signal EkieL (or EkieH) whose luminance is lowered (or increased) from the original gradation of the video signal Ekie for use is always written. In this case, a display with an increased brightness, which is the center of the display screen, is written in the originally written pixel, so that a decrease in resolution is minimized. Furthermore, as in the second driving method described with reference to FIG. 3, it is also possible to alternately arrange pixels whose luminance is increased and pixels whose luminance is lower than the original gradation on the entire screen. The level of brightness in the display becomes a checkered pattern, flicker is not visually recognized, and special display defects such as horizontal stripes can be prevented.
[0047]
Although the video signals themselves are not discarded in the second and second driving methods described in FIGS. 2 and 3, the information to be written in the odd lines is also written in the even lines, so that the definition of the image may be reduced. have.
[0048]
When the third driving method described with reference to FIG. 4 is used, the video signal is not discarded at all, and the video signal Okio for the odd lines is always displayed on the odd lines, and the video signal Ekie for the even lines is always displayed on the even lines. As a result, the resolution does not deteriorate. Furthermore, flicker does not occur because pixels with higher and lower luminance than the original luminance are alternately displayed for each line. In addition, when only one line is viewed, pixels with increased brightness and lowered pixels are alternately displayed, so that a display with no sense of incongruity is obtained.
[0049]
In the fourth driving method described with reference to FIG. 5, it is possible to arrange pixels whose luminance is higher and lower than that of the original luminance in the entire screen alternately in the vertical and horizontal directions. The level of brightness in the display becomes a checkered pattern, flicker is not visually recognized, and special display defects such as horizontal stripes can be prevented, resulting in a display screen with higher quality.
[0050]
[Example of First Driving Method]
FIG. 6 shows a flowchart of an image display operation for one frame in the first driving method. First, it is determined whether the signal format input to the liquid crystal display device is interlaced or non-interlaced (step S1). If the signal format is a non-interlace method, signal processing is performed using a different menu (step S2). Note that description of step S2 is omitted. When the signal format is interlaced, refer to the gradation conversion table for each pixel, and when converting the converted video signal (hereinafter referred to as the “high luminance side video signal”) and the luminance when the luminance is increased from the original luminance The converted video signals (hereinafter referred to as “low luminance side video signals”) are created, and the created video signals are stored in the line memory (step S3).
[0051]
Next, it is determined whether the frame is an odd frame or an even frame (step S4). If it is determined that the frame is an odd frame, the high luminance side video signal is written to the odd line (step S5). Next, the low luminance side video signal is written to the even lines (step S6). On the other hand, if it is determined in step S4 that the frame is an even frame, the low luminance side video signal is written to the odd line (step S7), and then the high luminance side video signal is written to the even line (step S8). An image is displayed on the liquid crystal display device based on the written video signal (step S9), and the image display for one frame is completed. Note that the display operation for the next frame is repeated from step S3.
[0052]
By this operation, odd-numbered high-luminance video signals are written in odd-numbered lines, and even-numbered high-luminance video signals are written in even-numbered lines. Since the high-luminance video signal is strongly recognized by the human eye as a factor that determines the resolution, a decrease in resolution can be minimized. Note that the combination of the high luminance side and low luminance side video signals written in the odd and even frames may be changed. Of course, the combination may be changed for each frame.
[0053]
[Example of Second Driving Method]
FIG. 7 shows a flowchart of an image display operation for one frame in the second driving method. First, it is determined whether the signal format input to the liquid crystal display device is interlaced or non-interlaced (step S11). If the signal format is a non-interlace format, signal processing is performed using a different menu (step S12). Note that description of step S12 is omitted. If the signal format is interlaced, a high-luminance video signal and a low-luminance video signal are created by referring to the gradation conversion table for each pixel, and the created video signals are stored in the line memory (step S13). ).
[0054]
Next, it is determined whether the frame is an odd frame or an even frame (step S14). When it is determined that the frame is an odd frame, the high-luminance video signal and the low-luminance video signal are alternately written to each pixel that is a set of red, green, and blue (RGB) on the odd lines (step S15). In step S15, the high luminance side video signal is written to each pixel at the beginning of writing in each odd line. Next, the low gradation side video signal and the high luminance side video signal for odd lines are alternately written to each pixel in which RGB of even lines is a set (step S16). In step S16, the low luminance side video signal is written to the first pixel of each even line.
[0055]
On the other hand, if it is determined that the frame is an even frame, the low-luminance video signal and the high-luminance video signal for the even line are alternately written to each pixel in which the RGB of the odd line is a set (step S17). In step S17, the low luminance side video signal is written to each pixel at the beginning of writing in each odd line. Next, the high-luminance video signal and the low-luminance video signal are alternately written into each pixel, which is a set of even-line RGB (step S18). In step S18, the high luminance side video signal is written to the first pixel of each even line. An image is displayed on the liquid crystal display device based on the written video signal (step S19), and one-frame image display ends. Note that the display operation for the next frame is repeated from step S13.
[0056]
With this operation, the high-luminance video signal and the low-luminance video signal are alternately displayed on the display screen by pixels adjacent vertically and horizontally. Furthermore, the high luminance side video signal and the low luminance side video signal are alternately displayed on each pixel for each frame. Therefore, each pixel displays the high luminance side and low luminance side video signals alternately in both space and time.
In the odd frame, since the video signal for the odd line is displayed by a predetermined pixel, there is no spatial and temporal shift. However, since the video signal for odd lines is displayed on the even lines, the resolution deteriorates. Note that the combination of the high luminance side and low luminance side video signals written in the odd and even frames may be changed. Of course, the combination may be changed for each frame.
[0057]
[Example of Third Driving Method]
FIG. 8 shows a flowchart of an image display operation for one frame in the third driving method. First, it is determined whether the signal format input to the liquid crystal display device is interlaced or non-interlaced (step S21). If the signal format is a non-interlace format, signal processing is performed using another menu (step S22). Note that description of step S22 is omitted. When the signal format is the interlace system, the high luminance side video signal and the low luminance side video signal are created with reference to the gradation conversion table for each pixel (step S23).
[0058]
Next, it is determined whether the frame is an odd frame or an even frame (step S24). If it is determined that the frame is an odd frame, the high-luminance and low-luminance video signals created in step S23 are stored in the frame memory Odd (step S25). Next, the high-luminance video signal stored in the frame memory Odd is written to the odd lines (step S26). Next, the low luminance side video signal stored in the frame memory Even is written to the even lines (step S27). At this time, the frame memory Even stores the high-luminance and low-luminance video signals created in the even frame one frame before the odd frame.
[0059]
On the other hand, if it is determined that the frame is an even frame, the high luminance side and low luminance side video signals created in step S23 are stored in the frame memory Even (step S28). Next, the low-luminance video signal stored in the frame memory Odd is written to the odd lines (step S29). At this time, the frame memory Odd stores the high-luminance and low-luminance video signals generated in the odd frame one frame before the even frame. Next, the high luminance side video signal stored in the frame memory Even is written to the even lines (step S30). An image is displayed on the liquid crystal display device based on the written video signal (step S31), and one frame image display is completed. The display operation for the next frame is repeated from step S23.
[0060]
In the description of FIG. 8, in the odd (or even) frame, the high-luminance video signal is written to the odd line (or even line), and the even (or odd) frame one frame before the odd (or even) frame is written. The image display is performed by writing the low luminance side video signal to the even lines (or odd lines). However, the low luminance side video signal is written to the odd line (or even line) in the odd (or even) frame, and the high luminance side video signal of the even (or odd) frame one frame before the odd (or even) frame is written. May be written on even lines (or odd lines) for image display. The description of even lines and odd lines can also be interchanged. Of course, the combination of writing methods may be changed for each frame.
[0061]
[Example of Fourth Driving Method]
FIG. 9 shows a flowchart of an image display operation for one frame in the fourth driving method. First, it is determined whether the signal format input to the liquid crystal display device is interlaced or non-interlaced (step S41). If the signal format is a non-interlace format, signal processing is performed using another menu (step S42). Note that description of step S42 is omitted. If the signal format is interlaced, a high luminance side video signal and a low luminance side video signal are created by referring to the gradation conversion table for each pixel (step S43).
[0062]
Next, it is determined whether the frame is an odd frame or an even frame (step S44). If it is determined that the frame is an odd frame, the high luminance side and low luminance side video signals created in step S43 are stored in the frame memory Odd (step S45). Next, the high-luminance video signal stored in the frame memory Odd is written to the odd lines. At this time, the high-luminance video signal and the low-luminance video signal are alternately written to each pixel of the odd-numbered RGB as a set (step S46). In step S46, the high luminance side video signal is written to the first pixel of each odd line. Next, the high luminance side and low luminance side video signals stored in the frame memory Even are written to the even lines. At this time, the low-luminance video signal and the high-luminance video signal are alternately written to each pixel in which the even-line RGB is a set (step S47). In step S47, the low luminance side video signal is written to the first writing pixel of each even line. The frame memory Even stores the high-luminance and low-luminance video signals generated in the even frame one frame before the odd frame.
[0063]
On the other hand, when it is determined that the frame is an even frame, the high luminance side and low luminance side video signals created in step S43 are stored in the frame memory Even (step S48). Next, the low luminance side video signal stored in the frame memory Odd is written to the odd lines. At this time, the low-luminance video signal and the high-luminance video signal are alternately written into each pixel of the odd-numbered RGB as a set (step S49). In step S49, the low luminance side video signal is written to each pixel at the beginning of writing in each odd line. The frame memory Odd stores the high-luminance and low-luminance video signals created in the odd frame one frame before the odd frame. Next, the high luminance side and low luminance side video signals stored in the frame memory Even are written to the even lines. At this time, the high-luminance video signal and the low-luminance video signal are alternately written to each pixel, which is a set of even-line RGB (step S50). In step S50, the high luminance side video signal is written to the first pixel of each of the even lines. An image is displayed on the liquid crystal display device based on the written video signal (step S51), and one frame image display is completed. Note that the display operation of the next frame is repeated from step S43.
[0064]
In the description of FIG. 9, each pixel has RGB as one set, but the present invention is not limited to this, and the high luminance side and low luminance side video signals may be alternately displayed for each of R, G, and B. In addition, as to whether to start writing each line as a high-luminance video signal or a low-luminance video signal, the above description is not limited as long as the pixels adjacent to each other vertically and horizontally are different. The description of even lines and odd lines can also be interchanged. Of course, the combination of writing methods may be changed for each frame.
[0065]
In the above embodiment, the driving method when the resolution of the input video signal and the display screen is the same has been described. Here, an image display method when the resolution of the input video signal and the display screen is different will be described. FIG. 10 is a diagram for explaining an image display method using HT driving when the resolution of the input video signal and the display screen is different. In the following description, an example in which the screen has double resolution both vertically and horizontally with respect to the input video signal will be described. FIG. 10A is a conceptual diagram of the input video signal 13 for one pixel.
The one-pixel input video signal 13 is written to four pixels of the display screen. Therefore, as shown in FIG. 10B, the high luminance side video signal 14 and the low luminance side video signal 15 are written so that the luminance of adjacent pixels is different. At this time, the writing pixels of the high luminance side video signal 14 and the low luminance side video signal 15 are reversed in the odd-numbered frame pixels 16 and the even-numbered frame pixels 17. Therefore, the high luminance side video signal 14 and the low luminance side video signal 15 are alternately displayed spatially and temporally.
[0066]
FIGS. 10C and 10D show an example in which the image display method is performed on RGB pixels. The input video signal 18 having a set of RGB is written into four pixels of the display screen. As shown in FIG. 10 (d), the high luminance side video signal 19 and the low luminance side video signal 20 are written alternately for each pixel of RGB, and the luminance of adjacent pixels is made different. Further, the pixels written in the high luminance side video signal 19 and the low luminance side video signal 20 are reversed in the pixels 21 of the odd frames and the pixels 22 of the even frames. Therefore, the high luminance side video signal 19 and the low luminance side video signal 20 are alternately displayed spatially and temporally. As a result, it is possible to display a natural and non-white image without flicker.
[0067]
As described above, according to the present embodiment, it is possible to realize an image processing method having a wide viewing angle and excellent color reproducibility even when an interlace video signal is input, and a liquid crystal display device using the image processing method.
[0068]
[Second Embodiment]
An image processing method according to a second embodiment of the present invention, a liquid crystal display device using the image processing method, and a driving method of the liquid crystal display device will be described with reference to FIGS. In recent years, liquid crystal display devices are widely used in notebook personal computers, desktop personal computer monitors, liquid crystal televisions, and the like in response to demands for energy saving and space saving, and the market applications of liquid crystal display devices continue to expand. Under such circumstances, liquid crystal display devices are required to have higher quality display characteristics. Improvements in display characteristics have been attempted in terms of liquid crystal material characteristics, display element structure, driving method, and the like. One factor that degrades the display characteristics of a liquid crystal display device is that the viewing angle characteristics are poor.
[0069]
Viewing angle characteristics have been improved by improving material characteristics and display device structures. Further, as a method for improving the viewing angle characteristic by image signal processing, an image processing method using a driving halftone (HT) technique using a binary value that does not use a portion having poor visual characteristics is used. However, the image processing method has a drawback that the roughness of the image is perceived by the user because binary values are fixedly displayed. Therefore, in the present embodiment, an image processing method having a wide viewing angle, excellent color reproducibility, and extremely low roughness, a liquid crystal display device using the image processing method, and a driving method of the liquid crystal display device are provided.
[0070]
FIG. 11 is a functional block diagram showing the liquid crystal display device 23 according to the present embodiment. A system device 24 such as a desktop personal computer outputs a control signal defining a liquid crystal drive timing and a video signal to the liquid crystal display device 23. The video signal input from the system device 24 is output to the video signal conversion ASIC 26 that is one of the components of the drive circuit of the liquid crystal display device 23. The ASIC 26 includes an image determination unit 27 that recognizes the gradation of the input video signal, an HT mask generation unit 28 that generates a HT level diffusion pattern of the display image, and an HT calculation unit 29 that performs HT processing on the input video signal. ing.
[0071]
The control signal output from the system device 24 is output to the liquid crystal display controller unit 30 that is one of the components of the drive circuit of the liquid crystal display device 23. Further, the video signal after image conversion output from the ASIC 26 is input to the liquid crystal display controller unit 30. The liquid crystal display controller 30 generates a control signal for controlling the source driver IC 31 and the gate driver IC 32 for driving the liquid crystal panel, and outputs the control signal to the source driver IC 31 and the gate driver IC 32 at a predetermined timing. Further, the liquid crystal display controller unit 30 outputs a video signal to the source driver IC 31 at a predetermined timing.
[0072]
The source driver IC 31 converts the received video signal into an analog video signal, and outputs the analog video signal to a pixel (not shown) in the liquid crystal panel 33 at a predetermined timing. The gate driver IC 31 scans a TFT (not shown) in the liquid crystal panel 33 and controls on / off of the TFT. The liquid crystal panel 33 displays the image by controlling the transmitted light based on the analog video signal accumulated in the pixel.
[0073]
Next, the operation of the image conversion process performed by the ASIC 26 will be described. The image determination unit 27 in the ASIC 26 recognizes the gradation of the input video signal, selects an HT processing method suitable for the video signal, and outputs the selection signal to the HT mask generation unit 28. Based on the input selection signal, the HT mask generation unit 28 distributes a high luminance side HT drive level and a low luminance side HT drive level (hereinafter referred to as an HT mask) within a predetermined display area of a video signal to be subjected to HT processing. Pattern) is determined for each frame and output to the HT calculation unit 29. Based on the HT mask pattern determined for each frame by the HT mask generation unit 28, the HT calculation unit 29 applies the high luminance side HT drive level and the low luminance side HT drive level to the input video signal input from the image determination unit 27. Is granted. The gradation signals converted by the HT process according to the present embodiment are sequentially sent from the liquid crystal controller 30 to the source driver IC 31, and the HT processed image is displayed on the liquid crystal panel 33. As a result, the viewing angle characteristics are improved and the rough feeling visually recognized by the conventional driving can be greatly reduced by the temporal diffusion effect in which the HT mask pattern changes for each frame.
[0074]
Hereinafter, a specific description will be given using examples.
[Example 1]
Example 1 according to this embodiment will be described with reference to FIGS. In the HT mask generation unit 28 of the ASIC 26 illustrated in FIG. 11, a plurality of types of HT mask patterns selected based on a selection signal from the image determination unit 27 are stored in advance. Further, the HT calculation unit 29 stores a plurality of gradation conversion tables in a look-up table format for selecting a high luminance side HT drive level and a low luminance side HT drive level. Alternatively, instead of the conversion table, a plurality of approximate expression coefficients are stored to derive the high brightness side HT drive level and the low brightness side HT drive level based on the approximate expression. With such a configuration, based on the gradation distribution of the input video signal, the HT mask pattern stored in the HT mask generation unit 28, the high luminance side HT drive level and the low luminance side HT stored in the HT calculation unit 29. Optimal HT processing can be performed by switching the combination with the driving level pattern.
[0075]
FIG. 12 shows an example of the concept of the gradation conversion table stored in the HT calculator 29 or the coefficient of the approximate expression. In the graph shown in FIG. 12, the horizontal axis represents the input gradation (all 64 gradations are illustrated) input to the image determination unit 27 from the system side. The vertical axis represents the output gradations (all 64 gradations are exemplified) of the calculation result in the HT calculation unit 29. FIG. 12 illustrates the HT processing of the two-divided level of the high-luminance side HT drive level and the low-luminance side HT drive level. Of course, it may be a level. A straight line C indicated by a solid line in FIG. 12 is a conversion characteristic used when HT processing is not performed, and is a straight line having an intercept of 0 and a gradient of 1. A curve A indicated by a broken line indicates the conversion characteristic of the high luminance side HT gradation, and a curve B indicated by a one-dot chain line indicates the conversion characteristic of the low luminance side HT gradation. As shown in FIG. 12, two output gradations of a high luminance side HT drive level and a low luminance side HT drive level are obtained based on curves A and B for a certain input gradation. The shapes of the curves A and B differ depending on the ratio (area ratio) between the number of pixels to be converted to the high luminance side HT drive level and the number of pixels to be converted to the low luminance side HT drive level. By using the image display method according to the present embodiment, high-quality display characteristics can be obtained regardless of the display image.
[0076]
[Example 2]
Next, Example 2 according to the present embodiment will be described with reference to FIG. FIG. 13 shows the HT mask pattern and the optical response characteristics of the liquid crystal of the liquid crystal panel 33 in the HT driving according to this embodiment. FIG. 13A shows an HT mask pattern that changes from frame to frame. As shown in FIG. 13A, the HT mask pattern is arranged in a 2 × 2 matrix, and is composed of a group of four pixels 34 in which diagonal elements have the same luminance level. The number of HT divisions is 2, and the area ratio between the high luminance side HT driving level and the low luminance side HT driving level is 1: 1.
[0077]
In the HT mask pattern of the nth frame, the pixel 34a at the upper left in the figure and the pixel 34d of its diagonal element (lower right) are at the high brightness side HT drive level, and the pixel 34b at the upper right in the figure and its diagonal element (lower left) ) Pixels 34c are at the low luminance side HT drive level. The HT mask pattern of the (n + 1) th frame of the next frame is opposite to the HT mask pattern of the nth frame, and the upper left pixel 34a and the diagonal element (lower right) pixel 34d in the figure are on the low luminance side HT drive level. Thus, the pixel 34b at the upper right in the figure and the pixel 34c of the diagonal element (lower left) are at the high luminance side HT drive level. Hereinafter, similarly, the HT mask pattern of the nth frame and the HT mask pattern of the (n + 1) th frame are alternately used. In addition, + (plus) displayed in each pixel area of the HT mask pattern in FIG. 13A means that the liquid crystal of the pixel is driven with a positive polarity, and − (minus) This means that the liquid crystal of the pixel is driven with a reverse polarity. The same applies to the ± display in the HT mask pattern shown in the subsequent figures.
[0078]
FIG. 13B shows the optical response characteristics of the liquid crystal panel 33 in the HT process of this embodiment. The horizontal axis represents the frame order from left to right, and the vertical axis represents the liquid crystal transmittance. In the figure, a curve A indicated by a solid line indicates the optical response characteristics of the liquid crystals of the pixels 34a and 34d, and a curve B indicated by a broken line indicates the optical response characteristics of the liquid crystals of the pixels 34b and 34c. The pixels 34a and 34d and the pixels 34b and 34c are subjected to HT processing not only spatially but also temporally, and their optical responses are shifted by one frame. For this reason, when the entire screen is viewed from a distance, the high-luminance portion and the low-luminance portion that are alternately displayed on the curve A and the curve B cancel each other, so that the low-frequency component of the optical response can be reduced. Therefore, high-quality display characteristics with sufficiently reduced flicker can be obtained unless the image is a special image such as a checkered pattern. Note that the repetition cycle of the high luminance characteristic and the low luminance characteristic does not need to be 1: 1 for one pixel, and is arbitrary. For example, the display period of the high luminance side characteristic and the display period of the low luminance side characteristic are set to 1: 3. May be.
[0079]
[Example 3]
Next, Example 3 according to the present embodiment will be described with reference to FIG. FIG. 14 shows the relationship between the HT mask pattern in the HT drive according to the present embodiment and the polarity at the time of writing gradation data to each pixel. FIG. 14A shows an HT mask pattern that changes for each frame, and is the same as the HT mask pattern shown in FIG. Looking at this HT mask pattern from the point of data write polarity, in the nth frame, the data write polarity of the pixel 34a and the pixel 34d at the high luminance side HT drive level is “+”, and the pixel at the low luminance side HT drive level. The data write polarity of 34b and pixel 34c is "-". Similarly, in other frames, pixels on the high luminance side HT drive level are driven with the same polarity, and pixels on the low luminance side HT drive level have the same polarity opposite to those on the high luminance side HT drive level. Driven. As described above, in the HT mask pattern and the polarity switching method shown in FIG. 14A, the drive polarity distribution is biased with respect to the high luminance side HT drive level and the low luminance side HT drive level, and flicker is likely to occur. .
[0080]
Therefore, as shown in FIGS. 14B and 14C, the HT mask pattern and the drive polarity are set so that the drive polarity distribution is uniform within the frame with respect to the high brightness side HT drive level and the low brightness side HT drive level. Control. In the configuration shown in FIG. 14B, the HT mask pattern is the same as that shown in FIG. 14A, but the drive polarity is changed from HV (Horizontal-Vertical) inversion drive to V (Vertical) inversion drive or 2nHV inversion drive. It is characterized in that it is changed to (n is an integer).
Thus, in the nth frame, the pixels 34a and 34d at the high luminance side HT drive level have both “+” and “−” data write polarities, and the pixels 34b and 34c at the low luminance side HT drive level also. Both “+” and “−” data write polarities exist. Similarly, in other frames, pixels on the high luminance side HT drive level are driven with different polarities, and pixels on the low luminance side HT drive level are driven with different polarities. As described above, according to the present embodiment, the combinations of the HT mask pattern and the drive polarity in each frame are all different in each pixel of the four pixel group 34, and the distribution of the HT mask pattern and the drive polarity can be made uniform. . In this embodiment, V inversion driving is performed every two frames. When the liquid crystal panel 33 is driven by this method, the high luminance portion and the low luminance portion cancel each other when the entire screen is viewed from a distance, so that the low frequency component of the optical response can be reduced. Even in a special image, the generation of flicker can be suppressed and display characteristics can be improved.
[0081]
FIG. 14C shows another method for making the distribution of the HT mask pattern and the drive polarity uniform. The configuration shown in FIG. 14C has the same driving polarity as that shown in FIG. 14A, but is characterized in that the HT mask pattern is changed.
In the HT mask pattern of the nth frame in this example, the pixel 34a and the pixel 34c adjacent below the pixel 34a have the high luminance side HT drive level, and the pixel 34b and the pixel 34d adjacent below the pixel 34a have the low luminance side HT drive level. It has become. The HT mask pattern of the (n + 1) th frame of the next frame is opposite to the HT mask pattern of the nth frame, the pixels 34a and 34c are at the low luminance side HT drive level, and the pixels 34b and 34d are at the high luminance side HT. Drive level. Hereinafter, similarly, the HT mask pattern of the nth frame and the HT mask pattern of the (n + 1) th frame are alternately used.
[0082]
Thus, in the nth frame, the pixels 34a and 34d at the high luminance side HT drive level have both “+” and “−” data write polarities, and the pixels 34b and 34c at the low luminance side HT drive level also. Both “+” and “−” data write polarities exist. Similarly, in other frames, pixels on the high luminance side HT drive level are driven with different polarities, and pixels on the low luminance side HT drive level are driven with different polarities. As described above, according to the present embodiment, the combinations of the HT mask pattern and the drive polarity in each frame are all different in each pixel of the four pixel group 34, and the distribution of the HT mask pattern and the drive polarity can be made uniform. .
In this way, the HT mask pattern can be changed without changing the drive polarity to make the distribution of the HT mask pattern and the drive polarity uniform. This method can also improve the display characteristics similar to the above.
[0083]
[Example 4]
Next, Example 4 according to the present embodiment will be described with reference to FIG. FIG. 15 shows an image pattern, an HT mask pattern in HT driving, and an optical response characteristic of the liquid crystal of the liquid crystal panel 33 according to this embodiment. FIG. 15A shows an image pattern that has not been subjected to HT processing, and has a checkered pattern of predetermined halftone display and black display. For example, the pixels 34a and 34d are halftone display, and the pixels 34b and 34c are black display. FIG. 15B shows a state in which the HT mask pattern of FIG. 4A is applied to the image pattern. As shown in FIG. 15B, the halftone display pixels 34a and 34d are both biased to one of the high luminance side HT driving level and the low luminance side HT driving level. As a result, since the optical response characteristics of the liquid crystals of the pixels 34a and 34d shown in FIG. 15D are biased to either the curve A indicated by the solid line or the curve B indicated by the broken line, flicker may be visually recognized. .
[0084]
Therefore, in this embodiment, the HT mask nonconforming pattern in which the luminance difference between the frames increases when the HT process as shown in FIG. The HT process is performed by selecting an HT mask pattern in which a luminance difference between frames is reduced from a plurality of HT mask patterns stored in the mask generation unit 28. FIG. 15C shows the four-pixel group 34 that has been subjected to the HT process so that the luminance difference between frames becomes small. As shown in FIG. 15C, in the HT mask pattern of the nth frame, the pixel 34a is at the high luminance side HT drive level and the pixel 34d is at the low luminance side HT drive level. In this case, the optical response characteristic of the pixel 34a is the curve A in FIG. 15D, and the pixel 34b is the curve B in FIG. 15D. Since the high luminance portion and the low luminance portion alternately displayed in B cancel each other, the low frequency component of the optical response can be reduced. Further, in the (n + 1) th frame, the pixel 34a is at the low luminance side HT drive level, and the pixel 34d is at the high luminance side HT drive level, so that the same effect as that in the nth frame can be obtained. Hereinafter, in the same manner, by alternately using the HT mask pattern of the nth frame and the HT mask pattern of the (n + 1) th frame, high-quality in which flicker is sufficiently reduced by performing spatial and temporal HT processing. Display characteristics can be obtained.
[0085]
It should be noted that HT processing such as identification of deviation of optical response characteristics in the frame caused by the relationship between the high brightness side HT drive level and the low brightness side HT drive level and the drive polarity and switching of the HT mask pattern is performed on a plurality of pixels as a block basis. You may perform in the arbitrary area | regions of an image. In addition, the HT mask nonconforming pattern exists unique to each HT mask pattern. However, if a plurality of HT masks are provided in advance and the HT mask pattern is switched for each input video signal, flicker is generated in most image patterns. Can be prevented.
[0086]
[Example 5]
Next, Example 5 according to the present embodiment will be described. In this embodiment, in order to prevent the flicker and the movement of the bright line (moving phenomenon) due to the HT mask pattern from being visually recognized by the HT process, the frame frequency is increased and driven in the still image using the frame buffer. It is characterized by a point. Alternatively, the input video signal may be driven without being subjected to HT processing. On the other hand, in a moving image, if the input video signal is not an integral multiple of the frame frequency, the image can be felt discontinuously. Therefore, HT processing is performed at an integral multiple of the frame frequency. The mode change between the still image and the moving image may be controlled by the image recognition circuit provided in the ASIC 26, or may be controlled by an external switching signal. When the frame frequency is increased in this way, display defects due to flicker and moving phenomenon are reduced, and high-quality display characteristics can be obtained.
[0087]
[Example 6]
Next, Example 6 according to the present embodiment will be described. The present embodiment is characterized in that HT processing is performed in units of R (red), G (green), and B (blue) pixels or in groups of three pixels. The HT process suitable for the combination of the gradation levels is performed collectively for each RGB or for each RGB by recognizing the level relationship and variation of the gradation levels for each RGB of the display image. Alternatively, a histogram is acquired for each RGB image signal of a predetermined region including the contour-extracted region, and different HT processing is performed for each RGB or each RGB according to the distribution of the histogram. As described above, when the HT process is performed for each RGB, it is possible to obtain high-quality display characteristics with excellent color reproducibility.
[0088]
[Example 7]
Next, Example 7 according to the present embodiment will be described with reference to FIG. The present embodiment is characterized in that HT processing suitable for the use environment is performed. The liquid crystal display device 35 of this embodiment further includes a temperature sensor unit 36, a ROM (or RAM) 37, and a frame buffer 38 in addition to the liquid crystal display device 23. The ROM 37 stores a gradation conversion table, a coefficient for gradation conversion approximation formula, and an HT mask pattern. Further, the ASIC 39 provided in the liquid crystal display device 35 further includes an external device controller 40 that controls the ROM 36 and the like with respect to the ASIC 26. Based on the temperature information detected by the temperature sensor unit 36, the HT process parameter optimum at the temperature is read from the ROM 51 and the HT process is performed. In this driving method, the HT process can be changed in accordance with the change in characteristics of the liquid crystal panel 33 and the like depending on the use environment, so that high-quality display characteristics can be obtained regardless of the use environment.
[0089]
[Example 8]
Next, Example 8 according to the present embodiment will be described with reference to FIG. FIG. 17 shows the HT mask pattern and the optical response characteristics of the liquid crystal panel 33 in the HT driving according to this embodiment. In the figure, a curve A indicated by a solid line indicates an optical response characteristic of the pixel 55, a curve B indicated by a broken line indicates an optical response characteristic of the pixel 56, a curve C indicated by an alternate long and short dash line indicates an optical response characteristic of the pixel 57, and two points A curve D indicated by a chain line indicates an optical response characteristic of the pixel 58. As shown in FIG. 17, the video signal is stored in the frame buffer and the video signal is written in the liquid crystal panel 33 so that the optical response characteristics of adjacent pixels in each frame are different. At this time, at least one gate bus line (not shown) of the liquid crystal panel 33 is scanned and driven with the same frame period. The interlace scanning may be performed regularly or irregularly. Note that the driving uses the liquid crystal display device shown in FIG.
[0090]
By making the frame frequency n times faster, it is possible to reduce temporal image degradation due to HT processing.
[0091]
[Example 9]
Next, Example 9 according to the present embodiment will be described. In this embodiment, when HT processing is performed at two levels of the high luminance side HT driving level and the low luminance side HT driving level, the gradation of the input video signal is identified and the number of video signals having a predetermined gradation is HT. When the processing area ratio is exceeded, the HT drive level is driven by, for example, only the high brightness side HT drive level, and when the number of video signals having a predetermined gradation does not exceed the area ratio of HT processing, the low brightness side HT It is characterized by driving only at the drive level. For example, if an overall bright screen is processed with an HT mask pattern having an area ratio of 1: 1 between the high luminance side HT drive level and the low luminance side HT drive level shown in FIG. The selected pixels are conspicuous. In this case, when the entire screen is viewed from a distance, a low frequency component of the optical response remains, and flicker may occur. Therefore, if the gradation level of the screen is identified and processing is performed only with the low-luminance side HT drive level as in the present embodiment, the luminance of the pixels having high luminance when HT is not processed is suppressed and is conspicuous. Disappears. Therefore, when the entire screen is viewed from a distance, a high-quality display characteristic in which the low frequency component of the optical response is reduced and the flicker is sufficiently reduced can be obtained.
[0092]
[Example 10]
Next, Example 10 according to the present embodiment will be described with reference to FIG. FIG. 18 shows an HT mask pattern of this embodiment. FIG. 18A shows the basic form of the HT mask pattern, which is the same as the HT mask pattern shown in FIG. FIG. 18B shows an HT mask pattern of this embodiment. As shown in FIG. 18B, in this embodiment, R, G, and B3 pixels are used as one pixel unit, and the HT process is performed by aligning the phases of the respective RGB pixels.
[0093]
In the nth frame, the RGB pixels 41 and 44 are at the high luminance side HT drive level, and the RGB pixels 42 and 43 are at the low luminance side HT drive level. The HT mask pattern of the (n + 1) th frame of the next frame is opposite to the HT mask pattern of the nth frame, the RGB pixels 41 and 44 are at the low luminance side HT drive level, and the RGB pixels 42 and 43 are at the high luminance side HT drive level. It becomes. Hereinafter, similarly, the HT mask pattern of the nth frame and the HT mask pattern of the (n + 1) th frame are used alternately. In the HT mask pattern of this embodiment, the RGB pixel 41 corresponds to the pixel 34a, the RGB pixel 42 corresponds to the pixel 34b, and the RGB pixel 43 corresponds to the pixel. The RGB pixel 44 corresponds to the pixel 34d.
[0094]
The drive polarities of the RGB pixels 41, 42, 43, and 44 are inverted for each color. In the nth frame and the (n + 1) th frame, the RGB pixels of the pixel 41 are driven in order of positive polarity, negative polarity, and positive polarity, and the polarity is inverted between the RGB pixels adjacent to the left and right. The pixels 41 and 43 arranged in the vertical direction, the pixels 42 and 44 are driven with the same polarity, and the polarity inversion is V inversion driving. As described above, even in the present embodiment, since the HT process can be performed spatially and temporally, high-quality display characteristics with sufficiently reduced flicker can be obtained.
[0095]
[Example 11]
Next, Example 11 according to the present embodiment will be described with reference to FIG. FIG. 19 shows an HT mask pattern of this embodiment. FIG. 19A shows the basic form of the HT mask pattern, which is the same as the HT mask pattern shown in FIG. FIG. 19B shows an HT mask pattern of this embodiment. As shown in FIG. 19B, in this embodiment, the R pixel and the B pixel perform HT processing with the same phase, and the G pixel performs HT processing with a phase shifted from the R pixel and B pixel.
[0096]
In the nth frame, the R and B pixels of the RGB pixels 41 and 44 are at the high luminance side HT drive level, and the G pixel is at the low luminance side HT drive level. Further, the R pixel and the B pixel of the RGB pixels 42 and 43 are at the low luminance side HT driving level, and the G pixel is at the high luminance side HT driving level. The HT mask pattern of the (n + 1) th frame of the next frame is opposite to the HT mask pattern of the nth frame, and the R and B pixels of the RGB pixels 41 and 44 are at the low luminance side HT drive level, and the G pixel is of high luminance. This is the side HT drive level. Further, the R pixel and the B pixel of the RGB pixels 42 and 43 are at the high luminance side HT driving level, and the G pixel is at the low luminance side HT driving level. Hereinafter, similarly, the HT mask pattern of the nth frame and the HT mask pattern of the (n + 1) th frame are used alternately.
[0097]
In addition, since the HT mask pattern of the present embodiment corresponds to each RGB pixel with respect to the basic shape of the HT mask pattern in FIG. 5A, the RGB pixels 41, 42, 43, and 44 include three basic shapes. Will be. The pixel 34a corresponds to the R pixel of the RGB pixel 41, the pixel 34b corresponds to the G pixel of the RGB pixel 41, the pixel 34d corresponds to the G pixel of the RGB pixel 44, and the pixel 34c corresponds to the RGB pixel 44 of the RGB pixel 44. R pixel corresponds. Further, the pixel 34a corresponds to the B pixel of the RGB pixel 41, the pixel 34b corresponds to the R pixel of the RGB pixel 42, the pixel 34d corresponds to the R pixel of the RGB pixel 43, and the pixel 34c corresponds to the RGB pixel. Forty-two B pixels correspond. Further, the pixel 34a corresponds to the G pixel of the RGB pixel 42, the pixel 34b corresponds to the B pixel of the RGB pixel 42, the pixel 34d corresponds to the B pixel of the RGB pixel 43, and the pixel 34c corresponds to the RGB pixel 42. The G pixel of the pixel 43 corresponds.
[0098]
The drive polarities of the RGB pixels 41, 42, 43, and 44 are inverted for each color. In the nth frame and the (n + 1) th frame, the RGB pixels of the pixel 41 are driven in order of positive polarity, negative polarity, and positive polarity, and the polarity is inverted between the RGB pixels adjacent to the left and right. Further, the pixels 41 and 44 arranged in the vertical direction, the pixels 42 and 43 are driven with the same polarity, and the polarity inversion is V inversion driving. As described above, even in this embodiment, the HT process can be performed spatially and temporally, and therefore flicker can be sufficiently reduced. Furthermore, since HT processing can be performed for each RGB color, high-quality display characteristics with high color reproducibility can be obtained.
[0099]
[Example 12]
Next, Example 12 according to the present embodiment will be described with reference to FIG. This embodiment is characterized in that an HT mask pattern is provided in advance for each RGB pixel. In the following description, it is assumed that an HT mask pattern for R and B pixels and an HT mask pattern for G pixels are provided. FIG. 20 shows an HT mask pattern for RGB pixels when the basic form of the HT mask pattern for each RGB pixel and the HT mask pattern of the basic form are applied. FIG. 20A shows a basic form of the HT mask pattern used for the R pixel and the B pixel, and is the same as the HT mask pattern shown in FIG. The pixel drive polarity is the same. FIG. 4B shows a basic HT mask pattern used for the G pixel, which is the same as the HT mask pattern shown in FIG. However, the drive polarities of the pixels are different, and in this embodiment, the drive polarities are the same as in FIG.
[0100]
FIG. 20C shows an HT mask pattern for the RGB pixels 41, 42, 43, and 44 based on the basic HT mask pattern. The correspondence relationship of the HT mask pattern of this embodiment with respect to the basic HT mask pattern is as follows. Among the four pixel groups 45 in the R pixel and B pixel basic HT mask pattern of FIG. 20A, the R pixel and the B pixel of the RGB pixel 41 correspond to the pixel 45a, and the R of the RGB pixel 42 corresponds to the pixel 45b. The pixel and the B pixel correspond to each other, the R pixel and the B pixel of the RGB pixel 43 correspond to the pixel 45c, and the R and B pixels of the RGB pixel 44 correspond to the pixel 45d. 20B, among the four pixel groups 46 in the G pixel basic HT mask pattern, the G pixel of the RGB pixel 41 corresponds to the pixel 46a, and the G pixel of the RGB pixel 42 corresponds to the pixel 46b. The pixel 46c corresponds to the G pixel of the RGB pixel 43, and the pixel 46d corresponds to the G pixel of the RGB pixel 44.
[0101]
In the nth frame, each pixel of the RGB pixel 41 has a high luminance side HT drive level, and each pixel of the RGB pixel 42 has a low luminance side HT drive level. In addition, the R pixel and the B pixel of the RGB pixel 43 are at the high luminance side HT drive level, and the G pixel is at the low luminance side HT drive. Further, the R pixel and the B pixel of the RGB pixel 44 are at the low luminance side HT driving level, and the G pixel is at the high luminance side HT driving. The HT mask pattern of the (n + 1) th frame of the next frame is opposite to the HT mask pattern of the nth frame, and each pixel of the RGB pixel 41 is at the low luminance side HT drive level, and each pixel of the RGB pixel 42 is high. The luminance side HT drive level is set. In addition, the R pixel and the B pixel of the RGB pixel 43 are at the low luminance side HT drive level, and the G pixel is at the high luminance side HT drive. Furthermore, the R pixel and the B pixel of the RGB pixel 44 are at the high luminance side HT drive level, and the G pixel is at the low luminance side HT drive level. Thereafter, the HT mask pattern of the nth frame and the HT mask pattern of the (n + 1) th frame are used alternately in the same manner.
[0102]
In addition, in the nth frame and the (n + 1) th frame, the drive polarities of the RGB pixels 41 and 44 are positive, and the drive polarities of the RGB pixels 42 and 43 are negative. Hereinafter, the drive polarity is inverted every two frames. As described above, it is possible to easily change the HT mask pattern of the RGB pixels by providing a plurality of HT mask patterns and changing the combination of the HT mask patterns. Therefore, even in this embodiment, since the HT process can be performed spatially and temporally, flicker can be sufficiently reduced, and high-quality display characteristics can be obtained.
[0103]
FIG. 21 shows another HT mask pattern. In the HT mask pattern, the high luminance side HT driving level and the low luminance side HT driving level are repeated in units of two RGB pixels. For example, in the nth frame, the R pixel and the G pixel of the RGB pixel 41 are at the high luminance side HT drive level, and the B pixel of the RGB pixel 41 and the R pixel of the RGB pixel 42 are at the low luminance side HT drive level. The G pixel and B pixel of the pixel 42 are at the high luminance side HT drive level. The R pixel and the G pixel of the RGB pixel 44 are at the low luminance side HT drive level, the B pixel of the RGB pixel 41 and the R pixel of the RGB pixel 42 are at the high luminance side HT drive level, and the G pixel of the RGB pixel 42 And B pixels are at the low brightness side HT drive level. When driven in this way, the drive levels of the adjacent pixels on the left and right sides are aligned, so that it is possible to suppress the bias in polarity in units of horizontal pixels, to sufficiently reduce flicker, and to obtain high-quality display characteristics. The HT mask pattern is prepared in advance in the HT mask generation unit 28 that is a functional block of the ASICs 26 and 39.
[0104]
[Example 13]
Next, Example 13 according to the present embodiment will be described. When performing HT processing temporally with the same pixel, the state of the liquid crystal always changes. This is because the Ctot term of the feedthrough voltage ΔV = ΔVg × Cgs / Ctot is constantly changing, and it is also a factor that makes it difficult to optimize the common potential and remove the DC component. In order to avoid this, in this embodiment, a conversion approximate expression or a lookup table is calculated inside the ASICs 26 and 39 from the relationship between the video signals before and after the HT processing. If the output potential of the display video signal is shifted one by one using the conversion approximation formula or the like, the change in Ctot term can be suppressed, so that the display quality can be improved.
[0105]
[Example 14]
Next, Example 14 according to the present embodiment will be described with reference to FIGS. The present embodiment is characterized in that the low frequency component of the optical response is reduced by simultaneously performing the HT process and the response compensation by the overdrive process. FIG. 22 shows a block diagram of a first image conversion processing circuit in the present embodiment. The comparator 46 in the HT processing circuit 45 selects one gradation conversion level (high luminance side HT driving level and low luminance side HT driving level) from a plurality of gradation conversion levels based on the input video signal. The data conversion unit 47 performs HT processing based on the gradation conversion level and the drive polarity.
The video signal after the HT processing is output to the overdrive processing circuit 48 and input to the comparator in the overdrive processing circuit 48.
[0106]
Incidentally, the memory controller 52 in the overdrive processing circuit 48 reads the video signal of the previous frame from the frame memory 53. The video signal of the previous frame read from the frame memory 53 is input to the comparator 49 via the memory data input / output buffer 51 and compared with the video signal output from the HT processing circuit 45. The video signal after HT processing output from the HT processing circuit 45 based on the comparison result is subjected to addition / subtraction at a resolution equal to or higher than that of the HT processing by the data conversion unit 47 and output from the overdrive processing circuit. Note that the resolution equal to or higher than that of the HT process means that, for example, if the HT process is performed with 6 bits, the data conversion unit 47 performs addition / subtraction of 8 bits. Since the video signal output from the overdrive processing circuit 48 has information on both the HT process and the overdrive process, when the liquid crystal panel 33 is driven with the video signal, response compensation by the HT process and the overdrive process is performed. Can be displayed simultaneously.
[0107]
Next, the second image conversion processing circuit of this embodiment will be described with reference to FIG.
The second image conversion processing circuit is characterized in that HT processing is performed after overdrive processing is performed on the first image conversion processing circuit. Note that the same reference numerals are given to components having the same function as that of the first image conversion processing circuit. FIG. 23 is a block diagram of the second image conversion processing circuit. The memory controller 52 in the overdrive processing circuit 48 reads the video signal of the previous frame from the frame memory 53. The video signal of the previous frame read from the frame memory 53 is compared with the input video signal by the comparator 49. Based on the comparison result, the data converter 50 performs addition / subtraction, and the added / subtracted video signal is output to the HT processing circuit 45.
[0108]
The comparator 46 in the HT processing circuit 45 selects one gradation conversion level having a relatively small luminance difference from a plurality of gradation conversion levels based on the video signal output from the overdrive processing circuit 48. The data conversion unit 47 performs HT processing based on the gradation conversion level and the drive polarity. Also in the second image processing circuit, since the video signal output from the overdrive processing circuit 48 has information on both the HT processing and the overdrive processing, the HT is driven when the liquid crystal panel 33 is driven by the video signal. It is possible to display an image that has been subjected to processing and response compensation by overdrive processing at the same time.
[0109]
Next, a third image conversion processing circuit according to this embodiment will be described with reference to FIG. FIG. 24 shows a block diagram of a third image conversion processing circuit. Note that the same reference numerals are given to components having the same function as that of the first image conversion processing circuit. The memory data input / output buffer 56 in the HT processing circuit 54 can store the video signal of the previous frame. The comparator 55 compares the video signal of the previous frame with the input video signal. Further, the comparator 55 also compares the gradation conversion level selected based on the input video signal with the gradation conversion level one frame before. The HT processing circuit 54 outputs a trigger signal to the overdrive processing circuit 57 when the difference in gradation conversion level is equal to or greater than a predetermined range.
[0110]
In the overdrive processing circuit 57, the operation / non-operation of the overdrive processing is determined by the trigger signal. The memory controller 52 reads the video signal of the previous frame from the frame memory 53. When the overdrive processing operation is selected, the comparator 49 compares the video signal of the previous frame with the video signal after the HT processing output from the HT processing circuit 54, and based on the comparison result, the data The conversion unit 50 performs addition / subtraction of overdrive processing to output a video signal. On the other hand, when non-operation of overdrive processing is selected, the video signal after HT processing output from the HT processing circuit 54 is output from the overdrive processing circuit 57. Therefore, when the overdrive process is operating, an image obtained by simultaneously performing the HT process and the response compensation by the overdrive process is displayed on the liquid crystal panel 33. When the overdrive process is not operating, only the HT process is performed. The displayed image is displayed on the liquid crystal panel 33.
[0111]
Next, the effect of response compensation by the HT process and the overdrive process by the third image conversion processing circuit will be specifically described with reference to FIGS. FIG. 25 shows an optical response of a pixel subjected to only HT processing. In FIG. 25A, the pixel area ratio of the high luminance side HT driving level or the low luminance side HT driving level is 1: 1, and the HT division is driven at two levels of the high luminance side and the low luminance side HT driving level. The optical response characteristic in a predetermined one pixel is shown. The horizontal axis represents the frame order from left to right, and the vertical axis represents the liquid crystal transmittance. A straight line A indicated by a broken line in the figure represents a driving level when the liquid crystal panel 33 is driven by a video signal subjected to only HT processing, and a curve B indicated by a solid line represents an optical response characteristic of the liquid crystal panel 33 when only HT processing is performed. A straight line C indicated by a one-dot chain line indicates an optical response characteristic of the liquid crystal panel 33 when image processing is not performed. FIG. 4B shows the drive level in each frame.
In the figure, “IN” represents an input video signal, “HO” represents a video signal after HT processing output from the HT processing circuit 54, and “FL” represents one type of HT processing. The video signal before the frame is shown. For example, when the liquid crystal panel 33 is driven by the video signal HO after the HT process, the drive level of the (n + 1) th frame becomes 18.
[0112]
In order to realize 32 drive levels when image processing is not performed, two types of HT processing (hereinafter referred to as “HT processing 46-18” and “HT processing 40-24”) are performed.
In the (n + 2) th frame, the type of HT process changes from the HT process 46-18 to the HT process 40-24. Since the (n + 1) th frame has a drive level of 18 and the (n + 2) th frame has a drive level of 40, the average drive level is (18 + 40) / 2 = 29 due to the optical response characteristics of the liquid crystal panel 33. Therefore, the average driving level of the (n + 2) th frame is lower than the driving level of 32 where no image processing is performed. On the other hand, in the n + 5th frame, the type of the HT process is switched from the HT process 40-24 to the HT process 46-18. Since the (n + 5) th frame has a drive level of 24 and the (n + 6) th frame has a drive level of 46, the average drive level of the (n + 6) th frame is 43, which is higher than the 32 drive level without image processing. . If the drive level after the HT process changes even though the input video signal IN does not change, the low frequency component of the optical response increases and flicker occurs.
[0113]
Therefore, overdrive processing is performed to suppress fluctuations in the drive level of the liquid crystal panel 33. FIG. 26 shows an optical response when the pixel described in FIG. 25 is overdriven. FIG. 5A shows the optical response characteristics of the pixel. A straight line A indicated by a broken line in the figure represents a driving level when the liquid crystal panel 33 is driven by a video signal subjected to only HT processing, and a curved line B indicated by a solid line represents the liquid crystal panel 33 when HT processing and overdrive processing are performed. The straight line C indicated by the alternate long and short dash line represents the optical response characteristic of the liquid crystal panel 33 when image processing is not performed. FIG. 4B shows the drive level in each frame. In the figure, “IN” represents the input video signal, the character “HO” represents the video signal after HT processing output from the HT processing circuit 54, and “FL” represents one type of HT processing. The video signal one frame before is shown. Further, the character “OUT” in the figure represents the output video signal output to the liquid crystal panel 33, “OM” represents the video signal HO stored in the frame memory 53, and “TRG” represents the operation / operation of the overdrive process. A trigger signal for controlling non-operation is represented, and “CO” represents a correction value for overdrive processing.
[0114]
In order to avoid the fluctuation of the average drive level described with reference to FIG. 25, the video signal HO after the HT processing by the comparator 55 in the HT processing circuit 54 and the video signal OM one frame before stored in the frame memory 53 Compare. As a result of the comparison, when the amount of change exceeds a predetermined range, a trigger signal TRG is generated and output from the HT processing circuit 54.
When the trigger signal TRG is input to the overdrive processing circuit 57, overdrive processing is performed, and the data converter 50 adds or subtracts the correction amount CO to the video signal. The overdrive circuit 50 outputs an output video signal OUT, which is a corrected video signal, to the liquid crystal panel 33 to adjust the fluctuation of the drive level.
[0115]
For example, in the (n + 1) th frame in which the HT process does not change, as shown in FIG. 26B, the drive level (18) of the video signal HO after the HT process of the frame and the frame memory 53 stored before The average drive level of the frame is calculated to be 32 by comparing with the drive level (46) of the video signal OM. On the other hand, in the (n + 2) th frame, the drive level (40) of the video signal HO after the HT process of the frame is compared with the drive level (18) of the video signal OM of the previous frame stored in the frame memory 53. The average drive level of the frame is calculated as 29.
Here, it is assumed that the range of the change amount of the average drive level for selecting the operation / non-operation of the overdrive process is set to 32 ± 2. In this case, since the average drive level of the (n + 2) th frame is out of the range, the trigger signal TRG is output from the HT processing circuit 54 and overdrive processing is performed. A circle in the TRG column in FIG. 26B indicates that the trigger signal TRG has been output. In the overdrive processing circuit 57, for example, the correction value 2 is added to the video signal HO so that the average drive level falls within the range of 32 ± 2, and the output video signal OUT (42) is output. When driven by the output video signal OUT, the driving level is increased by a driving level D from the driving level straight line A for only HT processing. Therefore, when the liquid crystal panel 33 is driven at the driving level, the average driving level becomes 30 and the HT processing average driving level varies. Is suppressed. The same process is performed for the (n + 6) th frame, and correction is performed so that the drive level E is lowered in the frame.
[0116]
As described above, in this embodiment, even if a change occurs in the HT process such as a change in the HT mask pattern, the fluctuation of the average drive level of the liquid crystal panel 33 can be suppressed and the low frequency component can be removed. Therefore, high-quality display characteristics with sufficiently reduced flicker can be obtained.
[0117]
As described above, according to the present embodiment, it is possible to realize an image processing method that has a wide viewing angle and excellent color reproducibility, and that has extremely little roughness, a liquid crystal display device using the image processing method, and a driving method of the liquid crystal display device.
[0118]
The present embodiment is not limited to the above embodiment, and various modifications can be made.
For example, a gray scale reference voltage serving as a reference for the liquid crystal printing voltage may be provided separately for generating means for HT driving and normal driving. As shown in FIG. 27, the gradation reference voltage Vx-HT (x = 1, 2,..., N) for HT driving and the gradation reference voltage Vx-ND (x = 1, 2,...) For normal driving. A circuit (not shown) that outputs n) is provided, and the gradation reference voltage is selected by an analog switch 58 controlled by a selection control signal SCT. The selected gradation reference voltage is input to the source driver IC 31 via the amplifier 59.
When the gradation reference voltage is switched, different voltages can be applied to the liquid crystal even if the video signal has the same gradation. Therefore, if the HT process and the gradation reference voltage are switched at the same time, the effect of the image process is enhanced and high-quality display characteristics can be obtained.
[0119]
In the above embodiment, the HT process is performed on a pixel basis, but the present embodiment is not limited to this. For example, a portion having a change in the display image is extracted and the HT process is performed.
In this way, the high-luminance HT drive level and the low-luminance HT drive level are repeated for each frame at the relevant location, the difference in the path of the optical response increases before and after the display image changes, and the contour of the relevant portion is animated. It is emphasized when the line of sight changes following an image or the like. Also, the degree of emphasis can be controlled by changing the luminance level after conversion of the high luminance side HT drive level and the low luminance side HT drive level.
[0120]
As described above, according to the present embodiment, an image processing method having a wide viewing angle, excellent color reproducibility, and extremely low roughness, a liquid crystal display device using the image processing method, and a driving method of the liquid crystal display device are realized. Can do.
[0121]
The image processing method and the liquid crystal display device using the image processing method according to the first embodiment of the present invention described above are summarized as follows.
[0122]
(Appendix 1)
Generate high gradation side data and low gradation side data from the image signal input by the interlace method,
The high gradation side data and the low gradation side data are mixed in at least one of time and space to display an image.
An image processing method characterized by the above.
[0123]
(Appendix 2)
In the image processing method according to attachment 1,
Determine whether the image signal is for odd lines or even lines,
Changing the display mode of the high gradation side data and the low gradation side data based on the determination result
An image processing method characterized by the above.
[0124]
(Appendix 3)
In the image processing method according to attachment 2,
In the odd frame for displaying the odd line image signal, the high gradation side data and the low gradation side data are generated from the odd line image signal and displayed on the odd line and the even line.
In the even frame for displaying the even line image signal, the high gradation side data and the low gradation side data are generated from the even line image signal and displayed on the odd line and even line.
An image processing method characterized by the above.
[0125]
(Appendix 4)
In the image processing method according to attachment 3,
In the odd frame, the high gradation side data is written to the odd lines, and the low gradation side data is written to the even lines.
In the even frame, the high gradation side data is written to the even line, and the low gradation side data is written to the odd line.
An image processing method characterized by the above.
[0126]
(Appendix 5)
In the image processing method according to attachment 3,
In the odd frame, the high gradation side data is written to even lines, and the low gradation side data is written to odd lines.
In the even frame, the high gradation side data is written to the odd lines, and the low gradation side data is written to the even lines.
An image processing method characterized by the above.
[0127]
(Appendix 6)
In the image processing method according to appendix 4 or 5,
The lines for writing the high gradation side data and the low gradation side data are sequentially replaced for each frame.
An image processing method characterized by the above.
[0128]
(Appendix 7)
In the image processing method according to any one of appendices 3 to 6,
In the odd frame,
Write the high gradation side data to the end pixels of the odd lines, and sequentially write the low gradation side data and the high gradation side data to the pixels in the line,
Write the low gradation side data to the end pixels of the even lines, and sequentially write the high gradation side data and the low gradation side data to the pixels in the line,
In the even frame,
Write the low gradation side data to the end pixels of the odd lines, and sequentially write the high gradation side data and the low gradation side data to the pixels in the line,
The high gradation side data is written to the end pixel of the even line, and the low gradation side data and the high gradation side data are alternately written sequentially to the pixels in the line.
An image processing method characterized by the above.
[0129]
(Appendix 8)
In the image processing method according to any one of appendices 3 to 6,
In the odd frame,
Write the low gradation side data to the end pixels of the odd lines, and sequentially write the high gradation side data and the low gradation side data to the pixels in the line,
The high gradation side data is written to the end pixels of the even lines, and the low gradation side data and the high gradation side data are sequentially written to the pixels in the line,
In the even frame,
Write the high gradation side data to the end pixels of the odd lines, and sequentially write the low gradation side data and the high gradation side data to the pixels in the line,
The low gradation side data is written to the end pixels of the even lines, and the high gradation side data and the low gradation side data are alternately written sequentially to the pixels in the line.
An image processing method characterized by the above.
[0130]
(Appendix 9)
In the image processing method according to appendix 7 or 8,
The pixels for writing the high gradation side data and the low gradation side data are sequentially replaced for each frame.
An image processing method characterized by the above.
[0131]
(Appendix 10)
In the image processing method according to attachment 2,
The high gradation side data and the low gradation side data are created based on the image signal for odd lines, and the high gradation side data and the low gradation side data are generated over two frames for the odd lines. And write,
The high gradation side data and the low gradation side data are created based on the image signal for the even lines, and the high gradation side data and the low gradation side data are generated over two frames for the even lines. And write
An image processing method characterized by the above.
[0132]
(Appendix 11)
In the image processing method according to attachment 10,
High gradation side data for odd lines is displayed on the odd lines of the odd frames,
Display the low gradation side data for odd lines on the odd lines of the even frame,
High gradation side data for even lines is displayed on the even lines of the even frame,
Display the low gradation side data for even lines on the even lines of the odd frame.
An image processing method characterized by the above.
[0133]
(Appendix 12)
In the image processing method according to attachment 11,
In the odd frame,
High gradation side data for odd lines is displayed on odd lines,
In the even line, the low gradation side data for the even line input in the previous frame is displayed.
In the even frame,
High gradation side data for even lines is displayed on even lines,
On the odd lines, the low gradation side data for the odd lines input in the previous frame is displayed.
An image processing method characterized by the above.
[0134]
(Appendix 13)
In the image processing method according to attachment 11,
In the odd frame,
High gradation side data for odd lines is displayed on the odd line end pixels, and high gradation side and low gradation side data are displayed alternately on the odd line pixels in turn,
The even line end pixels display the low gradation side data for the even lines input in the previous frame, and the high gradation side and low gradation side data for the even lines input in the previous frame are displayed in the even number. Display alternately on the pixels of the line,
In the even frame,
High gradation side data for even lines are displayed on even line end pixels, and high gradation side and low gradation side data are displayed alternately on the even line pixels in turn,
The odd-line end pixel displays the low-gradation side data for the odd line input in the previous frame, and the odd-line high gradation side and low-gradation side data input in the previous frame Display alternately one after another on the pixels of the line
An image processing method characterized by the above.
[0135]
(Appendix 14)
In the image processing method according to attachment 13,
Display odd and even numbers, and the relationship between high gradation and low gradation with each other for each frame.
An image processing method characterized by the above.
[0136]
(Appendix 15)
In the image processing method according to attachment 1,
A gradation display is performed using the high gradation side data and the low gradation side data with respect to a display device having pixels that are twice as long as each of the assumed input signals in the vertical and horizontal directions or double in both the vertical and horizontal directions. thing
An image processing method characterized by the above.
[0137]
(Appendix 16)
In the image processing method according to attachment 15,
A plurality of 2 or 4 pixels form a set corresponding to one data, and the pixels forming the set have high gradation side data and low luminance side data on a one-to-one basis. The high gradation side data and the low gradation side data are switched and displayed every time.
An image processing method characterized by the above.
[0138]
The image processing method and the liquid crystal display device using the image processing method according to the second embodiment of the present invention described above are summarized as follows.
(Appendix 17)
A high brightness drive level and a low brightness drive level are generated from the input image signal,
Displaying an image by halftone processing in which the high luminance driving level and the low luminance driving level are diffused at a predetermined area ratio and are also temporally diffused.
An image processing method characterized by the above.
[0139]
(Appendix 18)
In the image processing method according to attachment 17,
A plurality of driving patterns (inversion period of display device, distribution of two or more different driving levels) for realizing the halftone process are provided in an area ratio and a pattern period, and the driving pattern is switched according to an input image.
An image processing method characterized by the above.
[0140]
(Appendix 19)
In the image processing method according to attachment 17,
Shifting the diffusion period of two or more drive levels different in the halftone process in the time axis in the neighboring pixels
An image processing method characterized by the above.
[0141]
(Appendix 20)
In the image processing method according to attachment 19,
Shift driving level writing on the frame time axis in the neighboring pixels
An image processing method characterized by the above.
[0142]
(Appendix 21)
In the image processing method according to attachment 17,
AC drive polarity to display devices with two or more different halftone drive levels should be equally present in area and time, eliminating polarity variations
An image processing method characterized by the above.
[0143]
(Appendix 22)
In the image processing method according to attachment 18,
Switching halftone diffusion pattern so that the time deviation of drive polarity and drive level is minimized according to the image signal
An image processing method characterized by the above.
[0144]
(Appendix 23)
In the image processing method according to attachment 22,
Perform halftone processing in block units or areas.
An image processing method characterized by the above.
[0145]
(Appendix 24)
In the image processing method according to attachment 17,
Changing the driving cycle between still images and moving images
An image processing method characterized by the above.
[0146]
(Appendix 25)
In the image processing method according to attachment 18,
Switching drive patterns according to the distribution of gradation levels in RGB pixel units or block units of the display image
An image processing method characterized by the above.
[0147]
(Appendix 26)
In the image processing method according to attachment 17,
Compensate the driving of the display device due to the ambient environment such as temperature so that it is optimized by detecting the environmental conditions.
An image processing method characterized by the above.
[0148]
(Appendix 27)
In the image processing method according to attachment 20,
Shift display panel writing in the half-frame time axis in the neighboring pixels, or increase the driving period at the same time.
An image processing method characterized by the above.
[0149]
(Appendix 28)
In the image processing method according to attachment 17,
Creating halftone processing patterns by error diffusion (dithering)
An image processing method characterized by the above.
[0150]
(Appendix 29)
In the image processing method according to attachment 17,
Halftone processing pattern is processed in the same pattern for each color (RGB)
An image processing method characterized by the above.
[0151]
(Appendix 30)
In the image processing method according to attachment 17,
Halftone processing pattern is processed with each color (RGB) having different colors or combinations with different periods of the same pattern.
An image processing method characterized by the above.
[0152]
(Appendix 31)
In the image processing method according to attachment 17,
Halftone processing pattern is processed with completely different patterns for each color (RGB)
An image processing method characterized by the above.
[0153]
(Appendix 32)
In the image processing method according to attachment 17,
The halftone processing drive level must be the same for a pair of adjacent pixels driven with the opposite polarity to the common level.
An image processing method characterized by the above.
[0154]
(Appendix 33)
In the image processing method according to attachment 17,
By combining these drive levels with different polarity of halftone processing with positive polarity and reverse polarity, avoid applying DC component to the display device.
An image processing method characterized by the above.
[0155]
(Appendix 34)
In the image processing method according to attachment 17,
The overdrive process that adjusts the drive level by addition / subtraction operation by comparison with the previous information from the image memory is provided in the latter stage and the halftone process is provided in the previous stage, and the overdrive processing resolution is controlled to the gradation resolution required for the halftone process. Have a configuration that allows
An image processing method characterized by the above.
[0156]
(Appendix 35)
In the image processing method according to attachment 17,
Overdrive processing that adjusts the drive level by addition / subtraction operation by comparison with the previous information in the image memory is provided in the first stage, halftone processing is provided in the second stage, and the difference between multiple tables of halftone processing should not be set large.
An image processing method characterized by the above.
[0157]
(Appendix 36)
In the image processing method according to attachment 17,
Compared with the immediately preceding information from the image memory, the overdrive processing for adjusting the drive level by addition / subtraction operation is performed in the subsequent stage, the halftone processing is provided in the preceding stage, and the halftone processing level to be performed is compared with the immediately preceding frame processing level. Judgment of overdrive operation or non-operation
An image processing method characterized by the above.
[0158]
(Appendix 37)
In the image processing method according to attachment 17,
Switching between drive levels by selecting halftone processing and non-processing
An image processing method characterized by the above.
[0159]
(Appendix 38)
In the image processing method according to attachment 17,
The distribution of different drive levels of the halftone processing is reversed in the vicinity of the image contour.
An image processing method characterized by the above.
[0160]
(Appendix 39)
In the image processing method according to attachment 17,
The halftone process is performed at n times speed
An image processing method characterized by the above.
[0161]
(Appendix 40)
40. A liquid crystal display device comprising: a drive circuit that seals liquid crystal between a pair of substrates and performs the image processing method according to any one of appendices 1 to 39.
[0162]
【The invention's effect】
As described above, according to the present invention, it is possible to perform image processing with a wide viewing angle and excellent color reproducibility even when an interlace video signal is input.
[Brief description of the drawings]
FIG. 1 is a diagram showing an operation principle of an image processing method according to a first embodiment of the present invention.
FIG. 2 is a diagram showing a first driving method of the image processing method according to the first embodiment of the present invention.
FIG. 3 is a diagram showing a second driving method of the image processing method according to the first embodiment of the present invention.
FIG. 4 is a diagram showing a third driving method of the image processing method according to the first embodiment of the present invention.
FIG. 5 is a diagram showing a fourth driving method of the image processing method according to the first embodiment of the present invention.
FIG. 6 is a flowchart showing an image display operation of one frame in the first driving method of the image processing method according to the first embodiment of the present invention.
FIG. 7 is a flowchart showing an image display operation of one frame in the second driving method of the image processing method according to the first embodiment of the present invention.
FIG. 8 is a flowchart showing an image display operation of one frame in the third driving method of the image processing method according to the first embodiment of the present invention.
FIG. 9 is a flowchart showing an image display operation of one frame in a fourth driving method of the image processing method according to the first embodiment of the present invention.
FIG. 10 is a diagram illustrating a display method when an input video signal and a display screen have different resolutions in the image processing method according to the first embodiment of the present invention.
FIG. 11 is a functional block diagram of a liquid crystal display device 23 according to a second embodiment of the present invention.
FIG. 12 is a diagram for explaining the concept of a gradation conversion table or approximate expression coefficient stored in the HT calculation unit 29 of Example 1 according to the second embodiment of the present invention;
13 is a diagram showing an HT mask pattern and an optical response characteristic of liquid crystal of a liquid crystal panel 33 in HT driving of Example 2 according to the second embodiment of the present invention. FIG.
FIG. 14 is a diagram showing a relationship between an HT mask pattern and a write polarity in HT drive of Example 3 according to the second embodiment of the present invention.
15 is a diagram illustrating an image pattern of Example 4 according to the second embodiment of the present invention, an HT mask pattern in HT driving, and an optical response characteristic of liquid crystal of a liquid crystal panel 33. FIG.
FIG. 16 is a functional block diagram of a liquid crystal display device of Example 7 according to the second embodiment of the present invention.
FIG. 17 is a diagram showing an HT mask pattern and an optical response characteristic of the liquid crystal panel 33 in HT driving in Example 8 according to the second embodiment of the present invention;
FIG. 18 is a diagram showing an HT mask pattern of Example 10 according to the second embodiment of the present invention.
FIG. 19 is a diagram showing an HT mask pattern of Example 11 according to the second embodiment of the present invention.
FIG. 20 is a diagram showing a basic form of an HT mask pattern for each RGB pixel of Example 12 according to the second embodiment of the present invention and an HT mask pattern of RGB pixels when the HT mask pattern of the basic form is applied; is there.
FIG. 21 is a diagram showing an HT mask pattern of Example 12 according to the second embodiment of the present invention.
FIG. 22 is a block diagram of a first image conversion processing circuit in Example 14 according to the second embodiment of the present invention;
FIG. 23 is a block diagram of a second image conversion processing circuit in Example 14 according to the second embodiment of the present invention;
FIG. 24 is a block diagram of a third image conversion processing circuit in Example 14 according to the second embodiment of the invention;
FIG. 25 is a diagram illustrating an optical response of a pixel subjected to only HT processing in Example 14 according to the second embodiment of the present invention.
FIG. 26 is a diagram showing an optical response of a pixel subjected to HT processing and overdrive processing in Example 14 according to the second embodiment of the present invention.
FIG. 27 is a diagram showing a circuit configuration for switching a gradation reference voltage according to a second embodiment of the present invention.
FIG. 28 is a diagram schematically illustrating a transmission state of a video signal in an interlace method.
FIG. 29 is a diagram schematically illustrating a state in which an interlace video signal is displayed on a CRT.
FIG. 30 is a diagram schematically illustrating a conventional technique for displaying an interlaced video signal on a liquid crystal panel.
[Explanation of symbols]
2 pixels
23 Liquid crystal display
24 System unit
26 Video signal converter
27 Image determination unit
28 HT mask generator
29 HT calculator
30 LCD controller part
31 Source Driver IC
32 Gate driver IC
33 LCD panel

Claims (6)

High gradation side data and low gradation side data are generated from each image signal input by the interlace method,
Determine whether the image signal is for odd lines or even lines,
When displaying the image by mixing the high gradation side data and the low gradation side data at least one of temporally or spatially based on the determination result ,
In the odd frame for displaying the odd line image signal, the high gradation side data and the low gradation side data are generated from the odd line image signal and displayed on the odd line and the even line.
In the even frame for displaying the even line image signal, the high gradation side data and the low gradation side data are generated from the even line image signal and displayed on the odd line and even line. Processing method. The image processing method according to claim 1 ,
In the odd frame, the high gradation side data is written to the odd lines, and the low gradation side data is written to the even lines.
In the even frame, the high gradation side data is written to an even line, and the low gradation side data is written to an odd line. The image processing method according to claim 1 ,
In the odd frame, the high gradation side data is written to even lines, and the low gradation side data is written to odd lines.
In the even frame, the high gradation side data is written to an odd line, and the low gradation side data is written to an even line. The image processing method according to claim 2 or 3 ,
An image processing method, wherein lines for writing the high gradation side data and the low gradation side data are sequentially replaced for each frame. The image processing method according to claim 1 ,
In the odd frame,
Write the high gradation side data to the end pixels of the odd lines, and sequentially write the low gradation side data and the high gradation side data to the pixels in the line,
Write the low gradation side data to the end pixels of the even lines, and sequentially write the high gradation side data and the low gradation side data to the pixels in the line,
In the even frame,
Write the low gradation side data to the end pixels of the odd lines, and sequentially write the high gradation side data and the low gradation side data to the pixels in the line,
An image processing method, wherein the high gradation side data is written to end pixels of an even line, and the low gradation side data and the high gradation side data are alternately written sequentially to pixels in the line. Sealing a liquid crystal between a pair of substrates, a liquid crystal display device, characterized in that a drive circuit for implementing the image processing method according to any one of claims 1 to 5.

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