TW200412661A - Electrostatic discharge protection device - Google Patents

Abstract

A diode device for an electrostatic discharge (ESD) protection circuit includes a P-type substrate, a buried N+ heavily doped semiconductor layer implanted in the P-type substrate and bounded by a deep trench isolation, a P well disposed above the buried N+ heavily doped semiconductor layer in the P-type substrate and isolated from the P-type substrate by the deep trench isolation. A P+ doped region, which serves as an anode of the diode device, is located in the P well. A N+ doped region, which serves as a cathode of the diode device, is laterally disposed in the P well and spaced apart from the P+ doped region. The P+ doped region, the buried N+ heavily doped semiconductor layer, and the P-type substrate constitute an open base parasitic PNP bipolar transistor.

Description

200412661 V. Description of the invention (1) The technical field to which the invention belongs The invention relates to an electrostatic discharge (ESD) protection circuit, especially a bipolar / bipolar complementary transistor (Bi polar / BiCMOS) process or SiGe-Bi CMOS process is compatible with the diode string ESD protection element structure, which has an open base parasitic PNP bipolar transistor, thereby achieving the purpose of low leakage current. Prior technology Static electricity can be said to be omnipresent, and any two objects made of different materials can cause static electricity. And when an object with static electricity, such as the human body, comes into contact with the metal pins of IC, the instantaneous high-voltage discharge will affect the internal circuit through the metal pins. Therefore, the damage caused by electrostatic discharge, It is likely to cause the failure of the electronic system. The main function of the electrostatic discharge protection circuit is to start the electrostatic discharge pulse before it reaches the internal circuit when an electrostatic discharge occurs, so as to quickly eliminate the excessive voltage and reduce the damage caused by the electrostatic discharge phenomenon. At the same time, the protection circuit must also be able to withstand the energy of the electrostatic discharge pulse without causing damage to the protection circuit itself. It is known that electrostatic discharge protection circuits often combine so-called diode strings.

Page 7 200412661 V. Description of the invention (2) (diode string) design, using a diode string with excellent ESD capacity in forward stress, providing an electrostatic discharge path. The diode can be applied in Such as power clamp circuit, electrostatic discharge protection between different power pads (such as between Vccl and Vcc2 or between Vssl and Vss2), or applied to the design of a trigger circuit . Please refer to Figure 1. Figure 1 is a schematic cross-sectional view of a conventional electrostatic discharge protection circuit using a diode string structure. As shown in Figure 1, a four-stage diode string is taken as an example. It consists of four independent diodes connected in series, that is, the N-type well of the previous diode is doped with an N. The hetero area is electrically connected to the p + junction of the next diode. The four serially connected two-pole systems are formed in a p-type substrate 10, and each diode includes a P-doped region 3 a to 3 d provided in a floating N-type well 9 a to 9 d and N # miscellaneous regions 4a ~ 4d. For example, the first diode in the diode string in FIG. 1 includes a p-doped region 3 3 electrically connected to a power source V, a peripheral power source vccp, and an n-doped region 4a, in which the P-doped region The hetero region 3 a and the N-doped region 4 a are both formed in the N-type well 9 a, and the N-type well 9 a is formed in the P-type substrate 10. As shown in the figure, the series connection of the individual diodes can be electrically connected with any appropriate layer of metal wires 12, and the connection method of the metal wires 12 is connected from the Nil domain of the diode of the previous stage (previus st age) to the next stage. The p-constant domain of the diode, that is, as shown in FIG. 1, Nil domain 4a is electrically connected to Pi domain 3b, N11 domain 4b is electrically connected to P11 domain 3c, and so on. At the cathode end of this diode string N II domain 4d-usually grounded or electrically connected to the interior

200412661 V. Description of the invention (3) Power supply V c c. However, the above-mentioned conventional diode string architecture has serious leakage currents. Taking the first diode in Figure _1 as an example, this is because the P junction 3 a, N-type well 9 a, and P-type substrate 1 0 constitute a parasitic PNP bipolar transistor. (Bipolar junction transistor), so that the diode generates a substrate leakage current in the p-type substrate i0 direction (I sub = I # 万 / (1+; 5)). The more diodes there are, the more serious the leakage problem becomes. The relationship between the overall substrate leakage current I sub tota of the diode string in Figure 1 and the vertical current gain can be expressed as follows:

Isub, total = Ι ^ < β (1 / (1 + / 5) + 1 / (1 + / 3) 2 + 1 / (1 + ^) 3 + 1 / (1 + β) 4) The leakage current phenomenon makes the voltage drop of the diode string cannot be amplified in proportion to the turn-on voltage of a single diode when the diodes are connected in series, which causes a lot of trouble in circuit design. From the above, it can be known that the traditional ESD protection circuit technology combined with the diode_architecture is not ideal in terms of circuit structure and performance, and needs to be further improved. SUMMARY OF THE INVENTION The main object of the present invention is to provide a structure of a diode string ESD protection device which has low leakage current and is compatible with a bimorph complementary bimorph (BiCMOS).

200412661

Another object of the present invention is to provide a diode string Es device structure, which has an open base (open-base) parasitic p N p dual-load, and can reduce the leakage current of the ESD protection circuit. Another aspect of the present invention is to provide a low-leakage current two-pole ESD protection element structure, which can be applied to power supply clamping circuits, electrostatic discharge protection between different punch pads, or applied to the design of a trigger circuit to achieve the above purpose. The invention provides a diode element which can be used for ESD protection, which includes a P-type substrate; a buried N 芈 conductor layer is implanted in the P-type substrate and is isolated by a deep insulating shallow trench; a well is provided. On the buried N + semiconductor layer and isolated from the P-type substrate by the deep insulation trench; a p-doped region is set in the p-type well and is used as the anode of the polar element (anode ); And an n-doped region is provided in the P-type well, and is used as the cathode of the diode element ", wherein the P-doped region, the buried semiconductor layer, and the P-type The base constitutes a parasitic PNP double carrier transistor with an open base. In order for your reviewers to better understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However attached Schematic is for reference only , And is not used for &. For addition to the present embodiment by way of limitation

200412661 V. Description of the invention (5) Please refer to FIG. 2. FIG. 2 is a schematic cross-sectional view of a diode string electrostatic discharge protection circuit according to a preferred embodiment of the present invention. As shown in Figure 2, a four-stage diode string is also taken as an example, which is formed by concatenating four independent diode structures 2a ~ 2d, that is, the previous diode The N junction is electrically connected to the p junction of the next diode. The four serially connected diodes 2 a to 2 d are formed in a P-type substrate 20, and each diode includes a p-doped region (or P-junction) 3 a to 3 d and N-doped. Zone (or N junction) 4a ~ 4d. The P-doped region (or P-junction) and N-doped region (or N-junction) of each 'one-pole body are set in a floating P-type well 2 9 a to 2 9 d, and the p-type well 2 9 a is formed on a buried N + semiconductor layer 30 a. For example, the first diode 2a of the diode string t in FIG. 1 includes a p-doped region 3a electrically connected to a power source Vd or a peripheral power source Vccp, and an N-doped region 4a, where P is doped The regions 3 a and the N-kap region 4 a are both formed in the P-type well 2 9 a, and the P-type well 2 9 a is formed in the buried N + semiconductor layer 30 a that is implanted. The p-doped region (or P-junction) and the N-doped region (or n-junction) of each diode are separated by a STI layer 50 (STI layer) 50. The fire of each diode = The wells 29a to 29d and the buried Ntf conductor layer 30a are formed by _ deep insulation P channel (Ueep trench iso 1 at ion) 6 0 and other adjacent two poles:. Generally, the shallow trench insulation layer (STI layer) 50 is about 0.3 mm thick, and the depth of the deep insulation trench 60 is about 4 to 5 microns. 'As shown in Figure 2, similarly, the series connection of individual diodes can be electrically connected with any k metal wires. The connection method of the metal wires is from the previous level.

200412661 V. Description of the invention (6) The N junction of the diode of the previous stage is connected to the P junction of the diode of the next stage, that is, as shown in FIG. 2 'N junction The 4a series is electrically connected to the P interface 3b, the N interface 4b is electrically connected to the P interface 3c, and so on. The cathode terminal (cathode terminal) N junction 4d of this diode string is generally grounded or electrically connected to the internal power source Vcc. Because the present invention sets the P junctions 3a ~ 3d and N junctions 4a ~ 4d of each diode in a floating P-type well 29a ~ 29d, the P-type wells 29a ~ 29d are arranged in a buried N-doped layers 30a ~ 30d of the above-mentioned type, and P-type wells 29a ~ 29d and N-doped layers 30a ~ 30d are isolated by a deep insulation trench 60, so the P junction, the P-type well, and the buried type The N-doped layers can form a parasitic PNP bipolar transistor with an open base configuration. The characteristic of this parasitic PNP bipolar transistor with an open base configuration is that when the voltage VD is greater than or equal to the turn-on voltage of the diode, the leakage current in the substrate direction will increase significantly. Therefore, the diode can be used in the When designing an ESD circuit in series, the voltage drop across the diode string can be amplified in proportion to the turn-on voltage of a single diode, thus avoiding trouble in circuit design. It is important to note that the fabrication of the buried N 芈 conductor layer 30a ~ 30d and the deep insulation trench 60 are compatible with the Bipolar / BiCMOS process. The main features of the invention are familiar to those skilled in the art and will not be repeated here. Please refer to FIG. 2D. FIG. 2 is a schematic cross-sectional view of a typical Bipolar structure 70. The 1 polar structure 70 also includes a deep insulation trench 701 and. Buried

200412661 V. Description of the invention (7) Formula N + semiconductor layer 702. In the SiGe-BiCMOS process, the purpose of fabricating buried n semiconductor layers and deep insulation trenches is to provide lower collector resistance, and the latter is to prevent substrate noise and to isolate it. use. In the design of the diode string of the present invention, using the Si Ge-BiCMOS process steps, the same / uninsulated trench is also produced to isolate the p-we 1 1 diode and the p-type substrate p _ we Η diode The P-doped regions 3a to 3d and the P-type substrate 20 form a parasitic PNP bipolar transistor with an open base. Since the parasitic pNp electric carrier of the open base has a erbium-doped base (ie, a buried N + semiconductor layer 30a ~ 30d), the current gain can be reduced by / 5, so the leakage current ( I — ce〇currentm is small. Compared with the conventional technology, the present invention adopts a buried N + semiconductor layer 30a ~ 30d / wood insulation trench compatible with the process of Bip〇lar / BiCM〇 ^ 二 Ge PGe—BiCM〇S Made of 60, a novel ESD protection element is designed for the diode _ Es_ protection circuit. Because it has the characteristics of an open base configuration 1 and a PNP bipolar transistor, it has a low leakage current. All the advantages show that the present invention has fully complied with the legal requirements of the Patent Law ϋ ΐ Applicability, newness, and progress, etc., and relies on patents / applications' Please check and approve the patent in this case. Γ, i are only the preferred embodiments of the present invention, and any equivalent changes and modifications made according to the present application No. 2 and Han Yuwei shall fall within the scope of the invention patent <

200412661 Brief description of the diagram Brief description of the diagram Figure 1 is a schematic sectional view of a conventional diode string electrostatic discharge protection circuit. Figure 2 is a schematic cross-sectional view of a diode string electrostatic discharge protection circuit of the present invention. Figure 3 is a schematic cross-sectional view of a typical Bipola r structure. Schematic symbol description

2a ~ 2d Diode structure 3a ~ 3d P doped region (or P junction) 4a ~ 4d N yad region (or N junction) 9a ~ 9d Floating N-well 10, 20 P-type substrate 2 9 a ~ 2 9 d Floating P-type wells 30a ~ 30d Buried N + semiconductor layer 50 STI layer 60 Deep insulation trench 70 Typical B i ρ ο 1 ar structure 701 Deep insulation trench 702 Buried N + semiconductor layer

Claims (1)

200412661 Several pieces 6. Application scope 1. Kinds can be used for L · O-P-type substrate; An embedded N 芈 conductor layer is planted in the p-type insulation shallow trench isolation; P-type wells in t-substrate are set in the buried The shallow trenches of the N + semiconductor acoustic deep insulation are isolated from the P-type substrate; "J: contains: and is formed by a deep 'and through the p-doped region in the p-type well, and the anode ( anode); and an N-doped region as the diode element, which is provided in the P-type well, and a cathode; used as the diode element in which the P-doped region and the buried N + Semiconductor sound floor constitutes a parasitic PNP bipolar transistor with an open base ^. The P-type substrate is about 4 to 5 microns deep in the deep insulating shallow trench in the ESD protection as described in item 丨 of the patent application scope. The structure of the leaves is as follows: 3. A shallow trench insulation is provided between the P-doped region and the N-doped region in the ESD protection element described in item 1 of the patent application scope. The shallow trench insulation layer in the ESD protection element described in the patent scope item 3 is about 0.3 to 0.5 microns deep. 5. Its 5. A diode string circuit that is compatible with Bipolar / BiCMOS process, including: 200412661 VI. Patent application scope: A plurality of diode devices connected in series on a p-variable substrate, each The pole piece includes: a buried N + semiconductor layer implanted in the p-type substrate and isolated by a deep insulating shallow trench; / a P-type well provided in the buried N 芈 conductor Layer, and is isolated from the P-type substrate by the deep insulating shallow trench; 9 ~ a P-doped region is provided in the P-type well and serves as an anode of the diode element; and a An N-doped region is provided in the P-type well and serves as a cathode of the diode element. 6. A diode string circuit compatible with the Bipolar / BiCM0s process as described in item 5 of the scope of the patent application, wherein N of one of the plurality of diode elements connected in series is N The doped region is electrically connected to the p-knee region of the next diode element. 7. The diode string circuit compatible with Bi polar / BiCMOS process as described in item 5 of the scope of patent application, wherein the P diode of the first diode element of the plurality of diode elements connected in series is The district is electrically connected to a voltage VD or a peripheral power source Vccp. 8. The diode string circuit compatible with Bipolar / BiCM0S and process as described in item 5 of the scope of the patent application, wherein the P-doped region, the buried N + semiconductor layer and the p-type substrate constitute a Parasitic PNp dual load of open base 200412661 VI. Application scope Patent transistor. 9. The diode string circuit compatible with the Bipolar / BiCMOS process as described in item 5 of the scope of patent application, wherein the deep insulation shallow trench is about 4 to 5 micrometers deep. 10. The diode string circuit compatible with the Bipolar / BiCMOS process as described in item 5 of the scope of the patent application, wherein a shallow trench insulation layer is isolated between the P-doped region and the N-doped region. 11. The bipolar / BiCMOS process-compatible diode string circuit as described in item 10 of the patent application scope, wherein the shallow trench insulation layer is about 0.3 to 0.5 micron deep. Page 17