TW200409203A - Epitaxial growth method for metamorphic strain-relaxed buffer layer having nitrogen compound - Google Patents

Epitaxial growth method for metamorphic strain-relaxed buffer layer having nitrogen compound Download PDF

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TW200409203A
TW200409203A TW93102248A TW93102248A TW200409203A TW 200409203 A TW200409203 A TW 200409203A TW 93102248 A TW93102248 A TW 93102248A TW 93102248 A TW93102248 A TW 93102248A TW 200409203 A TW200409203 A TW 200409203A
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layer
nitride
indium
buffer layer
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TW93102248A
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Rui-Ming Lin
Ze-En Ni
hui-tang Shen
Bo-Ren Fang
rui-yu Wang
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Nan Ya Photonics Inc
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Abstract

The present invention provides an epitaxial growth method for metamorphic strain-relaxed buffer layer having nitrogen compound, which uses the step-gradual or linear gradual method to grow the (AlyGa1-y)1-xInxN) metamorphic strain-relaxed buffer layer, and to employ the epitaxial growth technique for (AlyGa1-y)1-xInxN) and the metamorphic strain-relaxed buffer layer structure to develop the nitrogen compound semiconductor device.

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200409203 政、發明說明: 【發明所屬之技術領域】 本發明係一種具有氮化合物介穩式應力釋放緩衝層之磊晶成長方法, 具有釋放材料内部應力作用之氮化合物半導體異質結構及其製法,尤指一 種具有(AlyGai-y)i-xInxN)介穩式應力釋放緩衝層之磊晶成長技術。 【先前技術】 本發明係隸屬一種介穩式(metamorphic)氮化銦鎵/氮化銦 铭(InGaN / InAIN)異質結構的之應用,尤指搭配一種利用介 穩式緩衝層方式成長高銦含量氮化銦鎵(InxGai_xN)以及氮化銦 鋁(InxAli-xN)結構之方法,形成結構低應力殘存且低材料内部 缺陷之一種具有氮化合物介穩式應力釋放緩衝層之磊晶成長方 法。 按,氮化鎵系列材料的發展至今已超過二十年,由於此一 系列材料的能隙分佈涵蓋紫外光至黃綠光波段,致使氮化鎵系列 材料成為發展藍光以及紫外光發光元件的主流。然而,在早期三 五族氮化物半導體磊晶材料的製備上,受限於缺乏晶格常數相匹 配的基底(substrate)材料,以致於發展遲緩。而氮化鎵材料 研究發展之濫觴,起源於1983年S· Yoshida等人以分子束磊晶 法在藍寶石(sapphire)基板上以高温成長氮化鋁(A1N)材料 作為緩衝層(buffer layer),再於其上成長氮化鎵,此法獲得 結aa較佳之氣化叙蠢晶層。緊接著名古屋大學赤崎勇(I Akasaki)教授研究群發現,利用有機金屬化學氣相沉積法(M〇CVD 或0MVPE)均勻在監寶石基板上,先以低溫(〜6⑽。◦)成長一層 氮化鋁薄膜,再以咼溫(〜l〇〇〇QC )所成長的氮化鎵可以獲得如 鏡面般的蠢晶品質。 由氮化鎵磊晶材料的發展歷程來看,由於無法成長獲得大 200409203 面積且缺陷少之氮化蘇基板,因此,目前大部分只能以sapphire 或SiC做為氮化鎵成長基板。而緩衝層的成長技術則是獲得高品 質氮化鎵磊晶層的關鍵。由於此一缓衝層涉及異質成長 (heterogenerous growth),因此如何利用緩衝層的特性以成 長高品質的氮化鎵薄膜,為發展氮化鎵系列元件的先決條件。目 前有關成長氮化鎵材料時所應用之缓衝層技術主要有: 低溫成長A1N缓衝層 最早使用的緩衝層材料為A1N。1988年H. Amano與I. Akasaki等人利用以M0CVD在sapphire上以600°C低溫成長 A1N,然後再以1040°C高溫成長GaN,可以獲得品質優良的GaN, 其室溫載子濃度約3xl017cnT3,電子移動率約350〜430cm2/V-sec。 低溫成長GaN緩衝層 1991 年 S. Nakamura 用 M0CVD 法在 450〜600°C 低溫成長 GaN 做緩衝層,再升溫至1000°C以上成長約4//m後的GaN,其室溫 載子濃度低至4xl016 cm_3,電子活動率高達600 cm2/V-sec。一 般而言,緩衝層厚度約在200A為最佳。200409203 Description of politics and invention: [Technical field to which the invention belongs] The present invention relates to an epitaxial growth method with a nitrogen compound metastable stress release buffer layer, a nitrogen compound semiconductor heterostructure with a function of releasing internal stress of a material, and a method for producing the same, especially It refers to an epitaxial growth technology with (AlyGai-y) i-xInxN) metastable stress relief buffer layer. [Previous technology] The present invention belongs to the application of a metamorphic indium gallium nitride / indium nitride (InGaN / InAIN) heterostructure, especially with a method of using a metastable buffer layer to grow high indium content. A method of indium gallium nitride (InxGai_xN) and indium aluminum nitride (InxAli-xN) structures is an epitaxial growth method with a nitrogen compound-stable stress release buffer layer with low structural residual stress and low internal material defects. According to the development of GaN materials, more than 20 years have passed. Because the energy gap distribution of this series of materials covers the ultraviolet to yellow-green light bands, GaN materials have become the mainstream for the development of blue and ultraviolet light-emitting devices. However, in the preparation of early Group III-Nitride semiconductor epitaxial materials, it was limited by the lack of substrate materials that matched the lattice constants, which resulted in slow development. The origin of the research and development of gallium nitride materials originated in 1983 by S. Yoshida et al. Who used molecular beam epitaxy to grow aluminum nitride (A1N) material as a buffer layer on a sapphire substrate at high temperature. Then, gallium nitride is grown thereon, and this method obtains a better gasification layer with a better aa junction. Immediately following the research group of Professor I Akasaki of the famous Furiya University, it was found that the organometallic chemical vapor deposition method (MOCVD or 0MVPE) was used to uniformly lay on the supervised gemstone substrate, and a layer of nitride was first grown at a low temperature (~ 6⑽. ◦). Aluminum thin films, and then gallium nitride grown at a high temperature (~ 100QC) can obtain a mirror-like stupid crystal quality. Judging from the development history of GaN epitaxial materials, since it is impossible to grow to obtain a large nitride substrate with a large area of 200409203 and few defects, currently, most of them can only use sapphire or SiC as the gallium nitride growth substrate. The growth technology of the buffer layer is the key to obtaining a high-quality GaN epitaxial layer. Since this buffer layer involves heterogenerous growth, how to use the characteristics of the buffer layer to grow high-quality GaN films is a prerequisite for the development of GaN-based devices. The current buffer layer technologies used in growing GaN materials are: Low-temperature growth A1N buffer layer The earliest buffer layer material used is A1N. In 1988, H. Amano and I. Akasaki et al. Used M0CVD to grow A1N on sapphire at a low temperature of 600 ° C, and then grown GaN at a high temperature of 1040 ° C to obtain high-quality GaN with a carrier concentration of about 3xl017cnT3 at room temperature. The electron mobility is about 350 ~ 430cm2 / V-sec. Low-temperature growth GaN buffer layer In 1991, S. Nakamura used MOCVD method to grow GaN at 450 ~ 600 ° C as a buffer layer, and then increased the temperature to above 1000 ° C to grow GaN after about 4 // m. Its carrier concentration was low at room temperature. Up to 4xl016 cm_3, the electronic activity rate is as high as 600 cm2 / V-sec. In general, the thickness of the buffer layer is preferably about 200A.

InN/GaN 或 InN/InGaN/GaN 緩衝層 T· Kchi等人以InN做為緩衝層材料,在低溫( 500〜600°C ) 成長300A厚度時獲得較高的電子移動率,且其位錯缺隔只有6x 108cirT2,而若單獨以500°C成長GaN厚度約200A做緩衝層,則位 錯缺隔高達4父109〇11_2。1^8(3〇"^[61'11等人利用11163!^/6&1^做緩 衝層,在於其上成長單一量子井LED結構,證明以InGaN做為緩 衝層亦可得到高品質的材料。 超晶格緩衝層 X· Zhang 等人在 525 C時用多層 (3〜12 ) AlxGal-xN(5nm)/GaN(3nm)超晶格結構做為緩衝層,在於其上高 200409203 溫成長p-GaN,其結果指出多層缓衝層結構比單層緩衝層有較好. 的PL光譜強度響應。 *InN / GaN or InN / InGaN / GaN buffer layer T. Kchi et al. Used InN as the buffer layer material, and obtained a higher electron mobility when growing at 300A thickness at low temperature (500 ~ 600 ° C), and its dislocations were lacking. The gap is only 6x 108cirT2, and if the GaN layer is grown at 500 ° C with a thickness of about 200A as the buffer layer, the dislocation gap is as high as 4 × 109 × 11_2. 1 ^ 8 (3〇 " ^ [61'11 et al. Use 11163 ! ^ / 6 & 1 ^ As a buffer layer, a single quantum well LED structure is grown thereon, which proves that high-quality materials can also be obtained with InGaN as a buffer layer. X. Zhang et al. At 525 C A multilayer (3 ~ 12) AlxGal-xN (5nm) / GaN (3nm) superlattice structure is used as the buffer layer, and the p-GaN is grown at a temperature higher than 200409203. The result indicates that the structure of the multilayer buffer layer is higher than that of the single layer buffer. The layer has a better PL spectral intensity response. *

彌向屋晶成長-EL0G s. Nakamura 等人首先提出 Epitaxial Lateral 〇vergr〇wth 的方式(又稱為『聽』法),成長高品質氮化鎵材料。其方法 首先在sapph i re基板上用M0CVD成長約2 # m後之GaN,之後在 上面放置Si02做為遮蔽面罩(mask),如第一圖所示,之後在 開口成長後的氮化鎵緩衝層,在於其上成長雷射結構。此法成長 之GaN由於在Si02以下的位錯缺陷(disl〇cati〇n)被擋 住而無法向上延伸,因此降低了上層GaN的缺陷密度,然而在開· 口上方之GaN仍然有較多的缺陷,同時,在·上方中間處會 有裂痕(crake)產生,因此高品質之材料區域有限。a. usui 提議利用兩次ELGG法成長GaN可以更進_步減少材料中之缺陷 密度。 邀空長晶法Pendeo-Epi taxv T. Zheleva及Κ· Lithicum等人提出用懸空長晶法在SiC 基板上4長elgg基板,如第二圖所示。而s·触⑽㈣等人也 利用此法在sapphire之上成長則G基板,可以獲得更優良之材 # 料品質。 ,以上不同的緩衝層成長技術,主要目地是要使得成長在緩 ,層以上的GaN材料可以獲得低背景濃度、低差排缺陷的高品質 蟲晶層。目前-般而言’在以低溫(5G()〜6G(rc )成長緩衝層後, 再以高溫(1000〜1100。(:)繼續成長Si摻雜N型㈣薄膜,厚度 約2〜3/zm之間,其缺陷密度約在〜i〇9cm_3之間。 目前有Μ三五族氮化«麟料的研究發表讀,主要以 氮化鎵、氮化銦、氮化料二元化合物以及氮化銦鎵、氮化銘嫁 7 200409203 三元化合物為主,其材料相關特性也有需多文獻發表,然而,由 氮化銦及氮化鋁組成之氮化銦鋁(InxAll_xN)三元化合物以及氮 化銦鋁鎵((AlyGaw)hIruN)四元化合物的相關研究,由於材料 特性的限制,導致至目前為止仍然發展遲緩。一般而言,由於The growth of Mi Xiangyajing-EL0G s. Nakamura et al. First proposed the Epitaxial Lateral 〇vergr〇wth method (also known as the "listening" method) to grow high-quality gallium nitride materials. The method firstly grows GaN on the sapph i re substrate by about 2 #m with M0CVD, and then places SiO2 on it as a mask, as shown in the first figure, and then grows the gallium nitride buffer after the opening. Layer, on which the laser structure grows. The GaN grown by this method cannot be extended upward due to dislocation defects (disl0catiON) below SiO2, so the defect density of the upper layer GaN is reduced, but the GaN above the opening still has many defects. At the same time, there will be crakes in the middle of the upper part, so the area of high-quality materials is limited. a. usui proposes that using two ELGG methods to grow GaN can further reduce the defect density in the material. Invited air-growth method Pendeo-Epi taxv T. Zheleva and K. Lithicum et al. Proposed a four-length elgg substrate on a SiC substrate using a suspended-growth method, as shown in the second figure. S. Touch and others also use this method to grow on the sapphire G substrate, you can get better material # material quality. The above-mentioned different buffer layer growth technologies are mainly aimed at making the growth slow, and the GaN material above the layer can obtain a high-quality worm crystal layer with a low background concentration and low differential discharge defects. At present-generally speaking, after growing the buffer layer at a low temperature (5G () ~ 6G (rc)), and then continue to grow a Si-doped N-type hafnium film at a high temperature (1000 ~ 1100. (:), the thickness is about 2 ~ 3 / Between zm, its defect density is about ~ 109cm_3. At present, there are researches on the M group III nitride nitride materials, mainly gallium nitride, indium nitride, nitride binary compounds, and nitrides. Indium gallium and nitride nitride are mainly ternary compounds. 200409203 The ternary compounds are mainly related to their material properties. However, many materials need to be published. However, indium aluminum nitride (InxAll_xN) ternary compounds composed of indium nitride and aluminum nitride and nitride Related research on indium aluminum gallium ((AlyGaw) hIruN) quaternary compounds has been slow to date due to the limitation of material properties. Generally speaking, due to

GaN與InN的晶格常數不同,所以比在GaN中的溶入率有一定 的限制,而在氮北銦鎵(InxGai_xN)的成長中,隨著銦含量的增 加,會因相位分離(phase separation)而產生多相混合物,導 致組成成分比例不%,而此一現象也同樣發生在氮化㈣ (ΙηχΑΙ^Ν)中,這也是在成長氮化銦鋁材料過程中所面臨的主 要挑戰。 ▲然而,氮化銦鋁材料的研究開發潛力主要是在於若能適當 的為正組成比例’則可以獲得晶格相匹配的異質能隙結構。在傳 統三五族氮化物異質結構系統中,寬/窄能隙材料之間(如 A1 GW/GaN、GaN/1 nGaN)由於晶格常數不匹配,導致材料在成長 過程中,為避免晶格缺陷的產生而受到許多限制,也影塑了元件 的整體性能。若能搭配In副材料形成異f接面,則晶^不匹配 所造成的材料内應力將可獲得控制。例如:n』與㈣ 之間即可構成晶格匹配之異質結構,避免應力造成材料缺陷的產 生以及材料特性的不穩定。 另一方面,珅化鎵系列材料的四元化合物成長技術,如鱗 =銦鎵㈤nGaP),目前發展已日臻完善1而,氮化嫁系 列材枓的四凡化合物材料((MU· aU〇ys)至目前為 ^的發展健遲緩,而A1I_騎料成長技術的掌握與材料特 性的瞭解,實為發展氮化鎵系列四元化合物材料的關鍵。 氮化鎵材料的發展,大部分著重在半導體光電元件方面, 。發光二極體與雷射二極體,特別是刪年代&趾⑽聊以 200409203 及L Akasakl教授等許多研究團隊相繼在氮化鎵材料成長、駐 光發光以及雷射一極體的開發上獲得重大突破 夕 團對投入在此-系列材料的光電元件製造與特性研寸究上 領域研究的蓬勃發展主要是由於氮化録材料實現了藍紫光發光 :件=的五可,。然而:相:於氮化鎵材料在光電元件方面㈣ 展潛力。 〃料¥體讀方面’仍然有很大的發 表-為常見半導體材料的部分特性參數 現^電子移導率而言,石申化鎵系列材料具有最優異的表現。^ ^在材料雜上,料鎵的表現以如其 碳化石夕材料雖然有優異的熱傳導特性,㈣於電子 !:上:有適當的異質結構材料作搭配,因此限制了此—材“ 270件方面的應用。特別值得注意的是氮化㈣列材料··不僅 具有不錯的電子移動率’同時也具有較高的崩 子飽和速率以及不錯的熱傳導係數 鎵、電 叙、乳化銦㈣成異質接面結構,因此,氮化鎵系列材料 =做為發展可高溫操作、高功率、高電子移動率電晶體的材料 〃目前氮化鎵材料系列發展高電子移動率電晶體方面,主要 ^ (A1GaN/GaN) ^1 ^ ° 二 枓本身具有的極化特性(spontaneous f °Ω),再加上異質結構系統中所導致的㈣極化場 2= rnie field)(如第三圖)’使得大量的電子聚集 在異貝接面處,而異質能帶結構的偏移(ban“ =材料线在不諸_情況下即能在接面處形成高電子密f X -維好雲結構。因此’關於三五族氮化物材料異質接面二 9 200409203 維電子雲特性的研究與瞭解,實有助於高功率HEMT的研究開發。 在傳統的場效電晶體中,電子必須在高濃度摻雜的通道層 中傳輸,然而高濃度的摻雜同時也增加了電子在移動過程中受到 雜質散射(impurity scattering)的機率,因而限制了元件在 u應用上的特性。為了進—步提升高頻場效電晶體元件的特性 放月b異貝接面場效電晶體逐漸扮演著重要的地位。The lattice constants of GaN and InN are different, so there is a certain limit to the dissolution rate in GaN. In the growth of nitrogen indium gallium (InxGai_xN), as the content of indium increases, phase separation will occur due to phase separation. ) To produce a heterogeneous mixture, resulting in a non-% composition ratio, and this phenomenon also occurs in hafnium nitride (ΙηχΑΙ ^ N), which is also the main challenge in the process of growing indium aluminum nitride materials. ▲ However, the research and development potential of indium aluminum nitride material is mainly that if a positive composition ratio can be appropriately used, a lattice-matched heterogeneous energy gap structure can be obtained. In traditional III-N nitride heterostructure systems, wide / narrow energy gap materials (such as A1 GW / GaN, GaN / 1 nGaN) have mismatched lattice constants, which leads to the growth of the material in order to avoid the lattice. There are many restrictions on the generation of defects, which also affect the overall performance of the component. If it can be used with the In sub-material to form a hetero-junction, the internal stress of the material caused by the mismatch of crystals can be controlled. For example, a lattice-matched heterostructure can be formed between n ″ and ㈣ to avoid stress from causing material defects and unstable material characteristics. On the other hand, the quaternary compound growth technology of gallium halide series materials, such as scale = indium gallium (nGaP), has been improved day by day1. Sifan compound materials ((MU · aU〇ys ) Until now, the development has been slow, and the mastery of A1I_ material growth technology and understanding of material characteristics is the key to the development of gallium nitride series quaternary compound materials. The development of gallium nitride materials mainly focuses on In the field of semiconductor optoelectronic components, light-emitting diodes and laser diodes, especially the era & toe talk about 200409203 and Professor L Akasakl and many other research teams have successively grown in gallium nitride materials, standing light emission and laser A major breakthrough was achieved in the development of a polar body. The group's vigorous development in the field of optoelectronic element manufacturing and characteristics research of this series of materials is mainly due to the blue-violet light emission achieved by nitride recording materials: Yes. However: Phase: The potential of gallium nitride materials in the development of optoelectronic components. It is still very much published on the material reading-there are some characteristics of common semiconductor materials ^ In terms of sub-conductivity, Shishenhua's gallium series materials have the best performance. ^ ^ On the material miscellaneous material, the performance of gallium is as good as that of its carbide carbide material, although it has excellent thermal conductivity characteristics. There are suitable heterostructure materials for matching, so the application of this material is limited to 270 pieces. It is particularly noteworthy that nitride nitride materials not only have good electron mobility, but also have high disintegration. Saturation rate and good thermal conductivity of gallium, galvanic, emulsified indium and rhenium into a heterojunction interface structure, therefore, gallium nitride series materials = as the development of high temperature operation, high power, high electron mobility transistor material 〃 current nitrogen In the development of high-electron mobility transistors for the gallium material series, the main ^ (A1GaN / GaN) ^ 1 ^ ° has two polarization characteristics (spontaneous f ° Ω), and the ㈣ caused by heterostructure systems Polarization field 2 = rnie field) (as shown in the third figure) 'causes a large number of electrons to gather at the hetero-shell junction, and the shift of the hetero-band structure (ban "= the material line can Junction shape High electron density f X -dimensionally good cloud structure. Therefore, the research and understanding of the characteristics of the three- and five-group nitride material heterojunctions 2 200409203 dimensional electron cloud really help the research and development of high-power HEMT. In the traditional field In an effect transistor, electrons must be transported in a highly doped channel layer. However, the high concentration of doping also increases the probability that the electrons are affected by impurity scattering during the movement, which limits the application of the device in u. In order to further improve the characteristics of high-frequency field-effect transistor components, the field-effect transistor with an isotope interface gradually plays an important role.

高電子移動率電晶體的發展,主要是起源於1960年代,y Η· Kr〇emer及RL·如如識提出了異質結構的概念。第四擾 (a)為砷化鋁鎵/砷化鎵所構成的異質接面結構,由於砷化杳 嫁的紹含量比率可以適當調整使其晶袼長數與坤化録相互已 配,因此在蟲晶界面上不會因應力產生而造成晶格缺陷的問題 由兩種能隙大小不同的半導體材料所形成的異質接面,^ 費米能階(Fenni level)必須相等,因此造成能帶 ;二;連續。如第四圖(b)所示’不連續的導電帶陷入 白以下,使得此一部分的能帶構造形成一個類似三角形, :又約為8GA的非連續電子能量量子井。此種異質結構可在不需 摻雜的情況下得至,丨古承工、曲命 而 電子r動,:1 時因消除了雜質散射效應使得The development of high electron mobility transistors mainly originated in the 1960s. YΗ · Kroemer and RL · Ruru proposed the concept of heterostructure. The fourth perturbation (a) is a heterojunction structure composed of aluminum gallium arsenide / gallium arsenide. Since the content ratio of arsenide can be appropriately adjusted so that the crystal length and Kunhualu match each other, so The problem of lattice defects caused by stress at the worm crystal interface is not caused by heterogeneous junctions formed by two semiconductor materials with different energy gap sizes. ^ The Fenni level must be equal, thus causing energy bands. ; Two; continuous. As shown in the fourth figure (b), the discontinuous conductive band falls below white, so that this part of the band structure forms a triangle-like, discontinuous quantum energy well of about 8GA. Such a heterostructure can be obtained without doping. 丨 ancient labor, meanwhile, the electrons move, and the impurity scattering effect is eliminated at 1: 1

率㈣提升,進而使元件具有更優良的高頻特性。 ^期㈣τ的結構μ碎化砰化鎵異質接面為主 ^南純度㈣化❹移動,因此,碎化鎵材料移動率 mobUity)即成為高速元件工作頻率的主 … ^-atthe,s,,, Blakeslee^7^^^ 包日日體(pseudomorphic—j^,p_ /、 子移動率及雷;± 伐&其主要是以電 .子飫和逮率更高的砷化銦鎵(InGaAs): 作為電子通道層(chflnn<a1】 、— 化合物 /砷化鎵作為里質接面a7610。第五圖(a)是以砷化鋁鎵 豕作為“接面的随,主要是利用坤化鎵靠近坤化銘鎵 10 200409203 界面處所形成的二維電子雲作為電子通道層。而在虛擬式—高電· · 子私動率電晶體的設計上,是以電子移動率更高的砷化銦鎵做為· 電子通這層,如第五圖(b)所示,在砷化鋁鎵/砷化鎵之間增加 了一層砷化銦鎵做為電子通道層。由於砷化銦鎵晶格常數較坤化 銘鎵以及砂化鎵的晶格常數為大,因此在坤化贿/_化鋼蘇/ 申化鎵異貝結構系統中’做為電子通道層的坤化銦鎵會因晶格常 數不匹配而產生壓縮應變(compress strain)。 一般而言,砷化銦鎵中的銦含量越大,電子的移導率越高。 然而,銦含量越大卻也造成晶格的不匹配性越高,此時,當通道 層的厚度大過所此承文應力的臨界厚度時,材料為了釋放應力而φ 產生缺陷’導致蠢晶品質的劣化,進而影響元件特性。一般虛擬 式-高電子移動率電晶體當中,坤化銦鎵(inxGaixAs)的銦莫耳比 例⑴以不超過0.2為限,主要就是為了避免銦含量過高導致 蠢晶品質的降低。 為了進-步提升銦含量,同時避免晶格常數不匹配所導致 的材料缺陷產生,另-種所謂介穩式(met猶phic)結構被提 出來。所謂『介穩式-高電子移動率電晶體』(metam〇rph i c—職τ Μ-_τ),其結構如第六圖所示,是骑變的方式逐步增㈣化 銦鎵的銦含量_,因此,料銦鎵與珅化鎵材料之間因晶格常 數不匹配所產生的材料應力會因銦含量的逐漸改變而逐漸釋 放。此外,由於主動層區域被刻意遠離基板材料,進而避免靠近 基板材料的缺陷影響元件主動層的特性。 以上簡單介紹氮化鎵系列材料在緩衝層結構成長技術上的 發展以及氮化鎵系列三元化合物材料成長技術飯頸與發展纸 力。而本發明之目的,主要是在研究發展具有metamQrphic應: 釋放緩衝結構之三五族氮化物發光元件及高速傳輪元件。 11 200409203 【發明内容】 是以,本發明的主要目的,在於提供一種已大部分完成氮化合物應力 釋放作用之一種具有氮化合物介穩式應力釋放緩衝層之磊晶成長方法。本 發明包含一種具有氮化合物介穩式應力釋放緩衝層結構以及低應力殘存 之氮化合物半導體元件結構。 為達成上述之目的,本發明提供了一種具有應力釋放作用之 高銦含量氮化合物半導體應力釋放緩衝層結構之製法,其包括以 下步驟: 設置一基底層; 於该基底層之上形成一氮化鎵成核層,並於該成核層之上形 成多層之緩衝層結構,此一多層或線性漸變應力釋放缓衝層結構 可為氮化銦銘鎵((AiyGai-y)i-xInxN),且\可選擇從〇〜1,y選 擇可從0〜1。 此外,每一應力釋放層的磊晶成長條件,如溫度(gr〇wth t⑽perature)、V/III &(flux rati〇)及成長速率(以⑽让 rate)等’彳于依每一應力釋放層之材料特性以及該層之組成與厚 度而作適當的調整。其主要之精神即在於氮化合物間因晶格不匹 配蠢晶成長所產生的應力釋放於應力釋放緩衝層結構,進而減少 元件結構本身因應力釋放所造成的晶格缺陷。 另外’本發明可結合後段製程完成具上述—種具有氮化合物 介穩式應力釋放緩衝層之蟲晶成長方法的氮化物半導體發光二 極體之製法,其包括以下步驟: 12 200409203 設置一基底層; · 其中,該基底層㈣可為歸石(sapphire)、氮切⑽)、. 梦(Si)、神化録(GaAs)或碳化硬(yc) · 於基底層材料之上形成上述之應力釋放緩衝層, 其中,該應力釋放缓衝層材料為氮化銦銘鎵- ((AlyGai-y)i-xInxN) ? 其中,該應力釋放緩衝層各層的組成可步階漸變調整或線性 漸變調整或漸變或兩層或更多; $ 於上述應力釋放緩衝層之上形成一氮化物發光二極體所需 之必要結構,減構至少包含—主動層結構以及上下兩層披覆 層結構, 其中,忒主動層結構為兩種不同能隙材料所組成之異質能隙 結構。 其中,該主動層材料為氮化銦鋁鎵((AlyGaiy)ixInxN)、氮 化錮鋁(InU)、氮化鎵(GaN)或氮化銦鎵(InxGai xN)。 鲁 其中,該主動層(active layer)材料與披覆層(cladding layer)材料間晶袼常數匹配或主動層在臨限厚度(cHtical thickness)内。 其中,該上述發光二極體必要結構中之上下披覆層材料其材 質為較主動層能隙大之氮化銦鋁鎵((AlyGai χΙηχΝ。 其中,該上述發光二極體必要結構中之上下披覆層其材料之 13 200409203 晶格常數舆主動層材料之晶格常數匹配或在臨限厚度(心⑽ thickness)内 ° 其中,該上述發光二極體必要結構中之下披覆層其材料之晶 格常數與上述之應力釋放緩衝層最上層材料之晶格常數相匹配 或在 限厚度(critical thickness)内。 本發明於氮化物半導體發光二極體結構上之應用,其主要之 精神,在氮化她鎵((AlyGai丄InxN)介穩式應力釋放緩衝層 的蠢晶成長技術,故可降低元件結構内部之殘存應力,可有效減 少元件材料㈣應力釋放所造成的缺陷,提高元件結構蟲晶品 質,進而可增進元件性能。 另外’本發财可結合後段製程完成具有—種具有氮化合物 介穩式應力釋放緩衝層之蟲晶成長方法的氮化物半賴高電子移 動率電晶體之製法,其包括以下步驟: 設置一基底層; 於基底層上方形成一應力釋放緩衝層, 其中,該應力釋放緩衝層材料為氮化銦鋁鎵 ((AlydklmN ),氮化銦鎵(InxGai χΝ )或氮化銦鋁 (InxAh-xN)。 其中,該應力釋放緩衝層各單層的銦含量逐層提高。 於上述之氮化銦鋁應力釋放緩衝層之上形成一高銦含量之 氮化銦鎵(InyGawM)通道層, 14 200409203 其中,該通道層之材料晶格常數與上述之氮化錮鎵或氮化銦 铭應力釋放緩衝層最上層材料的晶袷常數相匹配或在臨限厚度 (critical thickness)内。 於上述之通道層之上形成一高能隙材料層,該層之材質為氮 化銦鋁(InxAli-xN), 其中,該高能隙材料層的材料晶袷常數與通道層材料之晶格 常數相匹配或在臨限厚度(critical sickness)内。 以下茲配合本發明較佳實施方進一步說明如下 悉本發明相關技術之人士 乂朋此使热 件依本說明書之陳述據以實施。 【實施方式】 本發明主要精神,在於 J用蟲晶成長應力釋放緩衝厣《介鈿 鋁鎵((AUGa卜y)卜xInxN),、 及銜層虱化銦 乂利後績成長應力可調變蠖益座七女 用之氮化合物半導體元 η欠次無應力作 陷,進而改善元件特性。/構,可降低應力釋放造成的晶格缺 電晶體為例,並配合圖|下分別以發光二極體及高電子移動率 ,,"及圖號,說明本發明構想之應用實施 例,期能使貴審查委員 、、本發明有更詳細的瞭解,並使熟悉該 項技術者能據以實施,而 ,^ . τ , ^ 下所述者僅在於解釋較佳實施例,而 非在於限制本發明之範園, ^ ^ ,故凡有以本發明之創作精神為基礎, 而為本發明任何形式的變 尺或修飾,皆仍屬於本發明意圖保護之 範臂。 首先’請配合第八圖 二極體磊晶結構(1 〇)。 所不’係一般習用之氮化物半導體發光 光二極體具有一基底層(11),該 15 200409203 基底層(11)材料可為藍寶石(sapphlre)、氮化鎵(_、 破化石夕(sic),於該基底層之上首先形成一成核層(i2),再 於成核層(12)之上形成-緩衝層⑴),其中,成核層(12) 與緩衝層(13)的材料可分別為氮化铭(A1N)或氮化鎵⑽卜 另於3亥緩衝層(13)之上形成—發光二極體所需之必要結構,該 必要結構至少包含一主動層(15)以及下披覆層(⑷及上披覆 層(16) #中该主動層結構係由兩種不同能隙材料所組The rate is improved, which in turn makes the device have better high-frequency characteristics. The structure of the phase ㈣τ is mainly based on the heterogeneous interface of the fragmented gallium. The purity of the gallium is shifted, and the mobility of the broken gallium material (mobUity) becomes the main operating frequency of high-speed components ... ^ -atthe, s ,, , Blakeslee ^ 7 ^^^ (including pseudomorphic-j ^, p_ /, sub-movement rate and thunder; ± & It is mainly based on electricity. The high rate of indium gallium arsenide and InGaAs (InGaAs ): As the electron channel layer (chflnn < a1),-compound / gallium arsenide as the stromal junction a7610. The fifth figure (a) is using aluminum gallium arsenide as the "junction", mainly using Kunhua Gallium is close to Kunhuaming Gallium 10 200409203. The two-dimensional electron cloud formed at the interface is used as the electron channel layer. In the design of the virtual-high-electricity · transistor transistor, arsenization with higher electron mobility is used. Indium gallium is used as the electron communication layer. As shown in Figure 5 (b), a layer of indium gallium arsenide is added between the aluminum gallium arsenide / gallium arsenide as the electron channel layer. The lattice constants are larger than the lattice constants of Kunhuaming gallium and sanded gallium. As the electron channel layer, indium gallium indium gallium will cause compressive strain due to the lattice constant mismatch. Generally speaking, the larger the indium content in indium gallium arsenide, the higher the electron mobility. The larger the indium content, the higher the lattice mismatch. At this time, when the thickness of the channel layer is larger than the critical thickness of the load-bearing stress, the material will have defects φ to release the stress. Degradation, which in turn affects device characteristics. In general virtual-high electron mobility transistors, the indium mole ratio of indium gallium (inxGaixAs) is limited to not more than 0.2, mainly to avoid high levels of indium and lead to stupidity. Decreased crystal quality. In order to further increase the indium content while avoiding the occurrence of material defects caused by mismatched lattice constants, another so-called metastable structure is proposed. The so-called "metastatic- "High electron mobility transistor" (metamorph ic-duty τ Μ-_τ), the structure of which is shown in the sixth figure, is a step-change method to gradually increase the indium content of indium gallium, therefore, indium gallium With gallium halide material The material stress caused by the lattice constant mismatch will be gradually released due to the gradual change of the indium content. In addition, because the active layer region is intentionally far away from the substrate material, thereby avoiding defects near the substrate material to affect the characteristics of the active layer of the device. The above brief introduction The development of gallium nitride series materials in the growth technology of the buffer layer structure and the growth technology of the gallium nitride series of ternary compound materials and the development of paper power. The purpose of the present invention is mainly in the research and development of metaQrphic should: release the buffer structure Group III-5 nitride light-emitting element and high-speed wheel transmission element. 11 200409203 [Summary of the Invention] Therefore, the main purpose of the present invention is to provide a nitrogen compound metastable stress that has mostly completed the nitrogen compound stress relief effect. Method for epitaxial growth of release buffer layer. The present invention includes a nitrogen compound metastable stress relief buffer layer structure and a low stress residual nitrogen compound semiconductor device structure. In order to achieve the above-mentioned object, the present invention provides a method for manufacturing a high-indium-content nitrogen compound semiconductor stress-relieving buffer layer structure having a stress-releasing effect, including the following steps: setting a base layer; forming a nitride on the base layer A gallium nucleation layer and a multilayer buffer layer structure are formed on the nucleation layer. The multilayer or linear gradient stress relief buffer layer structure may be indium nitride and gallium ((AiyGai-y) i-xInxN) , And \ can choose from 0 ~ 1, and y can choose from 0 ~ 1. In addition, the epitaxial growth conditions of each stress release layer, such as temperature (gr0wth tperature), V / III & (flux rati〇), and growth rate (by rate), etc., are dependent on each stress release The material characteristics of the layer and the composition and thickness of the layer are appropriately adjusted. The main spirit is that the stress generated by the growth of the mismatched crystal lattice between the nitrogen compounds is released in the stress relief buffer structure, thereby reducing the lattice defects caused by the stress release of the element structure itself. In addition, the present invention can be combined with a back-end process to complete a method for manufacturing a nitride semiconductor light-emitting diode having the above-mentioned method for growing a worm crystal with a nitrogen compound-stable stress release buffer layer, which includes the following steps: 12 200409203 Setting a base layer ; Wherein, the base layer ㈣ can be sapphire, nitrogen cut ⑽, dream (Si), deified record (GaAs) or carbonized hard (yc) · The above stress release is formed on the base layer material A buffer layer, wherein the material of the stress relief buffer layer is indium nitride gallium-((AlyGai-y) i-xInxN)? Wherein the composition of each layer of the stress relief buffer layer can be adjusted in steps or linearly or Gradient or two or more; $ The necessary structure required to form a nitride light-emitting diode on the above stress relief buffer layer, the reduction structure includes at least an active layer structure and two upper and lower cladding layer structures, where:忒 The active layer structure is a heterogeneous bandgap structure composed of two different bandgap materials. Wherein, the material of the active layer is indium aluminum gallium nitride ((AlyGaiy) ixInxN), aluminum hafnium nitride (InU), gallium nitride (GaN) or indium gallium nitride (InxGai xN). Lu Among them, the crystal layer constant between the active layer material and the cladding layer material matches or the active layer is within a cHtical thickness. Wherein, the material of the upper and lower cladding layers in the above necessary structure of the light emitting diode is indium aluminum gallium nitride ((AlyGai χΙηχΝ) having a larger energy gap than the active layer. Among them, the above structure of the necessary structure of the light emitting diode The material of the coating layer 13 200409203 The lattice constant and the lattice constant of the active layer material match or are within a threshold thickness. Among them, the material of the lower coating layer in the above necessary structure of the light emitting diode The lattice constant matches the lattice constant of the material of the uppermost layer of the stress relief buffer layer or is within a critical thickness. The application of the present invention to the structure of a nitride semiconductor light-emitting diode has its main spirit, Stupid crystal growth technology in the gallium nitride ((AlyGai 丄 InxN) metastable stress release buffer layer, which can reduce the residual stress inside the device structure, can effectively reduce the defects caused by the stress release of the device material, and improve the device structure Worm crystal quality, which can improve component performance. In addition, 'this fortune can be completed in combination with the back-end process to have a nitrogen compound A method for manufacturing a nitride semi-high electron mobility transistor by a method for growing a worm crystal of a punching layer, comprising the following steps: setting a base layer; forming a stress relief buffer layer above the base layer, wherein the stress relief buffer layer material Indium aluminum gallium nitride (AlydklmN), indium gallium nitride (InxGai χN) or indium aluminum nitride (InxAh-xN). Among them, the indium content of each single layer of the stress relief buffer layer is increased layer by layer. A high indium content indium gallium nitride (InyGawM) channel layer is formed on the indium aluminum nitride stress relief buffer layer, 14 200409203, wherein the material lattice constant of the channel layer is the same as that of the above gallium nitride or indium nitride. The crystalline constant of the top material of the stress relief buffer layer matches or is within a critical thickness. A high energy gap material layer is formed on the above channel layer, and the material of the layer is InxAli- xN), wherein the crystalline constant of the material of the high energy gap material layer matches the lattice constant of the channel layer material or is within a critical thickness. The following is further described with reference to preferred embodiments of the present invention. Those who are familiar with the related technology of the present invention will implement the hot parts according to the descriptions in this specification. [Embodiment] The main spirit of the present invention is to use J. crystal growth stress relief buffer "Medium aluminum gallium ((AUGa (B) xInxN), and the growth of the indium halide can be adjusted after the growth stress is adjustable. The nitrogen compound semiconductor element η used by the seven females of the pedestal is under no stress to trap, thereby improving the characteristics of the device. It can reduce the lack of crystal lattice caused by stress release as an example, and with the figure | the light emitting diode and high electron mobility, respectively, and the figure below, illustrate the application examples of the concept of the present invention, and hope that the Your reviewers and the present invention have a more detailed understanding and enable those familiar with the technology to implement it, and ^. Τ, ^ The following is only to explain the preferred embodiment, not to limit the present invention Fan Garden, ^ ^, so any scale or modification based on the creative spirit of the present invention is still a model arm intended by the present invention. First, please match the diode epitaxial structure in Fig. 8 (10). What ’s more, the conventional nitride semiconductor light emitting photodiode has a base layer (11). The material of the 15 200409203 base layer (11) may be sapphire, gallium nitride (_, sic) First, a nucleation layer (i2) is formed on the base layer, and then a buffer layer (⑴) is formed on the nucleation layer (12). The materials of the nucleation layer (12) and the buffer layer (13) It can be a nitride structure (A1N) or a gallium nitride layer, respectively. It is necessary to form a light-emitting diode on the buffer layer (13). The necessary structure includes at least an active layer (15) and In the lower cladding layer (⑷ and upper cladding layer (16) #, the active layer structure is composed of two different energy gap materials

成之複數層異質結構,句合,一黑台b 44- 1 c 1 \ ^ ^ a阿此隙材枓(151)與一低能隙材 料(152)。另上述之下披覆層為一 N型掺雜之高能隙材料,而 上披覆層為P型摻雜之高能隙材料。上述主動層結構(15)中之 兩能隙材料為氮化鎵(GaN),而低能隙材料為氮化銦蘇(LN); 而上述之上下披覆層其材料為氮化鋁鎵(A1GaN)。 般而a,氮化銦鎵、氮化鎵以及氮化鋁鎵之間的材料晶格 常數不相互匹配’故所形成之異質接面之間具有殘存應力,故應It has a heterogeneous structure with multiple layers, a sentence, a black stage b 44- 1 c 1 \ ^ a a gap material 枓 (151) and a low energy gap material (152). In addition, the lower cladding layer is an N-type doped high energy gap material, and the upper cladding layer is a P type doped high energy gap material. The two-gap material in the active layer structure (15) is gallium nitride (GaN), and the low-gap material is indium nitride (LN); and the upper and lower cladding layers are made of aluminum gallium nitride (A1GaN). ). Generally, the lattice constants of the materials between indium gallium nitride, gallium nitride, and aluminum gallium nitride do not match each other ’, so there is residual stress between the heterojunctions formed, so

力釋放容易導致材料内部缺陷的增加,影響磊晶品質以及元件内 部特性。 另請配合第九圖所示,係運用本發明之氮化物半導體發光二 極體結構(20)。該發光二極體具有一基底(substrate)層(21), 該基底層(21)材料可為藍寶石(sapphire)、氮化鎵(GaN)、 矽(si)、砷化鎵(GaAs)或碳化矽(Sic)。於該基底層(21) 之上首先形成一第一應力釋放緩衝層(22),其中,第一應力釋 16 200409203 放緩衝層(22)其材質為氮化銦鋁鎵((AlyGai_y)1_xInxN),又, 於第一應力釋放緩衝層(22)之上形成一第二應力釋放緩衝層 · (23) ’其材質為氮化銦鋁鎵((AiyGahh-xinxN),惟該第二應 力釋放緩衝層(23)之銦含量比例稍大於第一應力釋放缓衝層 (22)之銦含量比例,以此一原則逐一成長不同銦含量比例之氮 化銦鋁應力釋放緩衝層,而隨應力釋放緩衝層層數之增加,銦含 篁比例亦隨之提高。另此一複數層應力釋放緩衝層之最上層為第 η應力釋放緩衝層(24),其材料為氮化銦鋁(InzAli zN),其 馨 銦έ畺比例z為最南。另於該第n應力釋放緩衝層(24)之上形 成一發光二極體所需之必要結構,該必要結構至少包含一主動層 (26)以及下披覆層(25)及上披覆層(27),其中該主動層(26) 結構係由兩種不同能隙材料所組成之複數層異質接面結構,包含 一咼能隙材料(261)與一低能隙材料(262 )。另上述之下披覆 層為Ν型摻雜之南能隙材料,而上披覆層為ρ型摻雜之高能隙 材料。 又上述之主動層結構中,高能隙材料(261)為氮化銦鋁 (InAIN),低能隙材料(262 )為氮化銦鎵(inGaN)、氮化鎵 (GaN)或是氮化㈣家(A1GaN),且高能隙材料與低能隙材料之 晶格常數為相互匹配或臨限厚度内。 又上述之下披覆層材料(25)為氮化銦鋁(hA1N),其材 料晶格常數與上披覆層材料(27)相互匹配,且該下披覆層⑺) 17 200409203 與第η應力釋放緩衝層(24)晶袼常數為相互匹配或在臨限厚度 内。 因本發明之精神,即在於突破與改善傳統氮化合物元件結構 因晶格不匹配所造成的元件結構限制。 本發明亦可應用於氮化物半·導體高電子移動率電晶體之磊 晶結構。 請配合第十圖所示,係一般習用之氮化物半導體高電子移動 率電晶體磊晶結構(30 )。該高電子移動率電晶體結構具有一基 底層(31),該基底層(31)材料可為藍寶石(s^phire)、氮 化鎵(GaN)或碳化矽(SiC),於該基底層之上首先形成一成核 層(32),再於成核層(32)之上形成一緩衝層(33),其中, 成核層(32)與緩衝層(33)的材料可分別為氮化鋁(Ai趵或 氮化鎵(GaN)。於目前習用之實施例中,一材質為氮化鎵(以们 的通道層(34)形成於緩衝層(33)之上,另有一高能隙材料層 (36)形成於通道層(34)上方,其材質為氮化鋁鎵(Ααυ), 而於部分實施例中,通道層(34)與高能隙材料層(36)之間上 具有一隔離層(space layer) (35),其材質為氮化鋁鎵 (AlxGai-xN)。其中,上述之咼能隙材料層(%) 一般為摻雜區 而隔離層(35)為非摻雜區。 另請配合第十一圖所示,為運用本發明之氮化物半導體材料 所形成之介穩式高電子移動率電晶體(4〇),其中,包含基底 18 200409203 运(41)、第一應力釋放層(42)、第二應力釋放層(43)以及 第η應力釋放緩衝層(44),其中,層數n得視元件之需求與形· 成條件的不同而定。上述之複數層應力釋放層其材料為氮化銦鋁 鎵((AlyGawUruN)或氮化銦鎵(InxGai_xN),其中銦的含量 比例X隨緩衝層層數的增加而增加。另於第n緩衝層之上,形成 一氮化銦鎵通道層(45),其中該通道層材料之銦含量比例與第 η緩衝層相同或臨限厚度内。另有一高能隙材料層(47)形成於 通道層(45)上方,其材質為氮化銦鋁(ΙηχΑ1ΐ χΝ),而於部分 _ 汽施例中,通道層(46)與高能隙材料層(47)之間上具有一隔 離層(space layer) (46),其材質為氮化錮鋁(InxAhxN), 其中,上述之高能隙材料層(47) 一般為高摻雜區而隔離層(佔) 為非摻雜區,且高能隙材料層(47)與隔離層(46)的氮化鋼銘 (ΙηχΑ1ι-χΝ)其晶格常數與通道層(45)氮化銦鎵(inyGai_yN) 晶格常數的匹配性可藉由控制銦含量比例來作適當的調整。 相較於習用之氮化物半導體高電子移動率電晶體,利用本發 鲁 明之方式,可以有效增加通道層之銦含量及通道厚度,進而提高 内部電子移動率及功率,同時,由於緩衝層的内部應力係、逐層釋 放,因此因銦含量改變所造成的材料缺陷多半被侷限在靠近基底 層端,也使得通道層可遠離應力釋放產生的缺陷。 、、’不上娜之,利用本發明完成蠢晶成長在介穩式應力釋放緩衝層上的 70件相較於習用發光二極體以及高速傳輸電晶體,係具有較少之元件 19 200409203 内部應力’故可有效減少元件結構晶格纏,提高紅品質以及增進元 件特性’實已符合發明專利之t請要件,爰依法提出 利。 【圖式簡單說明】 表一係不同半導體材料特性參數比較。 第一圖係習用之成長EL〇G基板程序圖。 第二圖係習用之懸空長晶法成長EL0G基板於碳化矽(SiC) 之上。 第三圖係三五族氮化物(a)晶格大小與自發性極化的理論 计异關係(b)自發性極化與壓電極化關係。 第四圖係(a)砷化鋁鎵/砷化鎵異質結構(b)因能帶彎曲 而在接面處形成的二維電子雲。 第五圖係(a)傳統式砷化鋁鎵/砷化鎵HEMT及(匕)虛擬式 砷化鋁鎵/砷化銦鎵p—HEMT。 第/、圖係成長於介穩式緩衝層上之砷化銦鋁/砷化銦鎵異質 接面結構。 第七圖係一般介穩式緩衝層之TEM剖面影像。 第八圖係習用之氮化物半導體發光二極體蠢晶結構示意圖。 第九圖係本發明之氮化物半導體發光二極體蠢晶結構示意 圖。 第十圖係習用之氮化物半導體高電子移動率電晶體蠢晶結 構圖。 第十一圖·係本發明之氮化物半導體高電子移動率電晶體磊 20 200409203 日日結構圖。 (圖號說明) 鼠化物半導體發光二極體結構10 基底層1 1 緩衝層13 下披覆層14 主動層高能隙材料151 上披覆層16 氮化物半導體發光二極體20 基底層21 第一應力釋放緩衝層22 第η應力釋放緩衝層24 下披覆層25 主動層高能隙材料261 上披覆層27 氮化物半導體高電子移動率電 基底層31 緩衝層33 隔離層35 接觸層37 成核層12 主動層15 主動層低能隙材料152 第一應力釋放緩衝層23 主動層26 主動層低能隙材料262 晶體磊晶結構3〇 成核層32 通道層34 高能隙材料層36Force release easily leads to an increase in internal defects of the material, affecting the epitaxial quality and internal characteristics of the device. In addition, as shown in the ninth figure, the nitride semiconductor light emitting diode structure (20) of the present invention is used. The light emitting diode has a substrate layer (21), and the material of the substrate layer (21) may be sapphire, gallium nitride (GaN), silicon (si), gallium arsenide (GaAs), or carbide Silicon (Sic). A first stress relief buffer layer (22) is first formed on the base layer (21), wherein the first stress relief buffer layer (2004) is a material of indium aluminum gallium nitride ((AlyGai_y) 1_xInxN). In addition, a second stress relief buffer layer (23) is formed on the first stress relief buffer layer (22). Its material is indium aluminum gallium nitride ((AiyGahh-xinxN)), but the second stress relief buffer layer The indium content ratio of the layer (23) is slightly larger than the indium content ratio of the first stress release buffer layer (22). Based on this principle, indium aluminum nitride stress release buffer layers with different indium content ratios are grown one by one, and the buffer is released with the stress. As the number of layers increases, the ratio of indium to indium also increases. In addition, the uppermost layer of the plurality of stress relief buffer layers is the ηth stress relief buffer layer (24), whose material is indium aluminum nitride (InzAli zN), The ratio z of indium is the southernmost. In addition, the necessary structure for forming a light emitting diode is formed on the nth stress relief buffer layer (24). The necessary structure includes at least an active layer (26) and a lower layer. A cladding layer (25) and an upper cladding layer (27), wherein the active layer (26) The structure is composed of a plurality of layers of heterojunction structures composed of two different energy gap materials, including a chirped energy gap material (261) and a low energy gap material (262). In addition, the above-mentioned coating layer is N-type doped. South-gap material, and the upper cladding layer is a p-doped high-gap material. In the above active layer structure, the high-gap material (261) is indium aluminum nitride (InAIN), and the low-gap material (262) is Indium gallium nitride (inGaN), gallium nitride (GaN), or gallium nitride (A1GaN), and the lattice constants of the high-gap material and the low-gap material are within matched or threshold thicknesses. The cladding material (25) is indium aluminum nitride (hA1N), and its material lattice constant matches the upper cladding material (27), and the lower cladding layer ⑺) 17 200409203 and the η stress relief buffer layer ( 24) The crystal constants are matched to each other or within a threshold thickness. Because of the spirit of the present invention, it is to break through and improve the element structure limitation caused by the lattice mismatch of the traditional nitrogen compound element structure. The present invention can also be applied to the epitaxial structure of a nitride semi-conductor high electron mobility transistor. Please refer to the tenth figure, which is the epitaxial structure of nitride semiconductor high electron mobility transistor (30). The high electron mobility transistor structure has a base layer (31). The material of the base layer (31) can be sapphire (sapphire), gallium nitride (GaN) or silicon carbide (SiC). First, a nucleation layer (32) is formed on the nucleation layer (32), and then a buffer layer (33) is formed on the nucleation layer (32). The materials of the nucleation layer (32) and the buffer layer (33) may be respectively nitrided. Aluminum (Ai 趵 or gallium nitride (GaN). In the currently used embodiments, a material is gallium nitride (the channel layer (34) is formed on the buffer layer (33), and a high energy gap material The layer (36) is formed above the channel layer (34), and is made of aluminum gallium nitride (Ααυ). In some embodiments, an isolation is provided between the channel layer (34) and the high energy gap material layer (36). A space layer (35), whose material is aluminum gallium nitride (AlxGai-xN). The above-mentioned erbium energy gap material layer (%) is generally a doped region and the isolation layer (35) is an undoped region. In addition, please refer to the eleventh figure for a metastable high electron mobility transistor (40) formed by using the nitride semiconductor material of the present invention, which includes Bottom 18 200409203 Yun (41), the first stress relief layer (42), the second stress relief layer (43), and the nth stress relief buffer layer (44), where the number of layers n depends on the requirements and formation of the element The conditions are different. The material of the above-mentioned multiple stress release layers is indium aluminum gallium nitride ((AlyGawUruN) or indium gallium nitride (InxGai_xN)), where the indium content ratio X increases with the number of buffer layers. In addition, an indium gallium nitride channel layer (45) is formed on the n-th buffer layer, wherein the indium content ratio of the material of the channel layer is the same as or within the threshold thickness of the n-th buffer layer. Another high energy gap material layer (47 ) Is formed above the channel layer (45), and its material is indium aluminum nitride (ΙηχΑ1ΐ χΝ), and in some embodiments, there is an isolation between the channel layer (46) and the high energy gap material layer (47). A space layer (46) made of InxAhxN, wherein the high energy gap material layer (47) is generally a highly doped region and the isolation layer (occupies) is an undoped region; and Nitrided steel inscriptions (ΙηχΑ1ι-χΝ) of the high energy gap material layer (47) and the isolation layer (46) and their crystal lattices The matching of the constant with the lattice constant of the indium gallium nitride (inyGai_yN) of the channel layer (45) can be appropriately adjusted by controlling the proportion of indium content. Compared with the conventional nitride semiconductor high electron mobility transistor, The method of luminescence can effectively increase the indium content and channel thickness of the channel layer, thereby increasing the internal electron mobility and power. At the same time, due to the internal stress system of the buffer layer, it is released layer by layer, so material defects caused by changes in the indium content Mostly confined to the end of the base layer, it also allows the channel layer to be kept away from defects caused by stress release. 70% of stupid crystals grown on the dielectrically stable stress relief buffer layer using the present invention have fewer elements than conventional light-emitting diodes and high-speed transmission transistors. 19 200409203 The stress 'can effectively reduce the lattice entanglement of the element structure, improve the red quality, and enhance the element characteristics', which has already met the requirements of the invention patent, and is beneficial according to law. [Schematic description] Table 1 is a comparison of the characteristics of different semiconductor materials. The first figure is a conventional ELOG substrate program diagram. The second picture shows a conventional method of growing an EL0G substrate on a silicon carbide (SiC) substrate by a suspended growth method. The third picture is the theoretical difference between the three or five group nitrides (a) lattice size and spontaneous polarization (b) the relationship between spontaneous polarization and piezoelectric polarization. The fourth picture is (a) an aluminum gallium arsenide / gallium arsenide heterostructure (b) a two-dimensional electron cloud formed at the junction due to band bending. The fifth picture is (a) a traditional aluminum gallium arsenide / gallium arsenide HEMT and a (virtual) aluminum gallium arsenide / indium gallium arsenide p-HEMT. // The picture shows the indium aluminum arsenide / indium gallium arsenide heterojunction structure grown on the metastable buffer layer. The seventh image is a TEM cross-sectional image of a general metastable buffer layer. The eighth diagram is a schematic diagram of a conventional nitride semiconductor light emitting diode stupid structure. The ninth figure is a schematic view of the structure of a nitride semiconductor light emitting diode stupid crystal according to the present invention. The tenth figure is a conventional nitride semiconductor high electron mobility transistor stupid structure. The eleventh figure is a Japanese-Japanese structure diagram of the nitride semiconductor high electron mobility transistor 20 200409203 of the present invention. (Illustration of figure number) Mouse compound semiconductor light emitting diode structure 10 base layer 1 1 buffer layer 13 lower cladding layer 14 active layer high energy gap material 151 upper cladding layer 16 nitride semiconductor light emitting diode 20 base layer 21 first Stress relief buffer layer 22th nth stress relief buffer layer 24 Lower cladding layer 25 Active layer high energy gap material 261 Upper cladding layer 27 Nitride semiconductor high electron mobility electrical base layer 31 Buffer layer 33 Isolation layer 35 Contact layer 37 Nucleation Layer 12 Active layer 15 Active layer low energy gap material 152 First stress relief buffer layer 23 Active layer 26 Active layer low energy gap material 262 Crystal epitaxial structure 30 Nucleation layer 32 Channel layer 34 High energy gap material layer 36

氮化物半導體高電子移動率電晶體磊晶結構4〇 基底層41 21 200409203 第一應力釋放緩衝層42 第η應力釋放緩衝層44 隔離層46 第二應力釋放緩衝層43 通道層45 高能隙材料層47 接觸層48Nitride semiconductor high electron mobility transistor epitaxial structure 40 base layer 41 21 200409203 first stress relief buffer layer 42th η stress relief buffer layer 44 isolation layer 46 second stress relief buffer layer 43 channel layer 45 high energy gap material layer 47 contact layer 48

22twenty two

Claims (1)

拾、申請專利範圍: 1、 -種具有lUb合物介穩式應力釋放_層之蠢晶成長方法,係主 要包含在-緑龍社紐應力微_層,並於雜觸上形成氣化 合物半導體元件結構,射該應力職緩觸,係於基底材料之上形成氮 化銦銘鎵((Al“InxN),其中,『χ』可介於零與一之間⑽⑴, 『y』可介於零與一之間(〇<y<1)。 2、 如申§#專利範難!項所述之—種具有氮化合物介穩式應力釋放 缓衝層之Μ成長方法,其基底材f可為氮化鎵(_、藍寶石(祕)、 矽(so、碳化石夕(Sic)、坤化鎵(GaAs)以及其它半導體基底材料。 —3、如申請專利範圍第W所述之一種具有氮化合物介穩式應力釋放 _層之2成長方法,其應力職緩衝層層數為祕漸變或兩層或更 多’又最上層為第n應力釋放緩衝層,其材料為氮化細⑴偏),其 銦含量比例Z為最高。 …4、如憎專利制Μ項所述之—種具錢化合物介穩式應力釋放 緩衝層之_成長紋’其應力槪緩衝層所需之猶層層數以及每一層 之厚度得絲m編細从㈣爾铜祿適當之 調整。 5、 如申請專利範圍第i項所述之—種具有氮化合物介穩式應力釋放 _層之Μ成長方法,其轉航件結構可為]_結構以及下披覆 層及上披覆層以形成發光二極體。 6、 如申__第5項所述之主動層(邮⑽結構包含構 成氮化物半導體元件裝置所需之必要結構設計。 200409203 7、 如申請專利範圍第5項所述之主動層結構,係由具有不同能隙之 複數層結構交疊形成之異質接面結構,包含—高能隙材料與—低能隙材料。 8、 如申請專利範圍第5項所述之下披覆層為_ N型摻雜之高能隙材 料’而上披覆層為P型摻雜之高能隙材料。 9、 如申請專利範圍第5項所述之下披覆層材料為氮化銦鋁(ίηΑ顶), 其材料晶格常數與上披制材料相互㈣,且該下披難與第η應力釋放 緩衝層晶格常數為相互匹配或在臨限厚度内。 1 〇、如t請專概®第7賴狀主騎結構,其巾高能隙材料為 氮化銦銘鎵((AlyGai_y)1-xInxN),低能隙材料為不同組成之氮化銦鋁 鎵((AlyGa 卜 y)卜 χΙΠχΝ )。 1 i、如帽專利範圍第!項所述之—種具有氮化合物介穩式應力釋 放緩衝層之Μ成長方法,其絲層與各單層間之材料晶格常數匹配或在 臨限厚度内。 2、如申請專娜圍第W所述之—種具錢化合物介穩式應力釋 放緩衝層之Μ成長方法’其絲層與各單狀材料晶格常數與專利申請 範圍第!項所述之應力釋故緩衝層之最上層材料晶格常航配或在臨限厚 度内。 13、如中凊專利粑圍第!項所述之—種具有氮化合物介穩式應力釋 放緩衝層之^成長方法,其半導體元件結構包含-通道層、-高能隙材 料層及接觸層以形成電晶體元件。 其材質為氮化 4、如申請專利範圍第!3項所述之高能隙材料層, 24 200409203 銦鋁(ImAh-xN)。 1 5、如申請專利翻第1 3項所述之通道層及高能料料層之間上 具有一隔離層(space layer),其材質為氮化銦鋁(Inu)。 16、如申請專利範圍第1 5項所述^高能隙材料層與隔離層的氮化鋼 鋁(InU)其晶格常數與通道層氮化銦鎵(IriyGa^N)晶格常數的远 配性可藉由控制銦含量比例來彳㈣當的调整。Scope of patent application: 1. A stupid crystal growth method with a lUb compound metastable stress release layer, which mainly includes the Lvlongshe stress micro layer, and forms a gas compound semiconductor on the hybrid The element structure, which is exposed to this stress, is formed on the base material to form indium nitride and gallium nitride (Al "InxN), where" χ "can be between zero and one, and" y "can be between Between zero and one (〇 < y < 1). 2. As described in the § # Patent Fan Difficulty! Item—A method for Μ growth with a nitrogen compound-stable stress relief buffer layer, the substrate material f It can be gallium nitride (_, sapphire (secret), silicon (so, carbide), Sic, gallium (GaAs), and other semiconductor substrate materials. -3, as described in one of the scope of patent application Nitrogen compound metastable stress release layer 2 growth method, the number of stress buffer layers is secret gradient or two or more, and the top layer is the nth stress release buffer layer, and its material is nitrided fine ), Its indium content ratio Z is the highest.… 4. As described in the item M of the Homo Patent System—kind of money The material-steady-type stress relief buffer layer _growth ', its stress, the number of layers required for the buffer layer, and the thickness of each layer are finely adjusted from Mitsubishi's Tonglu. 5. If the scope of patent application As described in item i, a M growth method with a nitrogen compound-stable stress release layer, the transfer structure can be a] structure and a lower cladding layer and an upper cladding layer to form a light emitting diode. 6. The active layer as described in item 5 (the postal structure includes the necessary structural design required to form a nitride semiconductor device device. 200409203 7. The active layer structure as described in item 5 of the scope of patent application, is Heterojunction structure formed by overlapping multiple layer structures with different energy gaps, including-high energy gap material and-low energy gap material. 8. As described in item 5 of the scope of the patent application, the lower cladding layer is N-type doped And the upper cladding layer is a P-doped high energy gap material. 9. As described in item 5 of the scope of the patent application, the lower cladding material is indium aluminum nitride (top), and its material The lattice constants and the upper material are mutually opposite, and the The lattice constants of the embarrassment and the ηth stress relief buffer layer are matched to each other or within a threshold thickness. 1 10. If t, please outline ® 7th Lay-like main riding structure, whose high energy gap material is indium nitride and gallium ((AlyGai_y) 1-xInxN), the low-energy gap material is indium aluminum gallium nitride ((AlyGa y)) χΙΠχΝ) of different composition. 1 i. As described in the cap patent scope item! The M growth method of the stable stress relief buffer layer, the lattice constant of the material between the silk layer and each single layer is matched or within the threshold thickness. 2. As described in the application of the patent No. W-a kind of money compound M growth method of stable stress release buffer layer 'its silk layer and the lattice constant of each single material and the scope of patent applications! The stress relief layer described in the item above is usually equipped with a crystal lattice or within a threshold thickness. 13, such as the Chinese patent patents! In the item described above, a semiconductor device with a nitrogen compound metastable stress release buffer layer has a semiconductor device structure including a channel layer, a high energy gap material layer, and a contact layer to form a transistor device. Its material is nitride 4. As the scope of patent application! High energy gap material layer as described in item 3, 24 200409203 Indium aluminum (ImAh-xN). 15. There is a space layer between the channel layer and the high-energy material layer as described in item 13 of the patent application. The material is indium aluminum nitride (Inu). 16. As described in item 15 of the scope of the patent application, the lattice constant of the steel aluminum nitride (InU) of the high energy gap material layer and the isolation layer is far from the lattice constant of the channel layer indium gallium nitride (IriyGa ^ N). The properties can be properly adjusted by controlling the proportion of indium content. 2525
TW93102248A 2004-01-30 2004-01-30 Epitaxial growth method for metamorphic strain-relaxed buffer layer having nitrogen compound TW200409203A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI480928B (en) * 2012-05-22 2015-04-11 Nat Univ Chung Hsing The manufacturing method of the semiconductor element and the epitaxial substrate used in the manufacturing method and the semi-finished product of the semiconductor device
US10181518B2 (en) 2013-06-28 2019-01-15 Intel Corporation Selective epitaxially grown III-V materials based devices
CN111009584A (en) * 2019-12-11 2020-04-14 扬州乾照光电有限公司 Lattice mismatched multi-junction solar cell and manufacturing method thereof

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI480928B (en) * 2012-05-22 2015-04-11 Nat Univ Chung Hsing The manufacturing method of the semiconductor element and the epitaxial substrate used in the manufacturing method and the semi-finished product of the semiconductor device
US10181518B2 (en) 2013-06-28 2019-01-15 Intel Corporation Selective epitaxially grown III-V materials based devices
US10573717B2 (en) 2013-06-28 2020-02-25 Intel Corporation Selective epitaxially grown III-V materials based devices
CN111009584A (en) * 2019-12-11 2020-04-14 扬州乾照光电有限公司 Lattice mismatched multi-junction solar cell and manufacturing method thereof
CN111009584B (en) * 2019-12-11 2021-09-17 扬州乾照光电有限公司 Lattice mismatched multi-junction solar cell and manufacturing method thereof

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