TW200408102A - Stack package structure and electrically-connected board for stack package - Google Patents

Stack package structure and electrically-connected board for stack package Download PDF

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Publication number
TW200408102A
TW200408102A TW091132911A TW91132911A TW200408102A TW 200408102 A TW200408102 A TW 200408102A TW 091132911 A TW091132911 A TW 091132911A TW 91132911 A TW91132911 A TW 91132911A TW 200408102 A TW200408102 A TW 200408102A
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Taiwan
Prior art keywords
package
electrical connection
connection board
pads
solder
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TW091132911A
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Chinese (zh)
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TWI283473B (en
Inventor
Bo-Ren Zheng
Shi-Zhang Li
Yao-Xin Feng
qi-sheng Zhong
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Advanced Semiconductor Eng
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Priority to TW091132911A priority Critical patent/TWI283473B/en
Publication of TW200408102A publication Critical patent/TW200408102A/en
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Publication of TWI283473B publication Critical patent/TWI283473B/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

The present invention relates to an electrically-connected board for stack package, which is disposed between the first package and the second package for electrically connecting with the first package and the second package. The electrically-connected board for stack package comprises: a top surface, a bottom surface, plural upper bonding pads and plural lower bonding pads. The upper bonding pads are formed on the top surface, and the surface of each upper bonding pad has a tin-lead metal layer. Each upper bonding pad is electrically connected to the bonding pad of the first package disposed on the top surface of the electrically-connected board through a soldering contact. The surface of the lower bonding pad has a tin-lead metal layer, and each lower bonding pad is electrically connected to the bonding pad of the second package disposed on the bottom surface of the electrically-connected board through a soldering contact. Therefore, there is no gold-tin-nickel metal layer formed on the electrically-connected board of the present invention, the lifetime of the soldering contact is increased, and the electrical characteristics are better.

Description

200408102 A7200408102 A7

鳘Jiff景 1 ·發明領域 本發明係關於一種堆疊封裝結構，詳言之，係關於一種 用电性連接板之堆4封裝結構及用於堆疊封裝之電性連 ί要板。 2.先前技術說明 裝 參考圖1，習用之堆疊封裝結構ίο包括一第一封裝體 11、一電性連接板12及一第二封裝體13。該第一封裝體11 可為一薄型球閘封裝體（VFBGA),其具有複數個銲墊 Hi、112。該電性連接板12具有一頂面121及一底面 122。該頂面121形成有複數個上銲墊123等。該底面122 形成有複數個下銲墊124等。該等上銲墊123與該等下銲墊 124係透過基板中之電跡線與導孔以電氣連接。該第二封裝 體1 3具有二晶片及複數個銲墊！ 3 1、i 3 2。鳘 Jiff King 1 · FIELD OF THE INVENTION The present invention relates to a stacked package structure, in particular, to a stack 4 package structure using electrical connection boards and an electrical connection board for stacked packages. 2. Description of the prior art Device Referring to FIG. 1, a conventional stacked package structure includes a first package body 11, an electrical connection board 12, and a second package body 13. The first package 11 can be a thin ball brake package (VFBGA), which has a plurality of solder pads Hi, 112. The electrical connection board 12 has a top surface 121 and a bottom surface 122. The top surface 121 is formed with a plurality of upper pads 123 and the like. A plurality of lower pads 124 and the like are formed on the bottom surface 122. The upper pads 123 and the lower pads 124 are electrically connected through electrical traces and vias in the substrate. The second package 1 3 has two chips and a plurality of bonding pads! 3 1, i 3 2.

利用一銲接點1 4 1 ’使該第一封裝體1 1之銲整1 1 1與該電 性連接板1 2之上銲整1 2 3電氣連接。再利用一鮮接點1 4 2， 使該電性連接板12之下銲蟄124與該第二封裝體13之銲塾 131電氣連接。該第一封裝體11與該第二封裝體13係藉由 電性連接板12以電氣連接。 參考圖2，該電性連接板12之下銲墊124之材質通常為銅 (Cu)，在該下銲墊124上會有一鎳（Ni)層125及一金 (Au)層126。同樣地，該第二封裝體13之銲墊131之材 質亦為銅（Cu)，在該銲墊131上會有一鎳（Ni)層133及 一金（Au )層1 34。該銲接點142係為錫鉛（Sn/Pb )材 -5 - 39δ ^紙張尺度適财國國家標準(CNS)A4規格(21GX 297公爱)— 200408102A solder joint 1 4 1 'is used to electrically connect the solder joint 1 1 1 of the first package body 1 1 to the solder joint 1 2 on the electrical connection board 12. A fresh contact 1 4 2 is further used to electrically connect the solder pad 124 under the electrical connection plate 12 and the solder pad 131 of the second package 13. The first package body 11 and the second package body 13 are electrically connected through an electrical connection plate 12. Referring to FIG. 2, the material of the bonding pad 124 under the electrical connection plate 12 is usually copper (Cu), and there will be a nickel (Ni) layer 125 and a gold (Au) layer 126 on the lower bonding pad 124. Similarly, the material of the pad 131 of the second package 13 is also copper (Cu), and there will be a nickel (Ni) layer 133 and a gold (Au) layer 134 on the pad 131. The solder joint 142 is a tin-lead (Sn / Pb) material -5-39δ ^ Paper size National Standard (CNS) A4 specification (21GX 297 public love) — 200408102

料。 參考圖3 ,上述之結構經過迴焊（Refl〇w)製程後，最 表面 < 金層126及134以極快之速度進入銲接點142内反 應，其底下之鎳（Ni)層125及133則開始與銲接點142進 行反應，並生成Nijii4介金屬層128及136。進入銲接點 M2之金，則於銲接點142内形成（AuixNix)Sn4介金屬 129及137。然而，（Au^xNDSr^會隨運作時間的增長而 回到銲接點142之介面，形成一連續之（AuixNix)Sn4介金 屬層129及137。金屬層129及137性質 不但極脆，且與NhSii4介金屬層128之介面強度不佳， 容易形成斷裂，使得銲接點之壽命縮短，且易造成電氣 特性不佳，甚至於造成可能無法達成電氣連接之問題。 因此，有必要提供一創新且富進步性的堆疊封裝結構， 以解決上述問題。 發明概述 本發明之目的在於提供一種用於堆疊封裝之電性連接 板，其係設置於一第一封裝體與一第二封裝體之間，用以 電性連接該第一封裝體與該第二封裝體，該用於堆疊封裝 <電性連接板包括：一頂面、一底面、複數個上銲墊及複 數個下銲墊。該等上銲墊係形成於該頂面，各該上銲墊之 表面具有一錫鉛金屬層，各該上銲墊係利用一銲接點，俾 與設置於該電性連接板頂面上之該第一封裝體之銲塾電氣 連接。該等下銲墊係形成於該底面，各該下銲塾之表面具 有一錫錯金屬層，各該下銲墊係利用一銲接點，與設置於material. Referring to FIG. 3, after the above structure is subjected to a reflow (Refl0w) process, the outermost surface < gold layers 126 and 134 enter the welding point 142 at a very fast speed to react, and the nickel (Ni) layers 125 and 133 underneath Then it starts to react with the solder joint 142, and generates Nijii4 intermetallic layers 128 and 136. The gold entering the welding point M2 forms (AuixNix) Sn4 intermetal 129 and 137 in the welding point 142. However, (Au ^ xNDSr ^ will return to the interface of the solder joint 142 as the operating time increases, forming a continuous (AuixNix) Sn4 intermetal layer 129 and 137. The metal layers 129 and 137 are not only extremely brittle, but also have the same properties as NhSii4 The interface layer of the intermetallic layer 128 has poor strength, is easy to form fractures, shortens the life of the solder joint, and easily causes poor electrical characteristics, and even causes problems that may not achieve electrical connection. Therefore, it is necessary to provide an innovation and progress The present invention aims to provide an electrical connection board for a stacked package, which is disposed between a first package and a second package, and is used for The first package and the second package are electrically connected, and the stacking package < electrical connection board includes: a top surface, a bottom surface, a plurality of upper pads and a plurality of lower pads. A solder pad is formed on the top surface, and a surface of each of the upper solder pads has a tin-lead metal layer. Each of the upper solder pads uses a soldering point, and the first pad provided on the top surface of the electrical connection board. Package Sook welded electrical connection. Such lines formed on the pads of the bottom surface, with each of the lower surface of a tin solder Sook wrong metal layer, each of the lower pads using a line weld, provided in

本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) -6- 200408102 A7This paper size applies to Chinese National Standard (CNS) A4 (210X 297 mm) -6- 200408102 A7

該電性連接板底面下之該第二封裳體之錦塾電氣連接。 各这上銲墊及下銲墊表面之錫鉛金屬層，可置換為貴金 屬（例如：金）或是有機層。因Α，利用本發明之該電性 連接板’不會形成（Aui xNix)Sn4介金屬層，故可使得鲜 接點之壽命提高，並具有較佳之電氣特性。 圖式簡沭 圖1為習用堆疊封裝結構之示意圖； 、圖2為習用堆疊封裝結構中電性連接板與第二封裝體 接之局部放大示意圖； 圖3為習用堆疊封裝結構中電性連接板與第二封裝體 接經迴銲後產生裂鍵之局部放大示意圖； 把 圖4為本發明之堆疊封裝結構之示意圖；及 圖5為本發明之堆疊封裝結構中電性連接板與第二 體連接之局部放大示意圖。 、裝 圖式元件符號說明 I 0 :習知堆疊封裝結構 II :第一封裝體 1 1 1、1 12 :銲墊 12 :電性連接板 1 2 1 :頂面 1 2 2 :底面 123 :上銲墊 124 :下銲墊 125 :鎳層The electrical connection of the second seal body under the bottom of the electrical connection board is electrically connected. The tin-lead metal layer on the surface of each of the upper pad and the lower pad may be replaced with a precious metal (for example, gold) or an organic layer. Because A, the (Aui x Nix) Sn4 intermetallic layer is not formed by using the electrical connection board of the present invention, so that the life of the fresh contact can be improved, and it has better electrical characteristics. Schematic diagram Figure 1 is a schematic diagram of a conventional stacked package structure; Figure 2 is a partially enlarged schematic diagram of an electrical connection board connected to a second package body in a conventional stacked package structure; Figure 3 is an electrical connection board in a conventional stacked package structure A partially enlarged schematic view of a crack generated after rebonding with the second package body; FIG. 4 is a schematic diagram of the stacked package structure of the present invention; and FIG. 5 is an electrical connection board and the second body in the stacked package structure of the present invention. Enlarged schematic diagram of the connection. I. Symbol description of the mounted components I 0: Conventional stacked package structure II: First package 1 1 1, 1 12: Pads 12: Electrical connection board 1 2 1: Top surface 1 2 2: Bottom surface 123: Top Pad 124: Lower pad 125: Nickel layer

200408102 A7 B7 五、發明説明（4 ) 126 :金層 128 :錫鎳層 129 :金錫鎳層 13 ： 第二封裝體 13 1 、132 :銲墊 133 :鎳層 134 :金層 136 :錫鎳層 137 :金錫錄層 14 1 、142 :銲接點 20 ： 本發明堆疊封裝結構 21 ： 第一封裝體 2 11 、2 1 2 :銲墊 22 ： 電性連接板 221 :頂面 222 :底面 223 :上銲墊 224 :下銲墊 226 :鉛錫金屬層 23 ： 第二封裝體 23 1 、232 :銲墊 241 、242 :銲接點 發明詳述 該堆疊 請參閱圖4，其顯示本發明之堆疊封裝結構20 -8 - 4(@沐紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 200408102 A7 _ B7 五、發明説明（5 ) 封裝結構20包括一第一封裝體21、一電性連接板22及一第 二封裝體23。該第一封裝體21可為一薄型球閘封裝體 (VFBGA)，其具有一晶片及複數個銲蟄211、212。該電 性連接板22具有一頂面221及一底面222。該頂面221形成 有複數個上銲墊223等。該底面222形成有複數個下銲塾 224等。該第二封裝體23具有一晶片及複數個銲墊231、 232 〇 利用一銲接點241，如錫球（s〇ider ball)，使該第一封 裝體21之銲墊211與該電性連接板22之上銲墊223電氣連 接。再利用一銲接點2 4 2，使與該電性連接板2 2之下鮮塾 224與該第二封裝體23之銲墊231電氣連接。此電性連接板 22可使第一封裝體21與第二封裝體23電性連接。 參考圖5，該電性連接板22之下銲墊224之材質通常為銅 (Cu)，本發明之該電性連接板22於該下銲墊224上形成一 錫錯（Sn/Pb)金屬層226作為表面處理層，例如以預銲 (presolder)方式形成，以防下銲墊224氧化。同樣地，該 電性連接板22之該上銲墊223上形成一錫鉛（Sn/Pb)金屬 層（圖未示出）。由於該銲接點242亦為錫鉛（Sn/Pb)材 料，因此，當本發明之堆疊封裝結構經過迴銲（Refl〇w) 製程後，該錫鉛金屬層2 2 6易於與該銲接點結合，且由於沒 有習知結構中之（AuleXNix)Sn4介金屬層形成，故可使得 銲接點2 4 2之壽命提高，並具有較佳之電氣特性。 各該上銲墊223及下銲墊224之表面不限於僅能形成該錫 鉛金屬層。該錫鉛金屬層可置換為貴金屬（例如：金）或 t紙張尺度適用中國國家標準(CNS) a4規格(21〇><297公釐）9 --- 200408102 A7 B7 五、發明説明（ ） 6 ’ 是有機層。當各該上銲墊223及下銲墊224之表面形成一貴 金屬層（例如：金）時，經過迴銲製程後，該銲墊上亦不 會有習知結構中之（AuuxNix)Sn4介金屬層，故亦不會產 生有裂鍵之問題，同樣地可達到使得銲接點之壽命提 同’及具有較佳之電氣特性之功效。 另外’當各該上銲墊223及下銲墊224之表面形成一有機 層時’經過迴銲製程後，該有機層會揮發消失，因此不會 有習知結構中之（Aui xNix)Sn4介金屬層存在，可解決習 知結構中因該（AuixNix)Sn4介金屬層所導致之問題。此 外’第一封裝體21之銲墊211及第二封裝體23之銲墊231 之表面仍可為鍍有鎳金之處理層，或於與電性連接板22電 性連接之銲墊處，其表面處理層改為鉛錫金屬層、貴金屬 層、或有機層。 利用該電性連接板，本發明堆疊封裝結構之電氣特性 可以大幅地改善，使得第一封裝體與第二封裝體間具有 良好的電氣連接特性。並使得該第一封裝體與該電性連 接板，以及該電性連接板與該第二封裝體間之銲接點壽 命提南。 惟上述實施例僅為說明本發明之原理及其功效，而非限 制本發明。因此，習於此技術之人士可在不達背本發明之 精神對上述實施例進行修改及變化。本發明之權利範圍應 如後述之申請專利範圍所列。 -10- 紙張尺度適用中國國家標準(CNS) A4規格(210X 297公爱i200408102 A7 B7 V. Description of the invention (4) 126: Gold layer 128: Tin-nickel layer 129: Gold-tin-nickel layer 13: Second package 13 1, 132: Pads 133: Nickel layer 134: Gold layer 136: Tin-nickel layer 137 : Gold tin layer 14 1, 142: Solder joint 20: Stacked package structure 21 of the present invention 21: First package body 2 11, 2 1 2: Solder pad 22: Electrical connection board 221: Top surface 222: Bottom surface 223: Upper solder pad 224: lower pads 226: lead-tin metal layer 23: second package 23 1, 232: pads 241, 242: solder joints Detailed description of the stacking Please refer to FIG. 4, which shows the stacking packaging structure 20 of the present invention 20- 8-4 (@ 沐 paper standard applies Chinese National Standard (CNS) A4 specifications (210 X 297 mm) 200408102 A7 _ B7 V. Description of the invention (5) Package structure 20 includes a first package body 21, an electrical connection Board 22 and a second package body 23. The first package body 21 may be a thin ball brake package (VFBGA), which has a chip and a plurality of solder pads 211, 212. The electrical connection plate 22 has a top A surface 221 and a bottom surface 222. The top surface 221 is formed with a plurality of upper pads 223 and the like. The bottom surface 222 is formed A plurality of lower solder pads 224, etc. The second package 23 has a wafer and a plurality of pads 231, 232. A solder joint 241, such as a solder ball, is used to make the first package 21 The soldering pad 211 is electrically connected to the soldering pad 223 on the electrical connection board 22. A soldering point 2 4 2 is used to solder the fresh solder 224 below the electrical connection board 22 to the second package 23. The pad 231 is electrically connected. The electrical connection plate 22 can electrically connect the first package 21 and the second package 23. Referring to FIG. 5, the material of the solder pad 224 under the electrical connection plate 22 is usually copper (Cu ), The electrical connection board 22 of the present invention forms a tin / snb (Sn / Pb) metal layer 226 on the lower pad 224 as a surface treatment layer, for example, it is formed in a presolder manner to prevent the lower pad 224 is oxidized. Similarly, a tin-lead (Sn / Pb) metal layer (not shown) is formed on the upper pad 223 of the electrical connection plate 22. Since the solder joint 242 is also tin-lead (Sn / Pb) ) Material, therefore, after the stacked package structure of the present invention is subjected to the reflow (Refl0w) process, the tin-lead metal layer 2 2 6 is easy to be combined with the solder joint, and No to the conventional structure (AuleXNix) Sn4 intermetallic layer is formed, it may cause the life of the pad 242 of the increase, and it has better electrical characteristics. The surface of each of the upper pad 223 and the lower pad 224 is not limited to being capable of forming only the tin-lead metal layer. The tin-lead metal layer can be replaced with a precious metal (for example: gold) or t paper size applicable to the Chinese National Standard (CNS) a4 specification (21〇 > < 297 mm) 9 --- 200408102 A7 B7 V. Description of the invention ( 6 'is the organic layer. When a surface of each of the upper pad 223 and the lower pad 224 forms a precious metal layer (for example, gold), after the reflow process, there will be no (AuuxNix) Sn4 intermetallic layer in the conventional structure on the pad. Therefore, the problem of cracked bonds will not occur, and the effect of improving the life of the solder joints and the better electrical characteristics can be achieved. In addition, 'when an organic layer is formed on the surface of each of the upper pad 223 and the lower pad 224', after the reflow process, the organic layer will evaporate and disappear, so there is no (Aui x Nix) Sn4 medium in the conventional structure. The existence of a metal layer can solve the problems caused by the (AuixNix) Sn4 intermetallic layer in the conventional structure. In addition, the surfaces of the bonding pads 211 of the first package 21 and the bonding pads 231 of the second package 23 may still be nickel-plated processing layers, or at the pads electrically connected to the electrical connection board 22, The surface treatment layer is changed to a lead-tin metal layer, a precious metal layer, or an organic layer. By using the electrical connection board, the electrical characteristics of the stacked package structure of the present invention can be greatly improved, so that the first package and the second package have good electrical connection characteristics. And the life of the solder joint between the first package and the electrical connection board, and between the electrical connection board and the second package is improved. However, the above embodiments are only for explaining the principle of the present invention and its effects, but not for limiting the present invention. Therefore, those skilled in the art can modify and change the above embodiments without departing from the spirit of the present invention. The scope of the rights of the present invention should be listed in the scope of patent application mentioned later. -10- Paper size applies to Chinese National Standard (CNS) A4 specifications (210X 297 Public Love i

Claims (1)

200408102 A8 B8 C8 D8 六、申請專利範圍 1 . 一種用於堆疊封裝之電性連接板，係設置於一第一封裝 體與一第二封裝體之間，用以電性連接該第一封裝體與 該第二封裝體，該用於堆疊封裝之電性連接板包括： 一頂面及一底面； 複數個上銲墊，形成於該頂面，各該上銲墊之表面具 有一錫鉛金屬層，各該上銲墊係利用一銲接點，與設置 於該電性連接板頂面上之該第一封裝體電氣連接；及 複數個下銲整，形成於該底面，各該下銲塾之表面具 有一錫鉛金屬層，各該下銲墊係利用一銲接點，與設置 於該電性連接板底面下之該第二封裝體電氣連接。 2 ·如申請專利範圍第1項之電性連接板，其中該銲接點為 一錫球。 3 .如申請專利範圍第1項之電性連接板，其中該第一封裝 體為球閘型封裝體（BGA)，具有與該銲接點接合之一銲 墊。 4.如申請專利範圍第1項之電性連接板，其中該第二封裝 體為球閘型封裝體（BGA)，具有與該銲接點接合之一銲 整。 5 . —種用於堆疊封裝之電性連接板，係設置於一第一封裝 體與一第二封裝體之間，用以電性連接該第一封裝體與 該第二封裝體，該用於堆疊封裝之電性連接板包括： 一頂面及一底面； 複數個上銲墊，形成於該頂面，各該上銲墊之表面具 有一貴金屬層，各該上銲塾係利用一銲接點，與設置於 -11 - 41:5 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐） 200408102 A8 B8 C8 D8 六、申請專利範圍 該電性連接板頂面上之該第一封裝體電氣連接；及 複數個下銲墊，形成於該底面，各該下銲墊之表面具 有一貴金屬層，各該下銲墊係利用一銲接點，與設置於 該電性連接板底面下之該第二封裝體電氣連接。 6 .如申請專利範圍第5項之電性連接板，其中該貴金屬為 金0 7 .如申請專利範圍第5項之電性連接板，其中該銲接點為 一錫球。 8 .如申請專利範圍第5項之電性連接板，其中該第一封裝 體為球閘型封裝體（BGA)，具有與該銲接點接合之一銲 整。 9 .如申請專利範圍第5項之電性連接板，其中該第二封裝 體為球閘型封裝體（BGA)，具有與該銲接點接合之一銲 塾。 10. —種用於堆疊封裝之電性連接板，係設置於一第一封裝 體與一第二封裝體之間，用以電性連接該第一封裝體與 該第二封裝體，該用於堆疊封裝之電性連接板，包括： 一頂面及一底面； 複數個上銲墊，形成於該頂面，各該上銲墊之表面具 有一有機層，各該上銲墊係利用一銲接點，與設置於該 電性連接板頂面上之該第一封裝體電氣連接；及 複數個下銲墊，形成於該底面，各該下銲墊之表面具 有一有機層，各該下銲墊係利用一銲接點，與設置於該 電性連接板底面下之該第二封裝體電氣連接。 -12- 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐） 200408102 A8 B8 C8 D8 六、申請專利範圍 11. 如申請專利範圍第10項之電性連接板，其中該銲接點為 一錫球。 12. 如申請專利範圍第1 0項之電性連接板，其中該第一封裝 體為球閘型封裝體（BGA)，具有與該銲接點接合之一銲 墊。 13. 如申請專利範圍第10項之電性連接板，其中該第二封裝 體為球閘型封裝體（BGA)，具有與該銲接點接合之一銲 墊。 14. 一種堆疊封裝之結構，由上而下依序包括： 一第一封裝體，具有一晶片及複數個銲墊； 一如申請專利範圍第1項所記載之電性連接板；及 一第二封裝體，具有一晶片及複數個銲墊。 15. —種堆疊封裝之結構，由上而下依序包括： 一第一封裝體，具有一晶片及複數個銲墊； 一如申請專利範圍第5項所記載之電性連接板；及 一第二封裝體，具有一晶片及複數個銲墊。 16. —種堆疊封裝之結構，由上而下依序包括： 一第一封裝體，具有一晶片及複數個銲墊； 一如申請專利範圍第10項所記載之電性連接板；及 一第二封裝體，具有一晶片及複數個銲墊。 -13- w本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐）200408102 A8 B8 C8 D8 6. Scope of patent application 1. An electrical connection board for stacked packages is disposed between a first package and a second package for electrically connecting the first package With the second package body, the electrical connection board for stacked packages includes: a top surface and a bottom surface; a plurality of upper pads formed on the top surface, and a surface of each upper pad has a tin-lead metal Layer, each of the upper pads is electrically connected to the first package body provided on the top surface of the electrical connection board by using a welding point; and a plurality of under-welds are formed on the bottom surface, each of the under-soldering pads The surface has a tin-lead metal layer, and each of the lower solder pads is electrically connected to the second package body disposed under the bottom surface of the electrical connection board by using a solder joint. 2 · The electrical connection board of item 1 of the patent application scope, wherein the solder joint is a solder ball. 3. The electrical connection board according to item 1 of the scope of patent application, wherein the first package body is a ball-gate package (BGA) and has a solder pad bonded to the solder joint. 4. The electrical connection board according to item 1 of the scope of patent application, wherein the second package is a ball-gate package (BGA), and has a solder joint with the solder joint. 5. An electrical connection board for stacked packages, which is disposed between a first package and a second package, and is used to electrically connect the first package and the second package. The electrical connection board in the stacked package includes: a top surface and a bottom surface; a plurality of upper pads formed on the top surface, each surface of the upper pad has a precious metal layer, and each of the upper pads uses a welding Point, and set at -11-41: 5 This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) 200408102 A8 B8 C8 D8 Sixth, the scope of patent application The first on the top surface of the electrical connection board The package body is electrically connected; and a plurality of lower solder pads are formed on the bottom surface, each of the lower solder pads has a precious metal layer on the surface, and each of the lower solder pads uses a welding point and is disposed under the bottom surface of the electrical connection board. The second package is electrically connected. 6. The electrical connection board according to item 5 of the patent application, wherein the precious metal is gold 0 7. The electrical connection board according to item 5, the soldering point is a solder ball. 8. The electrical connection board according to item 5 of the scope of patent application, wherein the first package body is a ball-gate package (BGA) and has a welding joint with the solder joint. 9. The electrical connection board according to item 5 of the scope of patent application, wherein the second package is a ball-gate package (BGA) and has a solder joint that is bonded to the solder joint. 10. An electrical connection board for stacked packages is provided between a first package and a second package, and is used to electrically connect the first package and the second package. The electrical connection board in a stacked package includes: a top surface and a bottom surface; a plurality of upper pads formed on the top surface, each of the upper pads has an organic layer on the surface, and each of the upper pads utilizes an The solder joints are electrically connected to the first package body provided on the top surface of the electrical connection board; and a plurality of lower solder pads are formed on the bottom surface, and the surface of each lower solder pad has an organic layer, each of which The soldering pad is electrically connected to the second package body disposed under the bottom surface of the electrical connection board by using a soldering point. -12- This paper size applies to Chinese National Standard (CNS) A4 specification (210X297 mm) 200408102 A8 B8 C8 D8 6. Application for patent scope 11. If the electrical connection board of item 10 of the patent scope is applied, the welding point is One tin ball. 12. For example, the electrical connection board of claim 10, wherein the first package body is a ball-gate package (BGA), and has a pad bonded to the solder joint. 13. The electrical connection board according to item 10 of the application, wherein the second package is a ball-gate package (BGA) and has a pad that is bonded to the solder joint. 14. A stacked package structure, which includes, in order from top to bottom: a first package body having a chip and a plurality of pads; an electrical connection board as described in item 1 of the scope of patent application; and a first The two packages have a chip and a plurality of bonding pads. 15. A structure of a stacked package, in order from top to bottom, comprising: a first package body having a chip and a plurality of pads; an electrical connection board as described in item 5 of the scope of patent application; and The second package has a chip and a plurality of bonding pads. 16. A structure of a stacked package, in order from top to bottom, comprising: a first package with a chip and a plurality of pads; an electrical connection board as described in item 10 of the scope of patent application; and The second package has a chip and a plurality of bonding pads. -13- w This paper size applies to Chinese National Standard (CNS) A4 (210X297 mm)
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI480989B (en) * 2012-10-02 2015-04-11 矽品精密工業股份有限公司 Semiconductor package and fabrication method thereof

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI499024B (en) * 2009-01-07 2015-09-01 Advanced Semiconductor Eng Package-on-package device, semiconductor package and method for manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI480989B (en) * 2012-10-02 2015-04-11 矽品精密工業股份有限公司 Semiconductor package and fabrication method thereof

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