TW200403509A - Liquid crystal display panel having reduced flicker - Google Patents

Abstract

A liquid crystal display panel includes an upper substrate, a lower substrate, and a plurality of pixels located between the upper substrate and the lower substrate. Each of the pixels includes a compensating capacitor for providing an approximately identical feed-through voltage for each of the pixels, thus reducing a flicker effect of the liquid crystal display panel.

Description

200403509 V. Description of the invention (l) Technical field to which the invention belongs The present invention relates to a liquid crystal display panel (1 i q u i d c r y s t a 1 display panel, LCD panel), particularly a low flicker liquid crystal display panel. In the prior art, thin film transistor LCDs mainly used thin-film transistors arranged in a matrix and equipped with appropriate electronic components to drive liquid crystal pixels to produce rich and beautiful graphics. Thin-film transistor liquid crystal display panels are widely used in portable information products such as notebooks and personal digital assistants (PDAs) because they are thin and light, consume less power, and have no radiation pollution. CRT monitors have gradually replaced traditional desktop computers. Please refer to FIGS. 1 and 2. FIG. 1 is a schematic diagram of a conventional thin-film transistor liquid crystal display panel, and FIG. 2 is a schematic diagram of an equivalent circuit of a single pixel of a thin-film transistor liquid crystal display panel. As shown in FIG. 1, a liquid crystal display panel 10 includes a lower substrate i 2, and the lower substrate 12 includes a pixel array region 14, a scan line driving circuit region 16, and a data line driving circuit region 18. . The pixel array region 4 includes a plurality of scanning lines (s c a η 1 i n e, not shown) and a plurality of data lines (d a t a

200403509 V. Description of the invention (2) 1 i ne, not shown), and each of the scanning lines and each of the data lines defines a plurality of pixels (pixels a to C and pixel B 'as shown in Fig. 1). ~ C ', where pixels A ~ C are electrically connected to the same scan line, and pixels A, B', and C 'are electrically connected to the same data line. As shown in FIG. 1, the scanning line driving circuit area 6 includes a plurality of driving integrated circuit chips (such as wafers 16a to 16c) and a plurality of bus lines 17, and each bus line 17 is used for Incoming calls are connected to each of the drive integrated circuit chips. Each of the driving integrated circuit wafers is directly fabricated on the surface of the lower substrate 12 by using a chip-on-glass (C0G) technology, and each of the bus lines 17 is also directly fabricated on the lower substrate 12. This is so-called W〇A (wiring on array) design. As shown in FIG. 2, a pixel 20 includes at least a liquid crystal cell lc and a thin film transistor TFT. The liquid crystal cell LC is composed of a pixel electrode and a common electrode. 0 ((: 〇111111〇11 ( 3〇111 ^ 61-electrode) and a liquid crystal molecular layer. The thin film transistor TFT includes a gate connected to a scan line GL 0, a drain connected to a data line DL 0, and a source The gate electrode is connected to the pixel electrode of the liquid crystal cell LC, and because the gate and the source partially overlap, a parasitic capacitance G is generated between the gate and the source. In addition, the pixel 20 also includes a storage capacitor. A storage capacitor SC connects the liquid crystal cell LC and a scanning line GIm. The storage capacitor SC is used to reduce the influence of the leakage current on the voltage of the liquid crystal cell Lc, that is, to assist the liquid crystal cell LC to store electric charges.

200403509

Because it is applied to a certain relationship, the light transmittance in the liquid crystal cell LC is set by the daylight surface. However, the pixel electrode of CE and the pixel electrode is not in the floating state, and it will pass the voltage, thus making it a fixed value. And this voltage (VFD), Xinjing only needs the voltage combined with the electricity applied to the liquid to take over. At this time, the generated electricity is applied to the voltage change, which can be uniformly expressed on the element LC. Photovoltaic cell voltage difference, what voltage pixel capacitance is coupled to the liquid crystal unit is called as: The voltage to be displayed will be from each source, the thin film on the LC, and the pole's circumference to the pixel LC feed path Liu Tianyuan and light The penetrating degree has a diurnal surface to control the applied pixels set to be appropriate so that the display generates a pre-voltage system for the common electrode. When the transistor TFT is turned off, if there is any voltage-varying electrode in the floating range, and its Voltage deviates from the original set voltage

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Vfd = [Cgs / (c ^ csc + cgs)] ^ V The electric capacity of the storage capacitor sc = ^, the capacitance of the Clg% liquid crystal cell ^. — The parasitic capacitance of Λ V, the amplitude between the gate and source of the thin film transistor TFT. Generally, π-tick is caused by the vibration of the pulse voltage applied to the scanning line, 0vF; Hammer Ί: ί ί, the voltage of the pole CE can eliminate the application, so that the application; sweep 2 f, the The resistance and capacitance effect edge) will fillet the negative edge of the field voltage (falling pixels away from the sweep line), so that Vfd will become smaller as the input end of the edge is farther away. on

Page 10 200303509 V. Description of the invention (4) It means that the VF 妁 relationship between the pixels A, B and C shown in Figure 1 will be (V FD) A > (VFD) B > (VFD) c ° Therefore, all The influence caused by the VF of the pixel is difficult to be eliminated by adjusting the voltage of the common electrode CE, which will cause the liquid crystal display panel 10 to generate a flicker (f 1 icker). On the other hand, since the bus lines 17 in the scan line driving circuit 16 have a relatively large resistance value, when a pulse voltage is input from the bus line 17 to each of the driving integrated circuit chips, each of the driving integrated circuits is 5 The input voltage of the chip will be different, which will result in different waveforms of the output voltage of each driving integrated circuit chip. For example, as shown in FIG. 3, the voltage difference (△ V GA) outputted by the driving integrated circuit chip 16 a is the highest, and the voltage difference (△ V GB ') outputted by the driving integrated circuit chip 16 b is the second, The voltage difference (△ V GC ') output by the driving integrated circuit chip 16c is the same again, thus causing V FD to decrease as the pixel is farther away from the input end of the data line, which is shown in Figure 1. The V FI ^ j relationship between the pixels A, B 'and C' shown is (VFD) A > (VFD) B '> (VFD) C', thus causing the screen to flicker, reducing the display of the liquid crystal display panel. No quality. SUMMARY OF THE INVENTION An object of the present invention is to provide a low-flicker liquid crystal display panel, and each pixel in the liquid crystal display panel has approximately the same V fd 'to improve the aforementioned defects.

Page 11 200303509 V. Description of the invention (5) According to the purpose of the present invention, a preferred embodiment of the present invention provides a liquid crystal display panel. The liquid crystal display panel includes an upper substrate, a lower substrate, and a plurality of pixels provided thereon. Between the substrate and the lower substrate, each of the pixels includes at least one compensation capacitor, which is used for each of the pixels to obtain a substantially the same feed current voltage to reduce the flicker effect of the liquid crystal display panel. Since the present invention adds a compensation capacitor to each pixel, each compensation capacitor is composed of an overlapping area where each pixel electrode and a scanning line corresponding to each pixel electrode overlap, and then each compensation capacitor is adjusted by adjusting To achieve the purpose of making the VF of each pixel slightly the same, thereby reducing the flicker effect of the liquid crystal display panel, thereby improving the display quality of the liquid crystal display panel. Embodiments Please refer to FIG. 4 'FIG. 4 is an equivalent circuit diagram of a liquid crystal display panel of the present invention. As shown in FIG. 4, the equivalent circuit 40 includes at least pixels A, B, and C, and the positions of the pixels A, B, and C correspond to the pixels A, B, and C shown in FIG. 1, respectively. Pixel A includes a liquid crystal cell LC and a thin film transistor TA. The liquid crystal cell LC is composed of a pixel electrode, a common electrode CE, and a liquid crystal molecular layer. Therefore, the liquid crystal cell LC can be regarded as a liquid crystal capacitor, and the thin film transistor T has an image in which a gate is connected to the scan line GL 0, a drain is connected to the data line DL 0, and a source is connected to the image of the liquid crystal cell LC.

Page 12 200403509 V. Description of the invention (6) The element electrode, and since the gate electrode partially overlaps with the source electrode, a parasitic capacitance GS is formed between the gate electrode and the source electrode. In addition, the pixel A further includes a compensation capacitor C ′ A and a storage capacitor SCA. The compensation capacitor C ′ # is connected to the pixel electrode of the liquid crystal cell LC and the scan line GLg, and the storage capacitor SC is connected to the pixel electrode of the liquid crystal cell LC and the scan line. GL is the same. The pixel B includes a liquid crystal cell LC, a thin film transistor TB, a storage capacitor SCB, and a compensation capacitor C ′ B. The thin film transistor T partially overlaps the gate and source systems, so that A parasitic capacitor GSB. The pixel C is composed of a liquid crystal cell LC, a thin film transistor Tc, a storage capacitor SC c, and a compensation capacitor C ′. Since the thin film transistor T and the gate electrode partially overlap with the source system, the pixel C C also has a parasitic capacitance GSC. As shown in Figure 4, since the compensation capacitors C'a, C ', and C' 与 are connected to the capacitors GSa, GS, and GS ', respectively, the equation (1) can be rewritten as follows: V [(C GS + C) / (C LC + C SC + C GS + C)] * △ VG (2) where C is the capacitance of the compensation capacitor C ′. In general, in the equations (1) and (2), the capacitances of the storage capacitor SC and the liquid crystal cell LC are each several tens of times the parasitic capacitance GS and the compensation capacitance C ', that is, Csc, CLC > > C GS, C, so equation (2) can be simplified into the following formula:

Page 13 V. Description of Invention (7) (3)

Vfd = [(Cgs + C) / (Clc + Csc)] * av As shown in Figure 4 and equation (3), the capacitance effect (as described above), if greater than the resistance of the sweep line GL and ( Cs ^ B'CCsc) ^ (CT) = fr GS a '(Cgs) b = (Cgs) c' (CSc) a =

认 v recognize CA Lc) corpse (CLc) and CA = CB = cc, then the appropriate relationship between pixels A and B ^ F will be (V FD) A > (V pD) B > (V Fd) C, and this will cause The liquid crystal display panel has a diurnal flicker. Therefore, in order to reduce the flicker of the liquid crystal display panel, the V FD of the pixels A and C must be the same, and according to equation (3), the compensation capacitance c ′, gate and The parasitic capacitance cGS between the sources or the storage capacitance C SC 'can achieve the purpose of making the v ^ of each pixel slightly the same, and the adjustment method is as shown in equation (3), when Ca < Cb < Cc, ( Cgs) a = (Cgs) b = (Cgs) c, ^: Mountains-(^) 『(^) and (^ Mountains = (^) Corpse (^)., Then the pixels are eight-six Γ, Γϋguan? OK? It is (Vfd) a% (vfd) c. Therefore, if the compensation voltage is increased, the capacitance C gradually increases as the pixel is farther away from the input terminal of the scan, and the VF of each pixel can be made slightly the same.

2) Oral process. 3) As shown, when (Cgs) a < Cgs) b < (Cgs) c, w ϋ SC) B = (SC) and (Clc) A = (Clc) b = (Cu:) C 'can also make the image The 3 series are (,) ^ ν ^ households, the body's electric valley Cg gradually increases with the distance from the input end of the scanning line to the pixel, and the Vp of each pixel can be approximately the same. .

Page 14 200403509 V. Description of the invention (8)

The relationship between 电 and (CGS) A- (CGS) B = (CGS) and (Clc) a = (c ^ is ^ FD) A, (Vfd) bW (Vfd) c. Therefore, Li / ^ Β 谷 Γϊ: 容 Σs ί ί The farther and farther the pixel is from the input of the scan line, the vF of each pixel will be approximately the same. It is worth mentioning that the above $ M, Htr -V '/ ο Λ «y., The method (1), the method (2) and the method can also be matched with each other to achieve the push Iv from M 1 3) ”Π% Q < ^ is the same purpose of VF fishing for each pixel. The following description is a specific implementation of the present invention. * 路 二 参 ^ 图 五" Jingtu five "Wider five" Change five " This is a top view of a pixel array according to an embodiment of the present invention, and the design of the first embodiment of the present invention is based on the above manner (1). As shown in FIG. 5), the pixel array 50 includes at least one scanning line 52 electrically connected to a scanning line driving circuit 54 and data lines 56a to 56c electrically connected to a data line driving circuit (not shown). In addition, the pixel array 50 further includes pixels A., B, and C, and the pixels A, respectively, include thin-film transistors τα, τ ^ τ, and corresponding liquid crystal cells (not shown). Among them, the thin film transistors TA, T and the drain electrodes 62a, 62b, and 62c are respectively connected to the data lines 56a, 56b, and 56c, and the source electrodes 64a, 64b, and 64c are respectively connected to the pixel electrodes 5 8 a, 5 8 of the liquid crystal cell. b is connected to 5 8 c, and gates 60 a, 60 b, and 60 c are connected to scan line 52 respectively, and a semiconductor layer 66a is provided between each gate and each source and drain , 66b and 66c.

Page 15 200403509

It also contains overlapping areas 68a, 68b, and 68c, where t ί 68 is the overlapping part of the intermediate electrode 60a and the source 64 &, and the heavy ^^^ and 68 (3 are the gate electrode 60b, 60c and source 64b and 64c scoop = 2 2. In addition, the pixel electrodes 58a, 581) and 58c are also a part of the wound 69 & 69b and 69c, and the extensions 69a, 69b and 69c are scanned with The lines 52 are partially overlapped, and the overlapping areas 70a, 70b, and ^ c are formed. It should be noted that the overlapping areas 70a, 701) and 70 gradually change.

In this embodiment, the overlapping regions 68a, 68b, and 68c correspond to the parasitic capacitances GSA, GS, and GSc shown in FIG. 4 respectively, and the areas of the overlapping regions 6 8 a, 6 8 b, and 6 8 c are approximately equal, so Let (c gs) a = (c gs) b = (CGS) c. Furthermore, the overlapping areas 70 and 70] :) and 70 (: respectively correspond to the compensation capacitors c, A, c, and c, c shown in the figure, because the overlapping areas 70a, 70b are diseased s' There is enough space between each pixel electrode and the scanning line to set the overlapping areas 70a, 7Ob, and 70c so that the Vf of each pixel is approximately the same. The area of 70c is gradually increased, so the compensation capacitances c, a, c, and c The approximate capacitance values CA, C, and C are increasing (that is, cA <CB &lt; Cc), so that the VF of the pixels A, B, and C can be approximately the same. Moreover, due to the space between each pixel electrode and the scanning line Wide, so for large-size LCD panels

In addition, the implementation manner of the first embodiment of the present invention is not limited to that shown in FIG. 5 (A), and that FIG. 5 (B) is another example of the first embodiment of the present invention.

200403509 V. Description of the invention (10) An embodiment. As shown in FIG. 5 (B), in the pixel array 50, scanning, the line 5 2 includes extensions 7 1 a, 7 1 b, and 7 1 c, and the extensions 7 1 a, 7 1 b And 7 1 c are located below the pixel electrodes 5 8 a, 5 8 b, and 5 8 c, respectively, and overlap with the pixel electrodes 5 8 a, 5 8 b, and 58 c to form overlapping regions 72a, 72b, and 72c, The areas of the overlapping regions 72a, 72b, and 72c gradually increase. In addition, in the application of wide-viewing-angle liquid crystal displays, for example, vertical alignment liquid crystals, regulatory means, such as protrusions, are often provided to regulate the alignment of the liquid crystals to improve the wide-viewing angle. effect. Therefore, when applied to the above display, the pixel electrodes 58a, 58b, and 58c may further be provided with protrusions 73a, 7 3b, and 73c on the upper side, respectively, and because of the dog-like structure 7 3 a to 7 3 c In order to avoid the electric field of the extended portion 7 1 a ~ 7 1 c of the scanning line 5 2 from interfering with the alignment direction of the liquid crystal molecules, the protruding structures 7 3 a, 7 3 b, and 7 3 c respectively cover the extended portion 7 1 a, 7 1 b and 71c. In other embodiments of the present invention, the protruding structures 73a to 73 may be disposed on a common electrode (not shown), the common electrode is provided on an upper substrate, and the upper substrate is provided with a pixel array 50. The lower substrates face each other in parallel. Generally speaking, the protruding structures 73a to 73c are made of a photoresist material. The overlapping regions 68a, 68b, and 68c respectively correspond to the electric valleys 68 ^ 68 and 68 (: 'and overlapping regions 72 &, 7213 and 72 &lt;: respectively correspond to the compensation capacitors C, A, C, and C, c shown in Figure 4. As shown in Figure 5 (B), weight 4: The areas of the domains 72a, 72b, and 72c gradually increase. Increase, so compensating electricity

200403509 V. Description of the invention (η) The capacitances c, A, C 'and C' are changed in increments of CA, c, and C (ie, CA &lt; C &lt; Cc), so that the pixels A, B, and C can be changed. VF is slightly the same. Please refer to FIG. 6. FIG. 6 is a top view of a pixel array according to a second embodiment of the present invention, and the second embodiment of the present invention combines the above-mentioned manner (1) and manner (2). As shown in FIG. 6, the pixel array 50 includes area I and area II, in which pixels A, B, and C are located in area I, and the thin-film transistors TA, T, and T are about gates 60a, 60b. And 6 0 c contain blocks 6 7 a, 67b, and 67c, respectively, and blocks 67a, 67b, and 67c are located in overlapping areas 68a, 68b, and 68c, and the areas of blocks 67a, 67b, and 67c are increasing. The area of the overlapping regions 68a, 68b and 68c gradually increases. In the second embodiment of the present invention, the overlapping regions 68a, 68b, and 68c correspond to the capacitors Gs a, GS, and GSC shown in FIG. 4 as shown in FIG. 6, and the heavy regions 6 8a, 6 8 b, and The area of 6 8 c changes gradually. Therefore, the relationship between the capacitance value of the capacitors GS Αν GS and GS is (Cgs) a &lt; Cgs) b <(Cgs) c, so the VF of the pixels A, B, and C can be approximately the same. In other words, the pixels in the area I are adjusted to make the V F of each pixel in the area I approximately the same by adjusting the parasitic capacitance CGS between the gate and the source.敉 夂 ^ Ϊ ′ Due to the limitation of the size relationship between the gate and the source, by adjusting the parasitic capacitance GS of ^^, it is not possible to cope with the large-size liquid crystal display surface 50 and 11 1. Therefore, in the second embodiment of the present invention, the pixel array a has a region 1 I ′ and the pixels (not shown) located in the region I I are

200403509

The compensation capacitance C 'of each pixel is adjusted so that the vF of each pixel in the region 丨 丨 is approximately the same, and the pixel structure in the region 11 can refer to the first embodiment, so it will not be described again. Please refer to FIG. 7, which is a top view of a pixel array according to a third embodiment of the present invention, and the third embodiment of the present invention is a combination of the above-mentioned manner (1) and manner (3). As shown in FIG. 7, the pixels A, B, and C include overlapping areas 7 0 a, 7 0 b, and 7 0 c, and the pixel electrodes 5 8 a, 5 8 b, and 5 8 c include extensions 6 9 a, respectively. , 6 9 b and 69c 'the overlapping area 70 a is the extended part 6 9 a and the tracing line 5 2 heavy abundance' and the heavy abundance b and 7 0 c are the scanning line 5 2 and the extended part, respectively. The overlapping parts of 6 9 b and 6 9 c, and the areas of the overlapping ^ fields 7 0 a, 7 0 b, and 7 0 c gradually increase. In addition, the pixels a, β, and C also include overlapping areas 74a, 74b, and 74c, and the overlapping areas 74a, '7 4 b, and 7 4 c are the pixel electrodes 5 8 a, 5 8 b, and 5 8 c, respectively. The portion where the line 5 2 a overlaps, and the area of the overlapping area 7 4 a is larger than the area of the overlapping area 74 b, and the area of the overlapping area 74 b is larger than the area of the overlapping area 74 c. In the third embodiment of the present invention, the overlapping regions 74a, 74b, and 74c correspond to the storage capacitors SC A, SC, and SC c shown in FIG. 4, and the overlapping regions 7 0a, 7 0b, and 7 0c are Corresponding to the compensation capacitors c, a, C 'and C'c shown in Figure 4. As shown in Figure 7, the areas of the overlapping areas 70a, 70b, and 70c are increasing, so the compensation capacitors C, A, C, and (:, 妁) have a relationship of CA &lt; CB &lt; Cc 'and the overlapping areas 74a, 7 4 The areas of b and 7 4 c are gradually decreasing, so the storage capacitors SCA, SC and SC 妁 have a relationship of (Csc) A &gt; (csc) B &gt;

Page 19, 200303509 V. Description of the invention (13) (Csc) c, so that pixel A, pixel B and pixel ⑼v can be slightly the same. The storage capacitor is used to reduce the impact of voltage and assist the liquid crystal cell to survive. The lower the charge-storage ability to assist the liquid crystal, the lower the capacity.

FD is slightly the same, so the third embodiment of the present invention is not only capable of m 2 1 load. It is necessary to note that the storage power consumption of the liquid crystal cell can be reduced without reducing the storage power consumption. The second embodiment of the present invention is directed to a bit array, such as an electrician on the same scanning line. The view, and this ... contains plural you (). As shown in FIG. 8, a pixel array 80 package 84, a data line 82_8 are electrically connected to a scanning line driving circuit Γ image, /, RH are electrically connected to a data line driving circuit 88, in dB, C , And the positions of the pixels A, B, and C ′ correspond to 3 thin lines Ϊί Ϊ1, B ′, and C ′, respectively. Among them, the pixels A, B, and C respectively contain (/). And the cathodic bodies TA, TA and Tc 'and their corresponding liquid crystal cells (not shown separately thin film transistors TA, Tβ, and Tc, the poles 94a, 941) and 94c are single ^ ^ 863 connected 'source electrodes 96a, 961) and 9 ^ are respectively connected to the liquid electrode 90a, 90b and 90β mesh, and the gates 92a, 11

200403509 V. Description of the invention (14) 9 2 b and 9 2 c are connected to each scanning line 8 2 a. In addition, semiconductor layers 98a and 98g8c are respectively provided between each gate and each source and drain. . On the other hand, the pixel electrodes 90a, 901) and 9〇 # include extensions ^ 9 9 a, 9 9 b, and 9 9 c, and the extensions 9 9 a, 9 9 b, and 9 9 c are all Each scan line 82a partially overlaps, and overlap areas 100a, 100b, and 100c, which gradually increase in area, are formed. In addition, the pixel electrodes 90a, 90b, and 90c overlap with the respective scanning lines 82b in the overlapping areas 10a, 102, and 102c, respectively, to form the storage of pixels A, B ', and C'. capacitance. In the fourth embodiment of the present invention, the overlapping areas 丨 00a, 100b and? Should be respectively compensated for the compensation capacitors c, A, c, and C, c (not shown, and the area overlaps the area 1). The areas of Q 〇a, 1 QQ b and 1 Q 〇⑽ are increasing. Second, the corresponding compensation capacitors C, A, C, and C, and the relationship between the fishing capacitors are &lt; Cc ', so that the pixels A, B 妁 and C ， V 妁 v (VFD) B ^ (VFD) c ^ 〇FD; In addition, in the fourth embodiment of the present invention, each of the overlapping regions 100a, 100b, and 100c The formation can also be achieved by extending each scanning line 8 2 3 to the lower side of each pixel electrode 90a, 9 Ob, and 90c to achieve the purpose of this embodiment. ^ _ Compared with the conventional technology, the present invention is within each pixel. A compensation capacitor is added, and each of the compensation capacitors is electrically connected to each pixel electrode and each pixel.

200403509 V. Description of the invention (15) The overlapping area of the scanning line corresponding to the (15) electrode is composed, and the capacitance value of each compensation capacitor is adjusted to achieve the same VF of each pixel and reduce The flicker effect of the liquid crystal display panel further improves the display quality of the liquid crystal display panel. The above description is only a preferred embodiment of the present invention, and any equivalent changes and modifications made in accordance with the scope of the patent application of the present invention shall fall within the scope of the patent of the present invention.

Page 22 200403509 Brief description of the drawings Brief description of the drawings Figure 1 is a schematic diagram of a conventional thin film transistor liquid crystal display panel. Figure 2 is a schematic diagram of an equivalent circuit of a single pixel of a thin film transistor liquid crystal display panel. FIG. 3 is a waveform diagram of the output voltage of each driving integrated circuit chip. FIG. 4 is an equivalent circuit diagram of the liquid crystal display panel of the present invention. 5 (A) and 5 (B) are top views of a pixel array according to the first embodiment of the present invention. FIG. 6 is a top view of a pixel array according to a second embodiment of the present invention. FIG. 7 is a top view of a pixel array according to a third embodiment of the present invention. FIG. 8 is a top view of a pixel array according to a fourth embodiment of the present invention. Explanation of Symbols 10 TFT-LCD 12 Lower substrate 1 4 Pixel array area 1 6 Scan line drive circuit area 16a, 16b, 16c Drive integrated circuit chip 17 Bus line 18 Data line drive circuit area 2 0 Pixel 4 0 Equivalent Circuit 50, 80 Pixel array 52, 52a, 82a, 82b Scan line 54, 84 Scan line drive circuit

Page 23 200303509 Brief description of the diagram 5 6a, 56b, 5 6c, 8 6a, 8 6b Data lines 58a, 58b, 58c, 9 0a, 9 Ob, 9 0 c Pixel electrodes 6 0a, 60b, 6 0c, 92a, 92b, 92c Gates 62a, 62b, 62c '9 4a, 94b, 94c and poles 64a, 64b, 64c &quot; 9 6a, 9 6b, 9 6 c Source 6 6a, 66b, 6 6c- 98a, 98b, 98c Semiconductor Layer 67a, 67b, 67c Block 6 8a, 68b, 68c, 70a, 70b, 70c, 72a, 72b, 72c, 74a, 74b, 74c, 100a, 100b, 100c, 102a, 102b, 102c Overlap area 6 9a, 69b , 6 9c, 71a '7 1 b, 7 1 c, 99a, 99b, 99c extension 88 data line driving circuit

Claims (1)

1. · plate,-bottom, the liquid crystal display panel includes an upper base and a lower substrate, and two pixels (pixei) are provided on the upper substrate and 7 so that each of the pixels is obtained. 2 f includes at least-compensation capacitors. Come h voltage). (Feed-through voltage) The LCD panel of item 1 is "the liquid crystal i ^ @L contains a first scan line, a second scan line, and a broadcast circuit", and each pixel is located between the first scan line and the _ 一 / ^ 一 ^ 之间 'and each of the first scan line and the second scan line has an input end (f irst inPut end), so that the scan line is driven, and f is at j Μ by each The first input terminal inputs signals to the first scanning line and the second scanning line. The LCD display panel of the second scope of the patent application, wherein the capacitance value of each of the supplementary valleys (capacitance) is As the distance between the first input terminal of the first scan line and each of the compensation capacitors increases, the distance increases. 4. The liquid crystal display panel according to item 3 of the patent application, wherein each of the pixels further includes a liquid crystal cell, which includes: a common electrode (c 〇mm 〇ne 1 ectr) 〇de); a pixel electrode (pixel elect rode) is connected to the corresponding compensation capacitors; and Page 25, 200403509 6. Application scope: a liquid crystal molecular layer is disposed between the pixel electrode and the common electrode; and a thin film transistor, which includes: a gate electrically connected to the first scan Line; a drain electrode is electrically connected to a corresponding first data line; and a source electrode is electrically connected to the corresponding pixel electrode. 5. The liquid crystal display panel according to item 4 of the patent application, wherein each of the compensation capacitors is composed of a first overlapping area where each of the pixel electrodes and the first scanning line overlap. Φ 6. If the liquid crystal display panel of item 5 of the scope of patent application, wherein the area of each of the first overlapping areas follows the first input end of the first scanning line and the corresponding area of the first overlapping area. The distance between pixels increases. 7. The liquid crystal display panel according to item 4 of the scope of patent application, wherein each of the compensation capacitors is composed of a second overlapping area where each of the gates and the source corresponding to each of the gates overlap. 8. For a liquid crystal display panel according to item 7 of the scope of patent application, wherein the area of each of the second overlapping areas follows the first input end of the first scanning line and the corresponding one of the second overlapping areas. Increased distance between pixels Page 26 200403509 6. The scope of patent applications has increased. 9 · If I apply for a liquid crystal display panel according to item 7 of the patent, each of the pixels further includes a storage capacitor, and the capacitance of each storage capacitor follows the first input terminal of the second scanning line. The distance from each S storage valley increases and decreases. 102. The liquid crystal display panel according to item 1 of the patent application scope, wherein the liquid crystal display panel further includes a second data line and a data line driving circuit, and each pixel is connected to the second data line, and the first The two data lines have a first round-in terminal, and the data line driving circuit inputs signals to the second data line through the second input terminal. For example, the LCD panel of item 10 of the patent scope is required, and each of them should be compensated. The capacitance value of the valley (c a p a c i t a n c e) increases as the distance between the second input voltage and each compensation capacitor increases. It is as stupid as a liquid crystal display panel with the scope of patent application No. 11 in which each: f element is between a third scanning line and a fourth scanning line, and each image includes: ‘Liquid crystal cell, which includes: a common counter electrode; a * pixel electrode standing connected to a corresponding one of the complementary detection capacitors; and 200403509 6. Application scope: a liquid crystal molecular layer is disposed between the pixel electrode and the common electrode; and a thin film transistor, which includes a gate electrically connected to a corresponding third electrode Scan line;-&gt; and an electrode are electrically connected to the second electrode line, and a source is electrically connected to the corresponding pixel electrode. 13. The liquid crystal display panel according to item 12 of the scope of patent application, wherein each of the compensation capacitors is composed of a first overlapping area where each of the pixel electrodes overlaps with the corresponding third scanning line. 4 1 4. The liquid crystal display panel according to item 13 of the scope of patent application, wherein the area of each of the first overlapping areas is determined by the distance between the second input terminal and the pixel corresponding to each of the first overlapping areas. The distance increases. 15. The liquid crystal display panel according to item 12 of the patent application range, wherein each of the compensation capacitors is composed of a second overlapping area where each of the gates and the source corresponding to each of the gates overlap. 16. The liquid crystal display panel according to item 15 of the scope of patent application, wherein the area of each || second overlapping area is between the second input end and the pixel corresponding to each of the second overlapping areas. The distance increases. Page 28 200403509 VI. Patent application scope 17 • If the first pixel of the patent application scope includes a storage mine &amp; $ &lt; night crystal display panel, each of them (capacHance) / ^^^ ^ ^ ^ # ^ ^ t ^ ^ ^ decreases with increasing distance. Λ —18 · between the input terminal and each of the storage capacitors — a type of liquid crystal display panel, a plurality of scanning lines; /, including: a plurality of data lines; and a plurality of pixels, each of which indicates a pixel electrode; Each pixel includes at least: a thin film transistor, the scan line corresponding to the poor bond, "/ the film transistor includes a gate connected to and a source connected to the second, and the electrode is connected to the corresponding data line, The weight between the scanning lines is equal to the pole, and the pixel electrode corresponds to the corresponding overlapping area; And the area of the area is gradually along a first direction. For example, the application 皋 孓, ~ 〇 The first overlapping area = the liquid crystal display panel surrounding the 18th item, each of which is approximately the same as a compensation capacitor for Each of the pixels can obtain a feed-through voltage that reduces the liquid day-to-day voltage, so as to display the flash effect of the panel day by day. f LCD panel of the 18th patent scope, each of which has a first extension portion, and each of the first extension portion Page 29 200403509 6. The scope of patent application is superimposed on the corresponding scanning line to form each of the first overlapping areas. 2 1. The liquid crystal display panel according to item 18 of the scope of patent application, wherein each of the pixel electrodes is overlapped with a second extension of a corresponding one of the scan lines to form each of the first overlapping regions. 2 2. According to the liquid crystal display panel of claim 21 in the scope of patent application, a protrusion structure is provided above each of the pixel electrodes, and a position of each protrusion structure is located on each of the second extension portions, Used to adjust the orientation of a liquid crystal molecule. Φ 2 3. The liquid crystal display panel according to item 18 of the scope of patent application, wherein the liquid crystal display panel further includes a scanning line driving circuit and a data line driving circuit, and the scanning line driving circuit is routed through one of the scanning lines. An input terminal inputs a signal to each of the scanning lines, and the data line driving circuit inputs a signal to each of the data lines through a second input terminal of each of the data lines. 24. The liquid crystal display panel according to item 23 of the application, wherein the first direction is parallel to each of the scanning lines, and the area of each of the first overlapping regions || The distance between the first input ends of the scan lines corresponding to the first overlapping areas increases and increases by 0. Page 30 200403509 6. Application scope of patent 25. For the liquid crystal display panel with the scope of patent application No. 23, wherein the first direction is parallel to each of the data lines, and the area of each of the first overlapping areas varies with The distance between each of the first overlapping areas and the second input end of the data line corresponding to each of the first overlapping areas increases and increases by 0 2 6. For example, the liquid crystal display panel of the 23rd scope of the patent application A second overlapping area is overlapped between each of the gate electrodes and the corresponding source electrode. 2 7. The liquid crystal display panel according to item 26 of the patent application, wherein each of the second overlapping areas forms a compensation capacitor for each pixel to obtain a substantially the same feed-through voltage. To reduce the flicker effect of the LCD panel. 28. The liquid crystal display panel according to item 27 of the scope of patent application, wherein the area of each of the second overlapping areas follows the area of each of the second overlapping areas and the scanning line corresponding to each of the second overlapping areas. The distance between the first input terminals increases. 29. The liquid crystal display panel according to item 27 of the scope of patent application, wherein the area of each of the second overlapping areas follows the area of each of the second overlapping areas and the data line corresponding to each of the second overlapping areas. Between the second input Page 31 200403509 VI. Scope of patent application Increased distance increases. 30. A liquid crystal display panel comprising: a scanning line driving circuit, at least one scanning line, electrically connected to the scanning line driving circuit; a first section located on the scanning line, wherein at least one first pixel is arranged therein And the first pixel has a first pixel electrode, and a first overlapping area is overlapped between the first pixel electrode and the scan line; and a second section located on the scan line, wherein at least one first Two pixels, and the second pixel has a second pixel electrode, and a second overlapping area is overlapped between the second pixel electrode and the scanning line; wherein the first interval is between the scanning line driving circuit and the second Between the intervals, and the area of the second overlapping area is larger than the area of the first overlapping area. 31. The liquid crystal display panel of claim 30, wherein the first pixel further includes a first thin film transistor, and the first thin film transistor includes a first gate electrode electrically connected to the scan line, a first The electrode is electrically connected to a first data line and a first source is electrically connected to the first pixel electrode, and a third overlapping area is overlapped between the first gate and the first source. 3 2. If the liquid crystal display panel of the 31st scope of the patent application, it applies Page 32 200303509 6. The scope of the patent application The two pixels also include a second thin film transistor, and the second thin film transistor includes a second gate electrode electrically connected to the scan line, a second drain electrode electrically connected to a first Two data lines and a second source are electrically connected to the second pixel electrode, and a fourth overlapping area is overlapped between the second gate and the second source. 33. The liquid crystal display panel according to item 32 of the scope of patent application, wherein the area of the fourth overlapping area is larger than the area of the third overlapping area. 3 4. A liquid crystal display panel comprising: a data line driving circuit; j at least one data line electrically connected to the data line driving circuit; a first section located on the data line, wherein at least one first A thin film transistor having a first gate electrode electrically connected to a first scan line, a first drain electrode electrically connected to the data line, and a first source electrode electrically connected to a first pixel electrode And a first overlapping area is overlapped between the first pixel electrode and the first scanning line; and a second interval on the data line is provided with at least one second thin film transistor, and the second The thin film transistor has a second gate electrode electrically connected to a second scan line, a second drain electrode electrically connected to the data line, and a second source electrode electrically connected to a second pixel electrode, and the second pixel electrode is connected to the second pixel electrode. There is a second overlapping area overlapped between the second scanning lines; Μ wherein the first interval is between the data line driving circuit and the second interval, and the area of the second overlapping area is larger than the first overlap Page 33 200403509 VI. Patent Application Area The area of the area. 35. The LCD panel of claim 34, wherein the first gate and the first source overlap with a third overlap region, and the second gate and the second source overlap with each other. There is a fourth overlapping area, and the area of the fourth overlapping area is larger than the area of the third overlapping area. 36. The liquid crystal display panel according to claim 34, wherein the first section includes a plurality of first thin film transistors, and the area of each of the first overlapping regions is determined by the data line driving circuit and each of the The distance between the first pixels corresponding to the first overlapping area increases and increases. $ 37. The liquid crystal display panel according to item 34 of the patent application, wherein the second section includes a plurality of second thin film transistors, and the area of each second overlapping area is determined by the data line driving circuit and each of the first The distance between the second pixels corresponding to the two overlapping regions increases and increases. 3 8. — A liquid crystal display panel comprising: a plurality of scanning lines for transmitting a scanning signal output by a scanning line driving circuit; a plurality of data lines for transmitting an image output by a data line driving circuit A signal; and _ a plurality of pixels, each of which includes at least: a liquid crystal capacitor; and Page 34 200403509 6. Application scope A thin film transistor, the thin film transistor is electrically connected between the corresponding scanning line, the corresponding data line, and the liquid crystal capacitor; and a compensation capacitor, electrically connected to The liquid crystal capacitor and the scanning line electrically connected to the thin film transistor, and the compensation capacitor is used for each of the pixels to obtain a substantially the same feed current voltage. 39. The liquid crystal display panel according to item 38 of the scope of patent application, wherein the capacitance value of each compensation capacitor increases as the distance between the pixel corresponding to each compensation capacitor and the scanning line driving circuit increases. 40. The liquid crystal display panel according to item 38 of the scope of patent application, wherein the capacitance value of each of the compensation capacitors increases as the distance between the pixel corresponding to each of the compensation capacitors and the data line driving circuit increases. 4 1. The liquid crystal display panel according to item 38 of the patent application scope further includes a storage capacitor electrically connected to the liquid crystal capacitor. 4 2. The liquid crystal display panel according to item 41 of the scope of patent application, wherein the capacitance value of each storage capacitor decreases as the distance between each storage capacitor and the scanning line driving circuit increases. 4 3. The liquid crystal display panel according to item 41 of the scope of patent application, wherein the capacitance value of each storage capacitor is driven along with each storage capacitor and the data line. Page 35 200403509 6. Scope of patent application The distance between circuits increases and decreases. Page 36