SU934478A1 - Device for detecting errors in debugging programmes - Google Patents

Description

The invention is applicable to compute. For example, for machines with a firmware yn-i direction, for which there is a firmware test, it is possible to check with successive sequences of commands with the help of a krtfomu. switching characteristics (hardware sticks). When launching machines go into operation and in case of occurrence, it is necessary to check the correct execution of command sequences both at the macro level and at the microscale. A method is known that after each microcommand the microcommand stops the address of the microcommand and compares After each comparison, the machine must be restarted by putting the hands off the arm. This method is too awesome and takes a lot of time. Due to the step work The execution instructions may be incorrect, i.e., in a number of cases, errors will not go wrong and they will be misinterpreted. A known procedure for recording program execution in digital electronic computers (BRQ-OS 22 46 863), directed to eliminate | 1e of the indicated disadvantages, which can be manually or automatically determined from one of the three logging modes. Here you can check either the address of the transition, or the bypass address of the bypass and the transition, or each command asphes. Logging to the address makes it possible to accurately control the execution of the program, but does not automatically give an error message about the program. In addition, a protocol memory is required. A circuit for detecting and analyzing errors in electronic computing machines is also known, according to which switching circuits, ordered in a logical sequence with respect to flow, are checked in a given sequence (22 47 787). With each switching circuit, the address is matched with which the standard test program is generated for this circuit. In this case, the check refers to such switching circuits as registers, arithmetic blocks, lactic elements, etc. but not related to the firmware control device. The purpose of the invention is to improve the monitoring test of a computer firmware device, thereby reducing the manual control phase of the start-up operation and the time to search for errors. The invention is based on the task of creating such a device that automatically monitors the correct execution of the firmware, i.e. a regular aero statement of microinstructions, regisgrirovat to the bjutro would report a deviation from the specified execution. According to the invention, the problem is solved in such a way that the first control big register bit of micro-instructions is associated with the information input of a trigger, and the rest containing the control bits of the micro-command register register are connected via logic elements to the trigger output, and through the second logic elements together with the clock line - with the clock input of the trigger, the output of the AND element is connected to the information input of the second trigger, and its - with the second And element and with the information input of the third about the trigger, and its output - with the information input of the fourth trigger, the output of the second logic element, and the inverse output of the fourth trigger are connected with the co-ordinate El. And. The micromanals I register shown in the drawing contains three digits A, B, and C. Holes A and B are associated with the first element | MENT NON-2, which is issued by the SETZ. via line 3. Line 3 and clock line 4, which receives the cycle of the four-cycle TOR, are the inputs of the NOT-OR element, the output 6 of which is connected to the clock input of the trigger 7. The information input of the trigger 7 is connected to bit C register of micro-commands I and receives the signal EDN via line 8. Discharge A is connected via inverter 9 with the second element NON-I 10, and discharge B is connected with its second input. The output of this element is connected to the llf line to which the SPE.RR signal is being received. The output of trigger 7, along with line 11, is output to element 12, the output of which is the information input of the second trigger 13, the output of which is connected to the second element 14 and to information input of the third trigger 15, the output of which is output to the information input of the fourth trigger 16. The trigger inputs of trigger 13 and 16 are sent to clock inputs T1 through line 17, and the clock input to trigger trigger 15 is sent to clock pulses. The remaining inputs of the element And 14 are connected via lines 18 and 19 with the line 3 or with the inverse output of the trigger 16. The output 20 of the element And 14 results in the error cwtTian. The SETZ and SPERR screens can be formed directly or from other combinations of signals. The recording of microinstructions into the microinstruction register is performed immediately before the T1 clock cycle, so that the information is in a pacnopstvie for the duration of the clock cycle from T1 to T4. As long as the capacitance of bits A, B, and C is equal to O, the error detection process does not operate. Using the 111 combination, the TOR clock switches on the first trigger 7. Thus, the signal And on the element 12 appears and on line 11 a signal 5PERR l, At the output of the element 12, the signal 1 appears | which does not become effective in this cycle, since it records a trigger in trigger 13 only with a cycle T1 of the next cycle. The following micro commands have a combination of O 1 X. Under these conditions, and SPERft O. The output of trigger 13 is equal to O and, thus, the output of the element And 14 is also equal to O. If in one of the following micro-commands you need a modified combination, for example O O X or I O X, then the SPER signal and the call, one of the element And 12 become equal to 1. With the stroke of T1, this unit is received by the trigger 13 and is applied to the element 14, on which the signal SET2.1 is applied through line 18 and through the line 19 from the inverted trigger output 16 is also signal 1. Thus, the output 20 of the element AND 14 produces an error signal. With a tact of the TZ, the output of the trigger 13 is accepted by the trigger 15, the output of which with the clock T1 ' At the end of the test firmware, the 110 combination is established. As a result, in the tact of the TOR, the trigger 7 is reset to O and, thereby, the formation of a different error signal is prevented.

F

rmula of invention

Device for detecting errors in debugging programs in microprocessor control devices with a micro-register, which is different in that the first first control bit 5 bits from the micro-micro register is associated with the trigger information input 7, and the rest of the control bits contain the A register, B register microinstructions, - 15 are connected through the first logical elements. you are 9, 1O with an AND element connected

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to trigger output 7, and. through the second logic elements 2 4 together with the tact “main line - with clock input trkg & 7”, the output of element 12 is connected to the information input of the second trigger 13 and its output - to the second element 14 and to the information input of the third trigger 15 and its output is connected to the information input of the fourth trigger 16, the output of the logic element 2 and the inverse output of the fourth trigger 16 are connected with the second elements I 14.

It is recognized as an invention according to the results of the examination carried out by the Office for the Invention of the German Democratic Republic.

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Claims (1)

Claim A device for detecting errors in debugging programs in microprogram control devices with a micro-command register, characterized in that the bit containing the first control bit from the micro-command register is connected to the information input of trigger 7, and the rest containing the control bits of bits A and B of the micro-command register ^ 15 are connected through the first logical elements 9, 10 with the AND element connected 934478 6 to the output of the trigger 7, and through the second logic elements 2 ^ 4 together with the active line - with the clock input of the trigger 7, the output of the element And 12 is connected to the 5 information input of the second trigger 13 and its output - with the second element And 14 and with the information input of the third trigger 15, and its output with the information input of the fourth trigger 16, the output of the second logic element '2 and the inverse output of the fourth trigger 16 are connected with the second elements And 14. It is recognized as an invention by the results of an examination carried out by the Office for Invention of the German Democratic Republic.