SU898621A1 - Counter testing device - Google Patents

Description

() DEVICE FOR CHECKING COUNTERS

I

This invention relates to a technique for controlling digital serial devices, in particular, counters, shift registers, etc.

A device for controlling counters is known, which contains a generator, two control buses, P-controlled counting decades, an OR-NOT multi-input element, an AND element and an OR-NOT l element.

A disadvantage of this device is its limited functionality, since it does not allow to fully test the performance of counting decades with outputs from all bits, since such a parameter as the amplitude of the lower-order output pulses is not controlled.

A device for controlling counters is known, which contains a pulse generator, two control buses, two AND elements, an OR-NOT multi-input element, a trigger and P-checkers.

counting decades, the counting inputs of which are connected to the first input of the first element I, the first, second and third inputs of which are connected respectively to the output of the pulse generator, the first control bus and the direct output of the trigger, the inputs of which are set to one and zero the second control bus and with the output of the multiple-input OR-NOT element, whose inputs are connected to the outputs of the nine checked counting decades 2.

The disadvantage of the known device

IS are limited functionality because it does not allow to fully test the performance of the counting decades that have outputs from all bits, since it does not

20, a parameter such as the amplitude of the output pulses of the lower bits of the countable decades being tested is controlled. 3 The purpose of the invention is to expand the functionality. To achieve this goal, the device, to check the counters, contains a pulse generator, a control bus, an AND element, a multi-input element ILITNE, a trigger and P-checked counting decades, the counting inputs of which are connected to the output of the AND element, the first and second inputs of which are connected respectively to the generator output pulses and direct trigger output, the installation inputs to the unit and to which zero are connected to the control bus and to the output of the multi-input element YLI-NE, respectively, are introduced elements of equivalence by number stvu outputs a proxy verifies counting decades, same names whose outputs are connected to the inputs of the corresponding equivalence element whose output is connected to a corresponding input multi-input OR-NO element. The drawing shows a diagram of a device for checking meters. The device contains element 1 and a generator of 2 pulses, trigger 3, checkable counting-decades multientry element 5 OR NOT, equivalence elements, and control buses 7. The counting inputs of checked decades are connected to the output of element 1 AND, the first and second inputs of which connected respectively to the output of the generator 2 pulses and to the direct output of the trigger 3, the installation inputs to the unit and to zero of which are connected respectively to the control bus 7 and to the output of the multi-input element 5 OR NOT, the inputs of which are connected to the outputs of the elements - equal Node,: the inputs of each of which are connected to the corresponding identical outputs of the countable decades being tested -. The device works as follows. When trigger 3 is set to enable state, bus 7 carries pulses from generator 2 through element 1 and simultaneously to the inputs of all tested decades -. If all the decades are intact, then the inputs of elements 6 are affected by in-phase signals of the same amplitude. At the same time, there is no signal at the outputs of elements 6 and, therefore, at the output of element 5 OR-NOT, the trigger 3 is held in the allowed state. wake-up condition, generator 2 does not turn off. The test time is determined by the required number of test cycles and the pulse frequency of the generator 2. For example, when the generator pulse frequency is 5 kHz, 500 test cycles are performed for 1 second. . In the presence of faults of a decade, the signal at the output of one of its bits differs in amplitude or phase from the signals at the outputs of the same bits of the remaining decades. In this case, at the output of the corresponding element of equivalence 6, a signal appears which, through element 5 OR-NOT, arrives at the first input of trigger 3 and sets it to a state that prohibits further passage of generator 2 pulses through element 1. Moreover, the generator is turned off simultaneously with the occurrence the divergence of the output signals of one of the bits of the tested decades, and not at the end of the test cycle, as in the known device. Therefore, in the event of a malfunction, for example, the first discharge of one of the tested decades, the generator 2 is turned off after the first counting pulse. Based on this, it is easy to make a diagnostic table, according to which, depending on the number of counted pulses, the faulty discharge of the tested decade is determined. A faulty decade is detected by comparing the code accumulated in this decade with the codes accumulated in the remaining decades, for example, using a display device. Thus, the proposed device, unlike the known one, automatically determines the operability of P-checked decades and allows detecting a fault in the tested decade with an accuracy of one bit. Such a device can be used without any changes to check the performance of various counters and distributors, since the verification process consists in comparing the amplitude and phase of the obviously unambiguous output.

signal.controlled devices and does not depend on the algorithm of operation of these devices.

Claims (2)

1. Authors certificate of the USSR. s No. 497732, cl. H 03 K 21 / 3t,. 2. USSR author's certificate in application no. 2b50405 / 18-21, cl. H 03 K 21/3, 1978 (prototype). five--/ H / G-; N- | J - J