SU890547A1 - Quasiregular pulse generator - Google Patents

Description

I

The invention relates to automation, pulse and measurement technology and can be used for. forming sequences of quaiirvular pulses in solving problems of statistical modeling, fi also. when testing various impulse devices using the principle of stitching, synchronization and accumulation of pulses. The known generator is a quaeiregul pktex pulse containing a generator of chaotic pulses, a generator of regular pulses, a trigger, a key element and a driver. This device forms a quasi-regular pulse sequence, the follow-up period of which is equal to the period of regular impulses, the average duration of these impulses is determined largely by the duration of regular impulses, and the dispersion of their fronts is napaweTpaNM of a chaotic sequence of pulses 1.

However, this device does not provide sufficient stability for one of the main statistical parameters of the front dispersion sequence, and there is also

the limitation on the value of this parameter, since the maximum decisiveness of a pulse cannot exceed the period of succession of regular pulses. In addition, there is no possibility of reproducing certain portions of a sequence of quasi-cuspidal pulses, which is often essential when you reproduce the maximum possible test conditions of certain digital devices.

The closest to the technical essence of this invention is a pseudo-random impulse sequence generator comprising a pulse generator, a shift register with a half adder in a feedback circuit, an AND element, a number to code converter, a half adder unit, and an output register 2.

However, this device, designed to form binary

25 parallel (CODES, does not ensure the formation of a sequence of pulses with such controlled statistical parameters as the average period of the pulse

30 and its dispersion.

The purpose of the invention is to expand the functional capabilities of the quasi-regular pulses generator by increasing the interval of change of the dispersion of their follow-up period and the ability to repeatedly reproduce certain, quasi-regular sequences of pulses.

The goal is achieved xe that a generator of quayiregular pulses, containing a generator, of pulses, the output of which is connected to the synchronizing input of the shift register with modulo two in the feedback circuit and to the first inputs of the AND elements, has been entered a decoder, switch, OR element, block control codes and a selector, the first inputs of which are connected to the outputs of the shift register and the first inputs of the decoders, the outputs of which are connected to the second inputs of the corresponding And elements, the outputs of which through the switch are connected s to the inputs of OR .elementa, wherein vyhodaa unit actuating codes are respectively connected to the second inputs of the decoder, and a selector switch whose outputs are connected to the outputs of the adder of modulo two.

The drawing shows a block diagram of a generator of quasi-regular pulses.

The generator of quasi-regular pulses contains the generator of 1 pulses, the shift register 2, the adder 3 modulo two, the selector 4, the decoder 5, the AND elements, the switch 7, the OR element 8 and the control codes block 9.

The generator of quasi-regular pulses works as follows.

The pulses from the output of the generator 1, the following about the frequency F, arrive at the synchronization) 1 day input the shift register 2 and transfer it to the next state determined by the information in its bits. In this case, the information in all bits of the register, starting with the second one, is shifted by one bit, and the first bit is the information from the output of the adder 3 modulo two, the first and second inputs of which receive signals from the first and second outputs, respectively. selector 4. At the first output of the sector 4, there is always a signal from the output of the last bit of register 2 shift. At the second output of the selector 4, there is a signal from the output of the discharge of register 2 of shift, krtr, ph: it is determined by the code at the control inputs of the selector 4, form (img in block 9 of the control codes and thus determining the feedback wiring in register 2

shift, which in turn determines the characteristics of a pseudo-random sequence of binary numbers formed in register 2. The number of outputs of the selector 4 in the general case and, accordingly, the number of inputs of the adder 3 modulo two may be more than two. Information from the outputs of all or in a certain way selected register bits 2 in the parallel code is fed to the inputs of the decoders 5.

The following property is known of a pseudo-random sequence of type k formed by a sensor on an n - bit shift register with a modulo two adder in the feedback circuit; within one period of the M sequence, the frequency of any combination of K symbols is equal to .- n (a .. ..a,) 2 With repeated repetition of the M sequence, we can assume that the probability of a combination of K sTzvolrn with sufficient accuracy is equal to

 - i 2k

 one

For example, when using outputs K, bits of shift register 2 and L doiifrator 5, each of which is tuned to one of 2 combinations, at each instant of time at the output of one of decoder 5 there is a signaling, unlocking one of the elements b, and the pulse goes from the output of the pulse generator 1, and at the output of the separately taken decoder 5 and its corresponding element n I, respectively, a unlocking signal and a pulse are formed with a probability f / 2. The combinations of symbols that the decoders 5 are tuned to and determined by the code formed on the respective outputs of the block 9 of control codes connected to the control inputs of daifters 5 can be determined differently from the proposed method, but for the convenience of control It is desirable to maintain the following condition by the generator of quairegulary pulses: the full probability of the appearance of a pulse in each clock cycle of generator 1 at the output of at least one of the elements must be equal to one. The switch 7- connects the outputs of the elements b, defined by the code on its control inputs, to the corresponding inputs of the element 8 OR, the output of which can be obtained, a sequence of pulses with an average tracking frequency from F to F, changeable from

yi

selected step F, selectable

the course of the required accuracy of adjustment. Thus, using this quasiregular pulse generator, it is possible to obtain a sequence of pulses with a given average period - |; -, hPe I

 0,1, ..., K is determined by the code at the control inputs of the switch 7 and the maximum interval between two adjacent pulses exceeding 2 TCP.

The technical and economic effect of this device lies in the reproducibility and repeated reproduction of any part of the sequence of airplanes, which is often necessary to observe the requirement that test conditions of some digital devices are identical.

Generator of quasi-regular pulses, content. pulse generator, the output of which is connected to synchronous

a shift register with a modulo two adder in the feedback circuit and to the first inputs of the AND elements, characterized in that, in order to expand its functionality, a decoder, a switch, an OR element, a control code block and a selector, the first the inputs of which are connected to the outputs of the shift register and the first inputs of the descramble |) s, in which they are connected to the second inputs of the corresponding AND elements, the outputs of which through the switch are connected to the inputs of the OR element, s pod15 klyucheschl respectively to the second inputs cylokto g a, decoder and switch, and the selector outputs are connected to inputs of the adder of modulo two.

20

Sources of information taken into account in the examination

1. Authors certificate of the USSR 544110, cl. I 03 K 3/84, 1977.

2. Authors certificate of the USSR 573858, cl. I 03 K 3/84, 1977.

2S

Claims (2)

Formula of the invention A quasiregular pulse generator containing a pulse generator, the output of which is connected to the synchronizing input of the shift register with an adder modulo two in the feedback circuit and to the first inputs of the I elements, characterized in that, in order to expand the functionality, they are introduced decoder, switch, OR element, control code block and selector, the first inputs of which are connected to the outputs of the shift register and the first inputs of decoders, the outputs of which are connected to the second inputs respectively And the constituent elements, which output through a switch connected to the inputs of the OR gate, the output control unit Sub- codes; key switches, respectively, to the second g inputs of the selector, decoder and switch, and the selector outputs are connected to the inputs of the adder modulo two. 20 Sources of information taken into account in the examination 1. Copyright certificate of the USSR ”544110, cl. And 03 K 3/84, 1977. 2. Copyright certificate of the USSR 25 "573858, cl. H 03 K 3/84, 1977.