SU888270A2 - Automatic syn chronizer with advance time constant - Google Patents

Description

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The proposed automatic synchronizer relates to the field of technical engineering of switching synchronous generators to parallel operation and can be used for synchronizing alternators that are part of mobile electrical units and power plants.

Basically auth. St. No. 777772 describes a san automatizer with a constant advance time, containing rectangular pulse shapers connected to the inputs of a phase comparator, two pulse counters, a comparison circuit, a phase RS-trigger.per, and two logic circuits And connected to the direct and inverse trigger outputs. The second inputs of the logic circuits are connected to one of the square pulse drivers. The inputs of the R9-flip-flop are connected to the phase comparator, and the outputs of the logic circuits AND are connected to the counting inputs of pulse counters whose outputs are connected to the inputs of the comparison circuit 1.

However, this device is highly accurate and has the ability to switch on parallel operation of alternators only in the case of a constant difference in the frequencies of synchronized voltages. A change in the frequency difference during a beat period causes the durations of the first and second half of the beat period to become unequal. In this case, an error is introduced in the determination of the moment of switching on the generator's automaton, the value of which is equal to the difference between the first and second halves of the beat period.

As a result, as the frequency difference changes, the accuracy and reliability of the correct switching on of alternators and parallel operation decreases.

The aim of the invention is to improve the accuracy and reliability of switching on the generators for parallel operation by taking into account the change in the frequency difference when determining the moment of switching on the ipeHepatOpa automaton with a specified lead time.

The goal is achieved by introducing an initial setup and reversing pulse counter into the automatic synchronizer with a constant lead time 1, and a counter with inputs for parallel synchronous recording of information, which are connected to the reversible pulse counter, is used as one of the pulse counters. the forward count input of the reversible pulse counter is connected to the input of the pulse counter, which has parallel synchronous recording inputs and the countdown input is connected to the input of the OTHER counter pulses, while the input of the initial installation of a reversible pulse counter is connected to the output of the initial setup, the input of which is connected to one of the outputs of the RS phase flip-flop. , 1 shows a block diagram of an automatic synchronizer with a constant lead time; in fig. 2 - timing diagrams explaining its principle of operation The device contains square pulse shaper 1 and 2, phase comparator 3, phase R9-trigger 4, two logic circuits AND 5 and b pulse counter 7, the second pulse counter 8 with inputs parallel synchronous recording D,. .. Dy ,, comparison circuit 9, reversible pulse counter 10, having direct account inputs, countdown i and initial installation of НУ, initial installation scheme 11. Shapers, pulses 1 and 2 provide the transformation of the sinusoidal voltages U and 0 of the same phase. synchronized objects into rectangular pulses. The generated pulses are fed to the input of the phase comparator 3, which, one at a time, generates a pulse at the time of coincidence of the phases of the voltages and and Uj. synchronized generators, and differently at the moment when 0 and and. are in antiphase. , Phase and antiphase signals are supplied to the installation inputs of phase 9 of flip-flop 4, R9-flip-flop 4 is in a single state with an increase in the phase difference of the frequency response. {See Figure 2 from O to 180, i.e. during the first half of the beat period and at zero with a decrease in PM from 180 to O, i.e. during the second half of the beat period. Logic circuits 5 and 6, controlled by R5 - trigger 4, pass rectangular pulses from the generator 1, respectively, during the first half of the beat period - to the counting input of counter 7 and input -1 of the counter 10, and during the second half of the beat period, to counting the input of the counter 8 and the input of the counter 10 The initial installation circuit 11 overwrites the states of the counter 10 into the counter B at the time of the antiphase 1) and Ui, simultaneously generates a signal of the initial installation of the counter 10. The imager 1 is used as a clock source to determine the moments and with a predetermined advance time -fepf r yntj, where 1 and - the repetition period of a clock pulse -YJkolichestvo required for the desired frame t (sm.fig.2) and for determining the beat durations p6luperiodov t rt ,, T. nt ,, where Tj,; m. are the durations of successive half-periods of beats, and Е and п are the number of clock pulses during these half-periods. Then the change in the duration of the half period UT T4, - T (n-E) tH. Since, due to the inertia of the change in the frequency of the alternator, the magnitude of the DT in a short period of time is almost unchanged, the expected duration of the beat that follows after the half-period is T + tT n + + (n-) tp ,. At the same time, in order to accurately switch on the parallel operation, the generator automat must be switched on after the antiphase moment in time T + DT - ton / i.e. from the moment of antiphase, it is necessary to count n + (n-6) -t n (n-e) clock pulses. These actions are achieved by the fact that the counter 7 counts the number of clock pulses Y) for the half period Ti, having a zero initial state at the moment of coincidence of the phases 0 and Oy, and the counter 8 counts the number of clock pulses in the next half a period initial, state at the time of antiphase code, with the corresponding: the value of m- (n-8). This code is rewritten to counter 8 from counter 10, which determines this value during half periods T, at the time of antiphase. and T. To do this, at the time of the antiphase (the beginning of the period T.), the counter 10 is set by the circuit 11 to the initial state, corresponding to the value of m. And To the end of the half period Tt.- (top T) it has a state corresponding to the value of ha + 6. During the half period T (from phase coincidence to the backfill), the counting pulses arrive at the countdown counter 10 input to the end of the half period T counter 10 has state corresponding to the value of go + E –n t- (p- D), after which this code is rewritten at counterphase momentum into counter 8, and counter 10 is reset to the initial state, corresponding to the value of τ, starting a new cycle for determining t. Thus, by the time of the coincidence of the states of the counters 7 and 8, the counter 8, counting from the moment of antiphase to phase coincidence, having the initial state, the code corresponding to the value of m- (p-C), reaches (n-) clock pulses, t. e. the instant of coincidence of the states of the counters 7 and B, determined by the comparison circuit 9, corresponds to the specified advance time.

The comparison circuit 9 generates a signal to turn on the generator automaton at the time of coincidence of the states of the counters 7 and 8 only in the second half of the beat period and only at permissible slip, i.e. with an acceptable duration of the period of beats. At the same time, the duration of the beat period is determined by the comparison circuit 9 by the number of counting pulses counted by the counter 7 for the first half. beating period.

Claims (1)

1. USSR author's certificate 777772, cl. H 02 WG 3/42, 1979. ek / / 7- / ffi-fn-i -ff t 3bt / i