SU877575A2 - Device for computing random process dispersion - Google Patents

Description

(54) DEVICE FOR CALCULATING THE DISPERSION OF RANDOM PRESSES

one

The invention relates to statistical analysis of random processes and can be used to develop specialized computing units for working with random signals in measuring systems for statistical analysis.

According to the main author. St. No. 377704, a device for calculating random process variance is known, comprising a first subtraction unit, the output of which is connected via a quad to the input of the first integrator, the first output of the first delay unit is connected to the first input of the first subtraction unit, the second inputs of the first block / subtraction and the first delay unit. combined and are the input device 1.

The known device determines the variance of random processes (second moment).

The purpose of the invention is to expand the functionality of the device by calculating moments higher than the second order.

The goal is achieved by the fact that four delay blocks are introduced into the device for calculating the dispersion of random processes, four blocks

subtractor, adder, two multipliers and two integrators, with this second output of the first delay unit being connected via the second delay unit to the first input of the second subtraction unit and to the input of the third delay unit, the output of the third delay unit is connected to the first input of the third subtraction unit, the second input which is combined with the second input of the second subtraction unit and is the input of the device, the output of the quadr directly and via the fourth delay unit is connected respectively to

15 to the first and second inputs of the fourth, subtraction unit, the output of which is connected to the first input of the multiplication unit, the second input of which is connected to the output of the second subtraction unit, output

20 of the first multiplication unit is connected to the input of the second integrator, to the first input of the fifth subtraction unit AND via the fifth delay unit with the second input of the fifth subtraction unit,

25 of which is connected to the first input of the second multiplication unit, the output of which is connected to the input of the third integrator, the second input of the second multiplication unit is connected to the output of the adder, the first and second inputs of which

thirty

connected respectively to the outputs of the first and third subtraction units.

The drawing shows the block diagram of the device.

The device contains the first block 1 subtraction, the first block 2 delay, quad 3, the first integrator 4, the second block 5 delay, the second block b subtraction, the fourth block 1 delay, the fourth block 8 subtraction, the first block 9 multiplication, the second integrator 10, the third block II delay, the third subtraction unit 12, the adder 13, the fifth delay unit 14, the fifth subtraction unit 15, the second multiplication unit 16, the third integrator 17.

The device works as follows.

The subtraction unit 1 forms the difference at Xc-Hz. The delay unit 2 serves to store the previous value. The output signal of the quad is fed to the input of the integrator 4, at the output of which we have an estimate of the dispersion of the input signal. The signal from the output of the block 5 x k- (arrives at the input of block b, the output of which is a signal UK. X, -х к- / / arrives at one of the inputs of the first multiplication unit 9. From the output of quadrant 3, the signal Zjj goes to the block; 7, which serves to store the preceding value. The output of the subtraction unit is affected by the signal M (.), Which is fed to another input of the multiplication unit 9. The output signal of the multiplication unit is fed to the integrator 8, at the output of which the third central moment estimate is formed.

-W, The signal from the output of the 11 x.j block is fed to one of the inputs of the subtractor, the output of which forms the difference (4) 3-g / that goes to one of the inputs of the adder. At the output of the adder, the signal is N (xc-x.) (.J). This signal is fed to one input of multiplication unit 16. From the output of multiplication unit 9, the signal through delay unit 14 is fed to one input of subtraction unit 15, the output of which is a signal H which is fed to another input of multiplication unit 16. The output signal of this multiplication unit 9 is fed to the input of the integrator 17, the output of which has an estimate of the fourth central moment

.

“The device will find wide application for developing on its basis specialized computational units designed for operation with random signals. The device allows the on-line processing of measurement information from the object under study. When using the device, the time for determining these characteristics will be reduced by 4-6 times.

Claims (1)

1. USSR author's certificate 377704, cl. G 06 R 15/36, 1971 (prototype).