SU873399A1

SU873399A1 - Pulse train former

Info

Publication number: SU873399A1
Application number: SU792832449A
Authority: SU
Inventors: Иван Филиппович Гавриленко; Валентин Петрович Артемкин
Original assignee: Предприятие П/Я Р-6681
Priority date: 1979-10-25
Filing date: 1979-10-25
Publication date: 1981-10-15

Description

Изобретение относитс к импульсно технике.The invention relates to a pulse technique.

Известен формирователь серий импульсов , содержащий генератор импульсов , делитель частоты, элементы И, пороговое устройство, датчик времени (1 .Known shaper series of pulses, containing a pulse generator, a frequency divider, the elements And, a threshold device, a time sensor (1.

Недостатком данного формировател вл етс недостаточна стабильность.The disadvantage of this former is insufficient stability.

Наиболее близким по технической сущности к изобретению вл етс формирователь серий импульсов, содержащий генератор импульсов, один из выходов которого соединен со входом N входовогр делител частоты и одним. из входов (М-И)-входового элемента И, остальные (N-1) входов которого соединены с выходами ключей, управл ющие входы которых подключены к выходам блока управлени 2. The closest to the technical essence of the invention is a pulse trainer comprising a pulse generator, one of the outputs of which is connected to the input N of the input / frequency divider and one. from the inputs (M-I) of the input element I, the rest (N-1) inputs of which are connected to the outputs of the keys, the control inputs of which are connected to the outputs of the control unit 2.

Недостатком данного формировател вл етс значительный фазовый сдвиг импульсов в серии.The disadvantage of this former is a significant phase shift of pulses in a series.

Цель изобретени - уменьшение фазового сдвига импульсов в серии.The purpose of the invention is to reduce the phase shift of pulses in a series.

лител частоты и один из входов (N+1)-входовопо элемента И, остальные (N-1)-входов которого соединены с выходами ключей, управл кидае входы которых подключены к выходам блока управлени , введены NRS -триггеров, S- и Ч-входы каждого из которых подключены к пр мому и инверсному выходам соответствующего разр да М 0 разр дного делител частоты, С-вход первого fiS -триггера подключен ко второму выходу генератора импульсов, а выход этого 5 -триггера соединен с (N+1) входом элемента И, С-входы 5 каждого нз остальных US -триггерюв подключены соответственно к пр мымвыходам предыдущих разр дов N -разр дного делител частоты, а выходы данных 4S -триггеров подключены ко frequency module and one of the inputs (N + 1) -Input of the And element, the rest (N-1) -inputs of which are connected to the outputs of the keys that control the inputs of which are connected to the outputs of the control unit, introduced NRS-triggers, S- and H- the inputs of each of which are connected to the direct and inverse outputs of the corresponding bit M 0 of the bit frequency divider, the C input of the first fiS trigger is connected to the second output of the pulse generator, and the output of this 5 trigger is connected to the (N + 1) input of the element And, C-inputs 5 of each nz of the rest of the US-trigger are connected respectively to n mymvyhodam previous bits N -bit frequency divider, and data outputs connected to -triggerov 4S

0 входам упом нутых ключей.0 inputs of the mentioned keys.

На чертеже приведена структурна электрическа схема предлагаемого формировател .The drawing shows a structural electrical circuit of the proposed driver.

SS

Формирователь содержит генераторShaper contains a generator

Claims

1 pulses, N-bit divider The principle of operation of the proposed shaper is as follows. When pulses are received from the pulse generator 1 at the input of the N-bit divider 2. frequency with the frequency followed, the frequency of these pulses is divided by 2 times. Synchronously with the processes occurring in the 2 frequency divider using RS triggers, ancillary strobe pulses are sent to element 15 And where the selection strobe pulse is formed. A feature of such a selection pulse is that it is formed from the conjunction of all without excluding the auxiliary strobe pulses preceding the strobe pulse, which is formed by the R5-trigger, connected to the higher-order bit of the frequency body, which determines the division ratio. The set of auxiliary strobe pulses (with closed (keys) conjunctively participating in the formation of a selection pulse) represents the so-called cone selection, conveniently demonstrating the selection principle when the geometric axis of the selection cone coincides with the leading edge of the impulses of the original sequence with an accuracy determined by instability generator 1 itself and the operation time of element 15 I. If all the keys are open, then at the output of element 15 AND a pulse sequence is formed a frequency 2 times lower than the frequency of the generator 1, i.e. 2. When the key 10 is closed, a pulse sequence with frequency / 4 is formed, when the keys 10 and 11 are closed, a pulse sequence is formed with the frequency S / 8, and when the keys 10 are simultaneously closed -12 - sequence {/ 16, etc. When all switches are closed, a pulse sequence is formed with a frequency equal to $ / 2. Phase shifts resulting from the influence of trigger noise of a divider 2 frequency and Rs-triggers are insignificant, since they affect only the way Thus, due to the selection of the initial sequence using the selection cone, the phase shift, or parasitic delay of the output sequence relative to the input sequence, is determined only by the activation time of element 15 And, i.e. by the value of D eg, and thus the goal is achieved - reducing the phase shift of pulses in a series. The claims of the pulse shaper comprising a pulse generator, one of the outputs of which is connected to the input of the input frequency divider and one of the inputs (N + 1) of the input element AND, the rest (M-1) inputs of the koitoporo are connected from the output 1 and the keys, Control inputs of which are connected to the outputs of the control unit, characterized in that, in order to reduce the phase shift of the pulses in the series, N US triggers are entered into it, S and I inputs of each of which are connected to the direct and inverse outputs of the corresponding bit N-bit d d The frequency module, the C input of the first 45 trigger is connected to the second output of the pulse generator, and the output of this H5 trigger is connected to the (K + 1) input of the And element, the C inputs of each of the other RS triggers are respectively connected to the outputs of the previous bits Dov, N-bit frequency divider, and the outputs of data H5 triggers are connected to the inputs of the mentioned keys. Sources of information taken into account during the examination 1. Patent. USSR № 473389, cl. H 03 to 5/156, 12.09.68.

2. US Patent No. 3803497, Cl, 328-104, 09.04.74o

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