SU869019A1 - Stochastic meter of periodic signal effective value - Google Patents

Description

The invention relates to a technique for measuring the effective value of a signal and is used in communication technology. There is a known correlometric measuring instrument of the effective value of the signal which has an input amplifier, two comparators, a clock pulse generator, a pseudo-random number generator, a digital-to-analog converter, a constant voltage source, an analog adder, a logic inverter, two groups of gates, a decision unit and a recording device w. The disadvantage of this meter is the impossibility of measuring the effective value of fluctuations, which are additive to any periodic signal and coming along with this signal to the input of the meter, and the impossibility of subtracting the effective value of fluctuation from the actual value of the total signal. The purpose of the invention is the expansion of the functional capabilities of a stochastic meter. The goal is achieved by THAT, in a stochastic meter, the effective value of a periodic signal, containing an input amplifier connected to the first inputs of two comparators, the second inputs of which are connected to the first output of the clock generator, the second output of which is connected to control input, nor the first pseudo-random number generator, the output of which is connected to the input of a digital-to-analog converter, the output of which connected to the third input of the first comparator and to the first input of the analog adder, the second input of the unscast adder is connected to the output of a DC voltage source, and its output is connected to the third input of the second comparator, and the decision block, the output of which is connected to the recording unit, is additionally entered second pseudorandom number generator, subtraction unit, two accumulating algebraic adders, two consecutive shift registers, four AND elements, two OR elements, three reversible counters, summing A second counter and; a switch, wherein the control input of the second pseudo-random number generator is connected to the second clock generator input, J the outputs of the first and second pseudo-random number generators are connected to the first and second inputs of the subtraction unit, whose output and outputs of the first and second pseudo-random value generators are through the switch is connected to the input of the increments of the first on the cumulative algebraic sum a, the output of the first pseudo-random number generator is connected to the input of the increments of the second for example, the algebraic adder, the output of the first and second accumulative algebraic adders are connected to the first and second inputs of the decision block respectively, the control inputs of the first and second shift registers are connected to the first output of the clock generator, the output of the first comparator is connected to the control input of the summation of the first accumulating algebra summator. the first inputs of the first and second elements And, the summing input of the first reversible counter and through the first The shift register is connected to the control input of the summation of the second accumulating algebraic adder, the second input of the second element And, the first input of the third element And and the summing input of the second reversible counter, the output of the second comparator is connected to the control input by subtracting the first accumulated algebraic adder, the second input of the third element And, the first the input of the fourth element And, the subtracting input of the first reversible counter, the input of the summing counter and through the second sequence A special shift register with a control input for subtracting the second accumulating algebraic adder, the second inputs of the first and fourth elements AND and the subtracting input of the second reversible counter, the outputs of the first and third elements AND through the inputs of the first element OR are connected to the summing input of the third reverse counter, the outputs of the second and fourth elements And through the inputs of the second element OR are connected to the subtractive input of the third reversible counter, the outputs of the summing and first, second, third reversing These meters are connected respectively to the fourth, fifth, sixth and seventh inputs of the decision block,

The drawing shows a block diagram of a stochastic meter with a valid value of a periodic signal.

The stochastic periodic signal meter contains an input amplifier 1, which is connected to the first inputs of comparators 2 and 3. The second inputs of comparators 2 and 3 are connected to the output of a 4 clock pulse generator and to the control inputs of successive

shift registers 5 and 6; another output of the 4 clock pulse generator is connected to the control inputs of the generators 7 and 8 pseudo-random numbers, whose outputs are connected to the inputs of Lock 9 subtraction and to the switch 10; The output of the generator of 7 pseudo-random numbers is also connected to the input of increments of the accumulating of the electropower adder 11 and to the digital-to-analog converter 12, the output of which is connected to the third input of the comparator 2 and the first input of the analog adder 13, the second input of the analog adder 13 is connected to the output of the source ka 14 constant voltage, and the output with the third input of the comparator 3, the output of the subtraction unit 9 through the switch 10 is connected to the input of the increments of the accumulating algebraic adder 15, the outputs of both sumgators 11 and 15 are connected to the corresponding inputs of the unit 16, connected to the recording unit 17. The forward output of comparator 2 is connected to the control input of the summation of the adder 1 by the first inputs of the elements 18 and 19, the summing input of the reversible counter 20 and through the sequential shift register 5 with the control input and summing the adder 11, the second input of the element And 19, the first input of the element And 21 and the summing input of the reversible counter 22. The inverse output of the comparator 3 is connected to the control input of the subtraction of the adder 15, the second input of the element And 21, the first input of the element And 23, the subtracting input a reversible counter 20, an input of a sum counter 24, and a sequential shift register b with a control input for subtracting adder 11, second inputs of elements. Both 18 and 23 and the subtracting input of the reversing counter 22. The outputs of the elements 18 and 21 through the element OR 25 are connected to the summing input of the reversible counter 26, and the outputs of the elements 19 and 23 through the element OR 27 are connected to the subtracting input of the reversing counter 26, Outputs of the counters 20, 22, 24 and 26 are connected to the corresponding inputs of the decision block 16.

 The device works as follows;

In the first mode, when switch 10 is in position I, the device estimates the effective value of the signal x (t} -Xy, (t) 4+ 1 (t), where Xjj (t) is any periodic signal, h (t ) - additive fluctuirkmda was kvda signal X (t),

The signal x (t) is brought to the region x (t) f r-ptq in the input amplifier 1 and is fed to the first inputs of comparators 2 and 3, the second inputs of which receive pulses from the output of the generator 4 clock pulses. From the output of the generator 7, a parallel code of pseudo-random numbers is fed to a digital-to-analog converter 12, the output of which produces a random signal, and ° is fed to the third input of the comparator 2 and to the first input of the analog adder 13, to the second input of the analog adder 13 A calibrated voltage, q, is applied to the generator, and a random signal is generated at the output of the adder 13. (k) arriving at the third 8KhOL of the comparator 3. In addition, the code is fed to the input of accumulation algebraic adder 11, to the first input of subtraction unit 9 and through switch 10 to the input of accumulating algebraic adder 15. The width of adders 11 and 15 is the same and matches the size with generators 7 and 8 pseudo-random numbers. The adder 15 increments f, if 1 is subtracted, if nW is 1, and does not take into account, if 0, where is the output signal of comparator 2, is the inversion of output comparator 3. Thus, sum 5 is formed in adder 15 counter 24, where the inverse output of the comparator 3 receives signals W. The sums S., and Sj enter the decision block 16, which completes the definition of grade 2 in accordance with the formula

C5,5,), ()

X is the estimate of the effective value of the signal;

PX is the estimate of the average signal power X (t);

q is the measurement limit;

M is the number of gating cycles during the measurement;

.

 -R-and realize the pseudo-random number at the output of the generator 1 sevdrandomny numbers 7, and the digital value of this assessment transmits to the recording unit 17.

In the second mode, when switch 10 is in position H), the effective value of the random process L (t) is determined.

In this mode, the device operates as follows.

Both generators 7 and 8 of pseudorandom circuits have the same width, structure and cycle length of the gene, generated numbers, but the cycle of numbers generated by generator 8 is delayed by ni gating cycles in relation to the cycle of the same numbers generated by generator 7 .

 Bpok1-4, 7, 12-14 24 of the proposed device work similarly to the first mode. But in this case with. the output of block 9 subtraction through the switch 10 to the input of the accumulating adder 15 receives the differential code

5, the slummer 15 determines the sum Sj, which is fed to the input of the decision block 16. The input of the accumulating adder 11 receives the code of numbers 1, and the control input of this sum0 Udatrr 11 receives the signals PK-t

7Я1

W

about

- day off

where n

The n-w -n-n signal of the comparator 2 and the inversion of the output signal of a parasampler 3 from the outputs of the t-bit sequential 5 registers 5 and 6 of the shift, while

The accumulator 11 accumulates the sum S, which is fed to the corresponding input of the decision block 16. In addition, the weekend. signals and

m coit factors 2 and 3 and the delayed signals ПУ1, and these comparators through the elements 18, 19, 21 and 23 and the elements OR 25 and 27 arrive at the corresponding inputs of the reversing

5 counters 20, 22 and 26, forming Sg-, SY bags, which are fed to the inputs of the decision block 16. In the decision box, the definition of the assessment is completed according to the formula

Cho, - / q -i / | (s5-S4 + S5 + Sb + S7) / 6)

 () (rf; -T / F); (7)

N

,)

(at)

K-TP K-P7

N

H JiT

SF-tE; (; (0 5b 4E,, Hp,);

(ten)

&

PGP |, .p, p;) HD

) C)

- (n,.) 1 ..

e Pf5 (- estimate of the average power of signal fluctuations x (t),

Claims (1)

- (KT) -a realization of a pseudo-random number at the output of the pseudo-random number generator 8, sent to subtractor 9 simultaneously with the implementation of the pseudo-random number from generator 7,, n are the output signals of the comparators 2 and 3 delayed by m clock strobes in successive registers shift 5 and b, respectively, and the code of this evaluation is transmitted to the registering unit 17. In the third mode, when the switch 10 is in position 111, the proposed device determines the evaluation Hpie of the current value of the periodic component Igna x (t). In this mode, the device operates similarly to the second mode, except that the code of numbers. -T through the switch 10 enters the input of accumulating adder 15. In this adder the sum Sg is formed and appears at the input of the decision block 16, the sums $ 4-5 are formed and they arrive at a resane block the same way as mode II, only decisive block 16 takes them into account with the required signs and produces an estimate of ype according to the formula D) ----: - :: - ns (SQ + S4.-S5-S6-ST .), (ii Se sjK-n, (). (d) and transmits the digital code of this assessment to the recording unit 17. Claims of the invention A hash meter of actual value of a periodic signal containing an input amplifier connected to the first inputs of two comparators, the second inputs of which are connected to the first output of the clock generator, the second output of which is connected to the control input of the first pseudo-random number generator, the output of which is connected to the digital and analog input converter, the input of which is connected to the third input of the first comparator and to the first input of the analog adder, the second input of the analog adder is connected a source output DC voltage, and its output is connected to the third input to the second comparator and deciding unit whose output is connected to the recording, characterized in that for the purpose of expansion capability stochastic meter, it introduced a second random number generator. a subtraction unit., two accumulating algebraic adders, two consecutive shift registers, four AND elements, two OR elements, three reversible counters, summing counter and switch, while the control input of the second pseudo-random number generator is connected to the second clock pulse input, the outputs of the first and second generators of pseudorandom numbers are connected to the first and second inputs of the subtraction unit, the output of which and the outputs of the first and second generators of pseudorandom variables through a switch with are united with the input of the increments of the first accumulating algebraic adder, the output of the first pseudo-random number generator is connected to the input of the increments of the second accumulating algebraic adder, the outputs of the first and second accumulating algebraic adders are connected respectively with the first and second inputs of the decisive block, the control inputs of the first and second registers The shear pit is connected to the first output of the clock generator,; the output of the first comparator is connected to the input of the summation control of the first accumulating algebraic adder, with the first inputs of the first and second elements AND, the summing input of the first reversible counter and through the first sequential shift register connected to the control input of the summation of the second accumulating algebraic adder, the second input of the second element and, first the input of the third element And the summing input of the second reversible counter, the output of the second comparator is connected to the control input By subtracting the first accumulating algebraic adder, the second input of the third element And, the first input of the fourth element And, the subtracting input of the first reversible counter, the input of the summing counter and through the second sequential shift register with the input of the subtraction control of the second accumulating algebraic adder, the second inputs of the first and fourth elements And and subtractive input of the second reversible counter, the outputs of the first and third elements AND through the inputs of the first element OR are connected to su the mimic input of the third reversible counter, the outputs of the second and fourth elements And through the inputs of the second element OR are connected to the subtractive input of the third reversible counter, and the outputs of the summing and first, second, third reversible counters are connected respectively to the fourth, fifth, sixth and seventh inputs of the decision unit . Sources of information taken into account during the examination 1. USSR author's certificate No. 600721, cl. H 03 K 13/02, 1976 (prototype).