SU864547A1 - Device for analogue-digital conversion - Google Patents

Description

(54) DEVICE ANALOG-DIGITAL TRANSFORMATION

one

The invention relates to a digital electrical measuring technique and is intended to convert broadband electrical signals into a digital code.

In the general case, the process of analog-to-digital conversion of time-varying signal signals leads to the fact that the conversion results are shifted in time relative to the encoded signal by the magnitude of the phase shift. At the same time, the value of the dynamic error of the analog-digital conversion at a given frequency spectrum of the encoded signal depends on the magnitude of the delay of reading, reaches the minimum value when the delay of reading is equal to the phase shift. Since the process of analog-to-digital conversion is non-linear in nature, and the magnitude of the phase shift depends on the frequency spectrum of the encoded signal, the magnitude of the sample delay cannot be specified in advance.

Analog-to-digital conversion devices with automatic correction of dynamic error L are known. However, the introduction of additional correction cycles increases. conversion time. In addition, these devices do not allow the phase shift to be determined in order to obtain a minimum value of the dynamic error when encoding the wideband signals.

A analog-to-digital conversion device is known, which contains a comparison device, the first input of which is connected to the input bus, the second input - to the output of a digital-to-analogue converter, and the output - to the 15th input of the control device 1.2}.

The disadvantage of the device is the large dynamic error of the analog-digital conversion that occurs when encoding 20 broadband signals.

The purpose of the invention is to obtain the minimum value of the diyamic error.

Claims (2)

 The goal is achieved in that an analog-to-digital conversion device containing a comparison device, the first input of which is connected to the input bus, a second input to the output of the D / A converter, and an output to the input of the control device, has introduced a delay device with the control unit, an additional comparison device, reversible counter and logical block whose first input is connected to the output of the control unit, the second and third inputs - respectively to the output of the main and additional comparison ing devices, output from the reversible counter - to the input of the delay unit of the control unit, input of the latter is connected to the input shinoy and an output - to the first input of the complementary comparator, a second input coupled to an output difroan alogovogo transducer, The drawing shows a block diagram of the device. The device contains a comparison device 1, the first input of which is connected to the input bus, a delay device 2, an additional comparison device 3, the second inputs of the comparison device 1 and 3 are connected to the output of the digital-analog converter 4, which is connected to the output of the control device 5. The output of the comparison device 1 is connected to the input of the control device 5 and to one of the inputs of the logic eye 6, the second input of which is connected to the output of the comparing device 3, its third input is connected to the output of the device control 5 end of conversion. The output of the logic unit 6 is connected to the input of the reversible counter 7, the output of which is connected to the input of the control unit 8, the delay device 2. The A / D conversion device works as follows. The control signal 5 is turned on by the start signal. Comparison device 1 and digital-analog converter 4 initiate an analog-to-digital conversion of the input signal, at the end of which comparison devices 1 and 3 simultaneously compare the current .x (t) and delayed signals with output voltage iocifro analog converter 4. At the command of the control device 5, the end of the conversion, logic unit 6 evaluates the state of the comparison devices 1 and 3 and produces in a reverse center tchike 7 following surgery. If the conditions for comparing devices 1 and 3 are appropriate for Ux (t) Uo, i.e. x 1U4 (t-t4) and. where Ux, (t) is the current value of the encoded signal | and (t-t4) is the delayed value of the signal to be converted. by the value of the delay-bf, and - the output value of the voltage of the digital-analogue converter 4 at the moment of termination of the analog: o-digital conversion; X - output signal comp. X device is the output signal of the comparison device 3. Or if the conditions are met; Uj (t) Uo, i.e. x 0 Ux (t-tЧ) Uo, i.e., one is added to the reversible counter 7 by a signal from the logical block b, and the control unit 8 by delay 2 increases the shift in delay 2 by At 1. If the conditions for comparing devices 1 and 3, respectively:) $: Uo, i.e. Ux (t-tif) Uo, T.e. x O or when conditions U (t) UQ are met, i.e. X O; Ux (t-t4) Uo, i.e. xi 1 in the reversible counter 7 is subtracted by a signal from logical block 6, and the time shift is reduced by the value of AtP. During the multiple conversion cycles, the reversing counter 7 will set a code that, in average, corresponds to the counting delay at which the value dynamic error is minimal for a given frequency spectrum of the encoded signal. This state corresponds to the likelihood equality: P () P (tM ctiPo) where tvf is the current value of the reference delay; , is the optimal value of the reference delay at which the dynamic error has a minimum value for a given frequency spectrum of the signal. An invention of an analog-to-digital conversion device comprising a comparison device, the first input of which is connected to the input bus, the second input - to the output of the digital-to-analog converter, and the output - to the input of the control device, characterized in A delay device with a control unit, an additional comparison device, reversing the counter and logic unit, the first input of which is connected to the output of the control unit, the second and third inputs, respectively, to the output of the main and additional comparing devices, the output - through a reversible counter - to the input of the control unit of the delay device, the last input is connected to the input bus and the output - with the first input of an additional comparison device. the second input of which is connected to the output of a digital-to-analog converter. Sources of information taken into account during the examination 1. Ostroverkhov V.V. Dynamic error ADC. 1975, pp.51-90. 2. Khlistunov V.N. Fundamentals of digital measurement technology. 1966, pp. 179184 (prototype).