SU847503A1 - Time discriminator - Google Patents

Description

(54) TEMPORARY DISCRIMINATOR

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The invention relates to radio engineering and can be used in various radio engineering devices, in particular, in radar receivers of optical and radio bands.

Temporal discriminators are known that allow precise time reference to the input pulse under conditions of a large change in its amplitude by differentiating the input signal with reference to the pulse height, and the next threshold method that allows binding to the front of the input pulse 1.

The disadvantage of such a discriminator is the low degree of suppression of common mode noise.

Also known temporal discriminator, containing an input source, mass stabilizing and subtracting elements 2.

The disadvantages of this discriminator are non-patient dynamic range and low noise immunity.

The purpose of the invention is to broaden the dynamic range and increase noise immunity.

The goal is achieved by introducing a differentiating element in the time discriminator containing the input source, mass stabilizing and subtracting elements, made in the form of the first differential stage on two transistors, whose bases are connected to the input source, the emitters are connected to the power supply terminal via resistors and with the bases of the transistors of the subtracting element, made in the form of the second differential cascade on two transistors, the emitters of which through the mass-stabilizing element The amplifier and the resistor are connected to the power supply terminal. The collectors are cross-connected to the collectors of the transistors of the first differential stage and the output terminals.

FIG. 1 is a schematic diagram of a temporary discriminator; in fig. 2 is a timing diagram of the current signal in the collector circuits of one of the circuit outputs; in fig. 3 - a temporary discriminator circuit is functional.

The schematic diagram of the time discriminator contains the first differential amplifier cascade on transistors and 2, transistors 3 and 4, which are part of the second differential cascade. Between the emitters of transistors 1 and 2 includes a capacitor 5, and between the emitters of transistors 3 and 4, scaling resistors 6 and 7. The collector outputs of transistors 1 and 4 are combined to form a current output 8 of the circuit, and the combined collector outputs of transistors 2 and 3 are a current output 9 The circuit inputs are tied to ground through resistors 10 and 11, between them a current source 12 of the signal is turned on. Resistors 13, 14, and 15 are designed to provide DC mode transistors.

The input pulse signal, forming a voltage difference between the base terminals of transistors 1 and 2, is transmitted to its emitter circuit, which leads to the appearance of capacitive current through capacitor 5, resulting in a current signal in the collector circuit of the above transistors, which is derived from the input signal. The presence of an input signal between the base terminals of the transistors 3 and 4 provides their collector current, which repeats the input signal in shape. The resulting signal at the outputs 8 and 9 is the difference in the collector currents of both differential signals.

Consider the timing diagram of the current signal (Fig. 3) in the collector circuits of one of the circuit outputs.

Curve 16 corresponds to the collector current of transistor 1 and, in the small signal mode, repeats the input signal in shape. Curve 17 corresponds to the collector current of transistor 4 and is conventionally shown in the opposite phase. The resulting signal - curve 18 is the sum of the collector currents of transistors 1 and 4. Similar in shape, but in the opposite phase, the current signal takes place at output 9. The characteristic point 19, corresponding to the zero-level intersection, does not change in its wide range of amplitudes of the input signal position By varying the capacitance of the capacitor 5 or the resistances of the resistors 6 and 7, it is possible to change the position of the characteristic point, which is reflected by curves 20 - a differentiated current pulse, and 21 - the resulting pulse. The shift of the characteristic point to the right corresponds to an increase in the time constant h C5 (R6 −f + R7). The specific position of the characteristic point is determined by the shape of the leading edge and the magnitude of Tqi. The approximate value of the scale factor can be written M, where Tf is the constant time of the pulse front. A significant increase in M may lead to a deterioration of the noise characteristics. The dynamic range of the circuit is quite large, since the operation of transistors 3 and 4 with a cut-off does not mean a deterioration of the accuracy characteristics, which does not affect the position of the characteristic point.

The scheme of a temporary discriminator (Fig. 3) contains a subtractive element 22,

a differentiating element 23 and a scaling element 24. The resultant pulse at the output of element 22 is obtained by subtracting from the main pulse, which passes the scaling element, a differentiated pulse from the output of element 22.

The implementation of the discriminator is fully integrated according to the scheme shown in FIG. I, is not difficult and at the same time allows

to create reliable and efficient sms of highly sensitive receiving devices operating under the conditions of greater interference in a wide dynamic range.

Claims (2)

Invention Formula A time discriminator containing an input source, scaling and subtracting elements, characterized in that, in order to broaden the dynamic range and increase noise immunity, a differentiating element is introduced into it, made in the form of the first differential stage on two transistors, the bases of which are connected to the source 5 input signals, emitters are connected via resistors to the power supply terminal and to the bases of transistors of a subtractive element made in the form of a second differential stage on two transistors, the emitters of which are connected to the terminals of the power supply through a clamping element and a resistor, and the collectors are cross-connected to transistor collectors the first differential stage and you. Sources of information taken into account in the examination 1. E. Meleshko. Integrated circuits in nanosecond nuclear electronics. Atomizdat, G977, p. 79. 2. USSR author's certificate No. 525238, cl. H 03 K 5/20, 1975. - pi t t entrance Vshakha