SU841058A1 - Device for storing and retrieval of information - Google Patents

Description

(54) DEVICE FOR STORAGE AND SAMPLE INFORMATION

one

The invention relates to computing and can be used in the design of analog-to-digital converters.

A sampling and storage device is known, comprising a buffer operational amplifier, an analog switch on a diode bridge, a storage capacitor, and an output buffer amplifier 1.

The drawback of the device is the high power consumption in the storage mode.

The closest in technical essence to the invention is a sampling and storage device containing a differential cascade on transistors, the combined emitters of which are connected to the collector of the third transistor, to the base of which a control signal is applied, and the emitter is connected to a negative power source, the collectors of the first and second transistors differential cascade are connected to the collectors of the fourth and fifth transistors, respectively, whose emitters are combined and connected to a positive source com power, combined base L are connected to the collector of the fourth transistor, the collector of the second differential stage transistor is connected to one of the two capacitor plates.

The drawback of the device is a low speed limited by the bandwidth of the operational amplifier with significant power consumption in the storage mode. For example, when using an operational amplifier with a bandwidth of 15 MHz, the sampling time of 1 ISS with a storage consumption of 200 mW.

The purpose of the invention is to increase the speed of the device and reduce its power consumption.

The goal is achieved by the fact that in a device for storing and retrieving information containing a cumulative element, for example, a capacitor, one of the plates of which is connected to a zero potential, the differential cascade performed on the first, second, third and fourth transistors, the base of the first transistor connected to the input signal, the collectors of the first and second transistors are connected respectively to the collectors of the third and fourth transistors, the emitters of which are connected to the positive terminal of the pit No, the collector of the first transistor is connected to the bases of the third and fourth transistors, the key performed on the fifth transistor, the collector of which is connected to the emitters of the first and second transistors, the base of the fifth transistor is connected to the control bus, and the emitter is connected to the negative power bus; podzar yes, performed on the sixth transistor, and the emitter follower, performed on the seventh transistor and the load element, for example, a resistor, one pin of which is connected to the zero potential bus, and the other output the output bus of the device, the emitter of the seventh transistor and the base of the second transistor, the base of the seventh transistor is connected to another capacitor plate, the collector of the seventh transistor is connected to the emitter of the sixth transistor, the base of which is connected to the collector of the first transistor, the collector of the sixth transistor is connected to the positive power supply bus.

The drawing shows the electrical circuit of the proposed device.

The device contains transistors 1-4, a component, a differential cascade, a transistor 5 on which a switch is made, a transistor 6 on which a charge element is made, a transistor 7 and a resistor 8 included in the emitter follower, a cumulative element, for example , capacitor 9, power bus 10 and 11, input and output bus 12 and 13, and control bus 14.

The sampling and storage device operates as follows.

At the initial time, the device is in sampling mode. In this case, the direct current in the transistor 5 is supplied by the control voltage, and the device operates as a normal differential amplifier with deep feedback.

To put the sample and hold device into storage mode, the control voltage is varied so that the current in transistor 5 becomes zero. In this case, the current through the differential stage does not pass and the charge or discharge of the capacitor 9 stops. An emitter repeater made on the transistor 7 and the resistor 8 supports the output voltage corresponding to the input voltage at the moment when the current flow in the transistor 5 stops.

In order to prevent the capacitor 9 from discharging due to the input current of the emitter follower performed on transistor 7 and resistor 8, transistor 6 is connected to the collector circuit of transistor 7, since the same current flows through transistor 6 as through transistor 7, then their base currents will be equal. The base current of transistor b causes a voltage drop across transistor 3, and since transistors 3 and 4 are consistent, this results in a current in the collector circuit of transistor 4 equal to the base current of transistor 6, and consequently, the base current of transistor a 7. Therefore, the discharge current of the capacitor 9 equal to the charge current and the voltage across the capacitor will not change. In the storage mode, only the load current flows through the device.

The application of the invention allows to increase the speed of the sampling and storage device 5 times and reduce energy consumption by 15-20 times.

Claims (2)

Invention Formula A device for storing and retrieving information containing an accumulative element, for example, a capacitor, one of the plates of which is connected to the zero bus potential, differential cascade made on the first, second, third and fourth transistors, the base of the first transistor is connected to the input signal bus, collectors of the first and second transistors r are connected, respectively, to the collectors of the third and fourth transistors, the emitters of which are connected to the positive power supply bar; the collector of the first transistor is connected to the bases of the third and fourth transistors, the key made The fifth transistor whose collector is connected to the emitters of the first and second transistors, the base of the fifth transistor is connected to the control bus, and the emitter is connected to the negative power bus, the collector of the second transistor is connected to another capacitor plate, in order to improve speed device and reduce power consumption, it introduced a charge element, made on the sixth transistor, and an emitter follower, made on the seventh transistor, one output of the load resistor Inen with a zero potential bus, and another output - with a device output bus, emitter of the seventh transistor and base of the second transistor, base of the seventh transistor is connected to another capacitor plate, collector of the seventh transistor is connected to the emitter of the sixth transistor, the base of which is connected to the collector of the first transistor, collector the sixth transistor is connected to the positive power line. Sources of information taken into account in the examination 1. Electronic Design, 1978, No. 23, p. 84-89. five 2. Instruments and elements of automation and computing. Express information, 1974, No. 28, abstract 143 (prototype). W n -r- r zb5 / 3 V Wewx f /. 77