SU834907A1 - Device for analysis of pulse trains - Google Patents

Description

one

The invention relates to a pulse technique and can be used in information transmission systems operating under variable intensity interference conditions.

A device for decoding pulse information is known, a register, an information extraction unit, a false premise unit, two frequency-voltage converters, an attenuator, and a reading unit l.

The disadvantage of the device is the low noise immunity of receiving messages, since the threshold value is set regardless of the fact that the signal received is a priori and effective.

The closest in technical essence of the present invention is an automatic threshold adjustment device comprising a threshold unit, a signal selector, a noise selector, a reversible counter, and a voltage conversion unit 2.

A disadvantage of the known device is low noise immunity, due to the fact that when setting the threshold, a priori information about the statistics of transmitted signals is not used.

The purpose of the invention is to improve noise immunity.

The delivered target is achieved in that the device for analyzing pulse sequences, which contains a threshold unit, a signal selector, a noise selector, a reversible counter and a transforming unit whose output is connected to the input of the threshold unit, is inputted from the pulse number collector, extension unit, control unit , the shift register and the reversible counter, the bit outputs of which are connected to the bit inputs of the reversible counter, and the output of the threshold unit is connected to the input of the shift register, the first group of outputs of which on the inputs of the noise selector, and the second group of outputs is connected to the inputs of the signal selector and the selector of the number of useful pulses, the output of which is connected to the first input of the main reversible counter and to the first input

5 additional reversible counter, while the output of the noise selector is connected via a divider to the second input of the main reversing counter and to the second input of the additional reversible counter, and the output of the signal selector is connected to the gate input of the noise selector, which gates the selector of the number of useful pulses and the first input of the control unit, the second input of which is connected to the output of the main reversible counter; Moreover, the first output of the control unit is connected to the third input of the main reversing account ika, vtorsey vyhrd control unit is connected. with the input of an additional reverse switch, and the third and fourth outputs of the control unit are connected to the first and second inputs of the conversion unit. The drawing shows a block diagram of the proposed device

The device for analyzing pulse sequences contains a threshold block 1, a shift register 2, a noise selector 3, a signal selector 4, a selector 5 of the number of useful pulses, a divider b, a reversible counter 7, an additional reversible counter 8-, a block 9, a control that converts the block 10. The threshold unit 1 is a sequentially connected matched filter and a normalizer. At the output of threshold block 1, a signal appears normalized in amplitude and duration if, at the time of the decision, the voltage at the output of the matched filter exceeds the threshold voltage that is formed by blocks 10-. The matched filter depending on the functional purpose of the pulse sequence analysis device can be either a matched filter configured to receive a single pulse, or a matched filter configured to receive a series of a certain number of pulses, if the device is used in an information transmission system with cascade encoding and decoding principle. The noise selector 3 is a shift register with the number of bits, where L is the number of bits of the shift register 2, an is the number of elements of the message. The inputs of the noise selector 3 shift 3 are connected to those outputs of the shift register 2 that do not correspond to the time positions m pulse signal. The signal selector 4 is a major element, with which a series of pulses is recorded, recorded in shift register 2. The inputs of the signal selector 4 are connected to the outputs of the shift register 2, corresponding to the time positions of the received series. Obviously, the combination of the shift register 2 and the signal selector 4 is; a ciscrete matched filter. Decoding is performed if pulses are received at the input of the majority element, the number of which is not less than the predetermined value of K, called the decoding threshold. occur only at fixed, previously known points in time; in the case of asynchronous transmission, decoding can occur at arbitrary points in time when the threshold is exceeded. The selector 5 of the number of useful pulses is a shift register with the number of bits equal to that of the message elements. The inputs of the shift register of the selector 5 of the number of useful pulses are connected to the outputs of the shift register 2, corresponding to the time positions of the pulse of the received series. Divider 6 is a frequency divider with a specified division factor. Control unit 9 is a counter up to N and a logic circuit, which generates signals, changes in the threshold level.

BLOCK 10 is a digital-to-analog converter with a reversible counter. The number of bits of the counter is defined as logj M, where M is the number of sampling intervals of the threshold level. When a signal arrives at the first input of block 10, the threshold value increases by one discrete, and when the signal arrives at the second input, the threshold value decreases also by one discrete.

A device for analyzing pulse sequences works as follows.

Obtaining estimates based on the results of estimating the probability of correct reception of a message element and the probability of a false alarm is carried out by changing the threshold level one discrete in the direction to the optimal value according to a pre-selected criterion. The operation of the device can be represented as consisting of sweeping cycles. Each cycle ends with the reception of N messages and a change in the threshold by one sample to one side or the other.

After the end of the previous cycle, the contents of the additional reverse are recorded in the reversible counter 7. counter 8 with the opposite sign and the last zeroed. The control unit 9 memorizes the direction in which the threshold is changed in the foregoing cycle.

The signal, which is a mixture of useful pulses and interference, enters the input of the threshold unit, which receives the message elements. Received pulses appear at the output of threshold block 1 and are written to shift register 2. At the moment of reception of the pulse sequence detected by the signal selector 4, the noise selector 3 and the selector 5 of the number of useful pulses receive a strobe signal, which at the output of the noise selector 3 appears successively in time, the pulses whose number is equal to the number of turns of pulses , recorded in the shift register 2, and at the output of the selector 5 of the number of useful pulses impulses appear, the number of which is equal to the number n of received useful pulses (message element). Pulses from the output of the selector 5, the number of useful pulses arrive at the first (summing) inputs of the reversible counter 7 and additional | LNITALNOGO reversible counter Kai 8. Impulses from the output of the selector 3 through the divider 6 with the division factor Cd arrive at the second (subtraction) inputs of the reverse counter 7 and an additional reversible counter 8. The counter of control block 9 counts the number of received messages. After receiving N messages, the difference dp is recorded in the counter counter 7, and the value of the additional reversing counter 8 is recorded (n, -Cd PD). Depending on the sign of the difference-dp, the trigger sign of the reversible counter 7 will be in the state 1 or 0. The voltage of a logical zero or one from the trigger of the sign of the reversible counter 7. is fed to the second input of the control unit 9. After receiving N messages, the counter of the control unit 9 is zeroed and the pulse from the output of the control unit 9, depending on the state of the trigger of the sign of the reversible counter 7, goes to the first or second. input of block 10, i.e. to the summing or subtracting input of the reversing counter of block 10, thereby providing an increase or decrease in the threshold by one digit. With a small delay, the pulse arrives at the gate for the input of the reversible counter 7, thus providing the rewriting of information into this counter from the additional reversible counter 8 with the opposite sign, and then carried out; 1tsc reset additional reversible counter 8. Next begins a new cycle of the device. After a series of cycles, the device provides the optimal threshold value. If the level of interference changes, then the search for the optimal (with a new level of interference) threshold is carried out exactly as described.

The proposed device allows you to simply use a priori

Claims (2)

1. Authorship certificate of the USSR No. 39052, cl. H 03 K 13/32 1971. 0 2. Automatic threshold adjustment device. - Radio engineering and electronics, 1965, No. 2, p. 233.