SU809674A1 - Redundancy device - Google Patents

Description

(54) RESERVED DEVICE

one

The invention relates to automation and impulse technology and can be used in complex redundant systems.

A device is known comprising three reservation channels consisting of a redundant block, an installation node, a trigger, AND elements and a major element ij.

A disadvantage of the known device is the presence of a majority element in each reservation channel.

Closest to the present invention is a device containing redundant blocks connected in pairs through key elements to AND elements and inequality elements, the first inputs of which are connected to the output of the OR element, the second inputs to the outputs of the corresponding key elements, and the outputs The source of the discharging signal is connected to the corresponding inputs of the key elements, and the AND elements are connected to the OR element via other key elements p.

A disadvantage of this device is low noise immunity, since the redundant block is turned off from the redundancy circuit in case of any random failure, the intensity of which is a factor higher than the intensity of the patterns.

The purpose of the invention is to increase the noise immunity of the device.

The goal is achieved by the fact that in a device containing an OR element, a reference voltage block, three

0 reservation channels, each of which contains a trigger, a reserved block, AND elements and unequalities, the first inputs of which are connected to the outputs of the corresponding reusable blocks, the first three inputs of the OR element are connected to the outputs of the AND elements, and the output is the output of the device, the fourth and the fifth element And, (majority element

0 and in each reservation channel there is a functional chain of successively connected blocks of the current average value, comparison, of the additional element And and the delay line,

5 included between the output of the inequality element and the trigger input, the second inputs of the comparison blocks and additional elements AND of all functional circuits are connected respectively with the output of the reference block

Claims (2)

voltage and with the output of the fourth and the first input of the fifth element AND, the output of the last of which is connected to the fourth input of the OR element, and the second input - to the second inputs of all inequality elements and the output of the majority element whose inputs are connected to the outputs of the reserved blocks, the triggers zero outputs are connected to the inputs of the fourth And element, and the single output JQ of each trigger of one of the reservation channels is connected to the second input of one of the First Three And elements from the other reservation channel. In FIG. 1 is a diagram of the device in FIG. 2 - time diagrams of his work. The device contains redundant blocks 1-3, majority element 4, elements AND 5-7, triggers 8-10, elements 11-13 of unequalities, blocks 14-16 of the current average value, blocks 17-19 comparisons, additional elements AND 20 22 functional circuits, delay lines 23-25, additional element AND 26, element OR 27, another additional element AND 28, unit 29 of the reference voltage. Redundant device operates as follows. In the initial period of time, while all three reserved blocks 1-3 operate reliably (however, with occasional random failures), triggers 8-10 are in the initial zero state and therefore elements AND 20-22 and 28 are open. nii. The signals from blocks 1–3 (Fig. / 2 a, b, c), processed by the majority element 4 (Fig. 2m), uninterruptedly pass the elements of AND 28 (Fig. 2 n) and OR 27. (Fig. 2 n) and arrive at the output device. In this case, the majority element 4 effectively excludes single uncorrelated failures of functional blocks (Fig. 2, time instant t2 and Fig. 2 b - time instant ± .j), Elements 12 and 13 inequalities (Fig. 2 d, e) c moments due to failures give pulses to the output, however, these rare pulses are not sufficient for the blocks 15 and 16 of the current average value (fig. 2, 3, and) to accumulate a potential greater than the potential UQ of the unit 29 of the reference voltage. Therefore, the comparison blocks 18 and 19 do not work, and the device continues to function normally. However, at some point in time (Fig. 2a, starting from the time t), as a result of the sudden silt of the parametric failure of block 1, the error rate sharply increases (Fig. 2g ), and the potential at the output of the current average value block 14 gradually increases (Fig. 2 g), this potential exceeds the constant level UQ coming from the block 29, as a result of which the comparison block 17 is triggered (Fig. 2 k). exit block 17 compare pass AND gate 20 is delayed by the delay line 23 and approximately in the middle of the interval between data pulses Dtrigger 8 translates in a single state (FIG. 2 L). After that, the elements of AND 20-22 are closed, i.e., the state of the riggers 8-10 in the future cannot change anymore, and the AND 28 element also closes, i.e., stop the information signals coming to the device output from the majority element 4. At the same time, the trigger 8 opens the element And 6, and the information signals from the known-good unit 2 arrive through the elements AND 6 (FIG. 2 c) and OR 27 to the output of the device. Similarly, the proposed device is rebuilt with the complete failure of any other redundant block. In a known device, any redundant functional unit fails at the output of the device, and in the proposed device the failure at the output of the device fails if only two or three redundant blocks fail simultaneously, and the probability of a simultaneous uncorrelated failure is of order q (where q is failure of one reserved block). In addition, in a known device, the failure of a redundant block is taken as a failure of this block and results in the shutdown of this block from a redundant device. .After shutting down one redundant unit, the probability of a failure of the proposed device becomes equal to q, while in a known unit after turning off one The block continues to operate in parallel two redundant blocks and this increases the failure rate of the whole device. Thus, the proposed device in comparison with the known one is distinguished by increased reliability and noise immunity. Claims of the invention A redundant device containing an OR element, a reference voltage block, three reservation channels, each of which contains a trigger, a reservation block, AND elements and inequalities, the first inputs of which are connected to the outputs of the corresponding redundant blocks. the first three inputs of the OR element are connected to the outputs of the AND elements, and the output is the output of the device, about one liter. In order to improve the noise immunity, the fourth and fifth elements, the major element, and the functional channel of the reservation, a functional chain of serially connected blocks of the current average value, comparison, additional element And delay line, are included. between the output of the unequal element and the input of the flip-flops, the second inputs of the comparison block and the additional elements AND of all the functional circuits are connected respectively to the output of the reference voltage block and to the output of the fourth and the first input of the fifth element And, the output of the last of kt6 nineteen the second input is connected to the second inputs of all inequality elements and the output of the majority element, the inputs of which are connected to the outputs of the reserved blocks, the zero outputs of the triggers are connected to the inputs of the fourth AND element, and the unit output of each trigger is single from the reservation channels, connect the second input to one of the first three AND elements from the other reservation channel. Sources of information taken into account during the examination 5 1. USSR author's certificate 427480, cl, H 05 K 10/00, 1972. 2. USSR author's certificate 413484, .kl. H 05 K 10/00, H 03 to 19/42, 1971. and but I I Mil I I and I II111 I it i I 11 I I I M I I 1 and I I IN l i Mil II I 1 / 7 ,,, 11 i