SU807287A1 - Microprogramme-control device - Google Patents

Description

(54) DEVICE FOR MICROPROGRAM CONTROL

one

The invention relates to automation and computer technology and can be used as a control device of various purposes, in particular, in control devices with the paged organization of permanent storage devices.

A firmware control device is known that uses a persistent storage device with a page organization, in which there are commands to transfer control within the page and commands for inter-page transfer control 1

However, this device is characterized by a significant amount of equipment.

The closest in technical essence to the present invention is a microprogramming device for controlling, comprising the first and second permanent memory blocks, a general counter, a paging register, a buffer register, a microinstruction generation unit, AND elements, triggers, an input / output unit, a switching unit. the field, where the main entries of the page register and the setting inputs of the address counter are address inputs of the device.

the outputs of the lower bits of the page register are connected to the address inputs of the pages of the first and second blocks of the fixed memory, the outputs of the address counter are connected to the address inputs of the first and second blocks of the fixed memory, the inputs of the buffer register are connected to the outputs of the page register, and the outputs with the address inputs of the address counter 2.

A disadvantage of the known device is a significant consumption of equipment with an increase in block volume.

5 permanent memory.

The purpose of the invention is to reduce the volume of equipment with an increase in the number of blocks of a constant patch.

The goal is achieved by the fact that in the device the counting input of the trigger switch is connected to the output of the micro-operation unit, the input is connected to the high-level output of the buffer register, and the output is connected to the high-level installation input of the page register, the high-level output of the page register is connected with the inputs of the pages of the first

and second blocks of permanent memory.

The drawing shows a block diagram of a firmware control device.

The device contains blocks 1 and 2 of permanent memory, an address counter 3, a register of 4 pages, a buffer register 5, a microinstruction generation unit 6, a switching trigger 7.

The device works as follows.

The counter 3 of the address determines the intracrystalline address of the command, the register: the 4 pages register determines the number of the selected page of the fixed memory block, the highest bit of the eigrate of the page determines the specific block 1 or 2 of the permanent memory. When executing conditional and unconditional control transfer commands within a single page of a block of permanent memory, the code determining the transition address is sent to the address count 3.

When executing commands of interstitial transfer of control within one block 1 or 2-station memory, the page number code from register 4. enters the buffer register 5, the number code, the transition page enters the counter .3 of the address. When transferring control from one block of permanent memory to another on the command ROM switching (PP), preceding the Transition with Return (PT) command, from block b, the counting input of trigger 7 receives a signal that changes its state. The format of the PP command is one word. When the follow-on command is executed in accordance with the sequence of control signals, the page number code from register 4 enters buffer register 5, the contents of counter 3 of the address are stored in temporary memory for temporary storage, the transition page number iodine and the internal page address of transition go to register 4 and 3, the address counter, and the state of the trigger 7 is transmitted to the high order register of the pages.

The return to the main program of the execution of the subroutine occurs on the command Return (BB), in which the code number of the transition page from the buffer register 5 enters the register of 4 pages, the high code of the buffer register 5 enters the installation input of the trigger trigger, from the output of which 4-page senior register. Internal address of the transition enters the counter 3 addresses.

If in order to execute a subroutine, a transfer to another block of permanent memory is required and then the main program must be continued in the same block of permanent memory, then, instead of the BB command, a PT command must be executed without a preceding PP command.

Thus, an increase in the number of fixed memory blocks does not lead to an increase in the amount of equipment.

Claims (2)

1. US Patent No. 3693162, cl. 340-172.5, published. 1970. 2. Authors certificate of the USSR 486581, cl. G 06 F 15/02, 1975 prototype). i one l l I four 7 7