SU792457A1 - Voltage relay - Google Patents

Description

one

The invention relates to protection and automation devices and can be used to control the supply voltages of important consumers when they are powered by two in-phase, three-phase AC sources, the main and the backup.

A device is known in which an alternating voltage is rectified and converted into a pulse voltage, the duty cycle of which is proportional to the amplitude of the input signal IJ.

Its disadvantage is the low speed performance due to the inertia of the conversion processes.

The closest to the invention in terms of technical means and achievable results is the C2J device, in which each voltage of the main source is measured by comparing the duration of exceeding the instantaneous value of a certain level, during each half-period of oscillation, with the duration of the reference pulse, and the reference pulse is formed using the time relay, whose start is synchronized with the moment of the controlled voltage transition through zero value, and the time relay pulse is delayed relative to yes angular momentum at an angle

ifsarcsinr- a-, (1)

with.

where Up is the level of voltage control;

HMHfi is the amplitude of the minimum allowable voltage of the main IQ source.

The drawback of the device is the complexity and lack of reliability due to the presence of a time relay in the device, which is the source of additional error. The aim of the invention is to increase the reliability and speed of the device.

The goal is achieved by the fact that the voltage relay containing a full-wave rectifier to the input of which a controlled voltage is supplied, and the output are connected to the inputs of two threshold blocks, the outputs of which are connected to the inputs of the first and second logical elements I, equipped with four null organs, four logical elements AND, four logical 30 elements NOT and three logical

the OR elements, and the inputs of the zero-organs are supplied to the voltage of the backup power source, and the outputs of the first and second zero-organs are connected to the inputs of the third And element, the output of which is connected to the input of the first And element, the second of which is connected to the output of the fourth And element whose inputs through the elements are NOT connected to the outputs of the first and second null organs, the output of the said element OR is connected to the second input of the first element AND, and the outputs of the third and fourth null organs are connected to the inputs of the fifth element AND, turn is connected to the input of a second OR gate, the second input of which is connected to the output of the AND zkestkogo having inputs through the elements not connected to the outputs of the third and fourth zero-bodies; the output of the second element OR is connected to the second input of the second element AND, and the outputs of the first and second elements AND are connected to the inputs of the third element OR,

Fig. 1 shows a block diagram of a voltage relay; Fig. 2 is a diagram of voltages acting at the inputs / outputs of functional units.

The device contains zero-bodies 1-4J logical elements AND 5-10, logical elements HH 11-14j logical elements OR 15-17, full-wave rectifier 18, threshold blocks IS and 0,

The device works as follows.

The inputs of the zero-organs 1 and 2 transmit the linear voltages of the backup power source, respectively, UflBPwH Uecw e and the inputs of the zero-, organs 3 and 4 are supplied with phase voltages .r ;, and at the outputs of the zero-organs form pulses of duration T / 2. Synchronous with positive. half cycles of input voltages. From the outputs of the zero-organs 1 and 2, the signals arrive at the two inputs of the logical element 5, the outputs of which generate pulses of duration t / b, delayed by the time t / 6 relative to the moment of transition through the zero value of the monitored linear voltage and the main power source its positive half period. Similarly, at the output of the logic element And 8, pulses of a duration delayed by time T / 3 are generated, which are held by time T / 12 relative to the transition UACOW through zero. From the output of the null organs 1–4, the signals also arrive at the inputs of the logical elements NO 11–14, the outputs of which form pulses of duration

t / 2, synchronous with negative half-periods of the voltages arriving at the inputs of the zero-bodies 1-4, from the outputs of the elements NOT 11.12, signals arrive at the inputs of the logical element 6, at the output of which pulses of duration T / b are generated, delayed by time T (b) with respect to the transition and /, zero value during the action of its negative half-period, and similarly, at the output of element 9, pulses of duration T / 3 are formed, delayed by time T / 12 relative to the transition V / seiSiV through zero. The pulses generated in each half-period are combined with the aid of logic elements OR 15 and 16, the output signals of which are fed to the inputs of logic elements AND, respectively 7 and 10. The controlled linear voltage of the main power source is rectified using a full-wave rectifier 18 and enters the inputs of threshold blocks 19 and 20, whose settings are selected in accordance with expression (1), its threshold for threshold block 19, and, is calculated for angle V, and angle threshold 30 is taken for threshold block 20. At the outputs of threshold blocks 19 and 20, level pulses are generated, the duration of which t is determined by the time that the instantaneous value of the monitored voltage exceeds the set voltage. The output signals of the threshold blocks 19 and 20 are fed to the second inputs of logic gates And, respectively, 7 and 10, the output signals of which are combined with the help of the logic element OR 17. The relay trips if G - the output pulse level of the block 19 becomes less than T / 6 or 2 is less than T / 3, which corresponds to a decrease in the amplitude of the monitored voltage V below the permissible level V2 ,, ;, t, that is, in case of coincidence of signals with high potential acting on the outputs of the elements, respectively, 15.19 or 16, 20, while at the output of the element OR 17 in wits signal.

The device has high fastness, low response and low error, its advantage is the absence of timing elements.

Forglula Invention

A voltage relay containing a full-wave rectifier, to the input of which a controlled voltage is applied, and the output are connected to the inputs of two threshold units, the outputs of which are connected to the inputs of the first and second logic elements And, differently. that, in order to improve reliability and speed, it is equipped with four zero-bodies, four AND logic gates, four NOT logic gates and three OR gates, and the inputs of the zero-gates are supplied with a backup power supply voltage and -organs are connected to the inputs of the third element And, the output of which is connected to the input of the first element OR, the second input of which is connected to the output of the fourth element And, whose inputs through the elements are NOT connected to the outputs of the first and volts cerned zero-body output of said OR gate connected to the second input

i /,

U & cPi

l / APli

G,

the first element is And, and the outputs of the third and fourth null-bodies are connected to the inputs of the fifth element And, the output of which is connected to the input of the second element OR, the second input of which is connected to the output of the sixth element And whose inputs through the elements are NOT connected to the outputs of the third and fourth zero-bodies, the output of the second element OR is connected to the second input of the second element AND, and the outputs of the first and second elements AND are connected to the inputs of the third element OR.

Information sources,

5 taken into account in the examination

1, US Patent 3,852,731 NCI 340-248B, 1974.

2. Author's certificate of the USSR 536556, H 02 K 3/20, 1976.

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Claims (1)

Claim A voltage relay containing a half-wave rectifier, the input of which is supplied with a controlled voltage, and the inputs of two threshold blocks are connected to the output, the outputs of which are connected to the inputs of the first and second logic elements, And, characterized in that ·? that, in order to increase reliability and speed, it is equipped with four zero-organs, four logical elements AND, four 'logical elements NOT and three logical elements OR, moreover, the voltage of the backup power source is applied to the inputs of the zero-organs, and the outputs of the first and second zero - the organs are connected to the inputs of the third AND element, the output of which is connected to the input of the first element 'OR, the second input of which is connected to the output of the fourth AND element, whose inputs through the elements are NOT connected to the outputs of the first and the second zero-organ, the output of the said OR element is connected to the second input of the first AND element, and the outputs of the third and fourth zero-organs are connected to the inputs of the fifth AND element, the output of which is connected to the input of the second OR element, the second input of which is connected to the output of the sixth AND element whose inputs through the elements are NOT connected to the outputs of the third and fourth zero-organs, the output of the second OR element is connected to the second input of the second AND element, and the outputs of the first and second elements AND are connected to the inputs of the third IL element AND.