SU781817A1 - Digital computer of sine and cosine functions - Google Patents

Description

(54) DIGITAL CALCULATOR OF SINUS AND COSINUS FUNCTIONS

The invention relates to automation for computing and can be used in digital radial-circular scanners, digital automatic control devices and graphic information display devices. A device is known for calculating the sine and cosine function, in which these dependencies are obtained from a parallel argument code using a harmonic generator with shock excitation and using digital-analogue technology. The accuracy of generating these dependencies is related to the accuracy of the analog nodes used in device 1. The closest in technical essence to the present invention is a digital calculator of sine and cosine functions containing two counters, three adders, an OR element, two registers and two groups of AND elements, the first input of the first counter of the second connection, the first inputs of the first and the second adders and the first input of the OR element, the second input of which is connected to the first output of the first counter AND the second input of the second counter, the output of the OR element is connected to the first inputs of the first and second registers, the first the second output of the second counter is connected to the first input of the first adder, the second output of the second counter is connected to the second input of the first sum of the torus and the second input of the first register, the third output of the second counter is connected to the second input of the second register, the outputs of the first register are connected to the first input , and the outputs of the second register are connected to the first inputs of elements AND of the second group, the outputs of elements AND of the first group through the second adder are connected to the third input of the second register, and the outputs of elements AND Torah group via a third adder connected to a third input of the first Regis: F 2J. The known device has a low speed. The purpose of the invention is to increase speed. The delivered tsega is achieved by the fact that two additional OR inputs and a delay element are entered into the device, and the output of the first counter is connected to the corresponding inputs of the first additional OR element, the output of which is connected to the first input of the second additional OR element through the delay element, the second input of which is connected to the second input of the first counter, and the output - with the second output of the AND elements of the first and second groups. The drawing shows a schematic of a digital computer. The calculator contains two counters 1 and 2, the element OR 3, the first, the adder 4, the delay element 5, two additional elements OR 6 and 7, two registers 8 and 9, the first group of elements AND 10, the second rpjmny elements AND Pi the second and third adders 12 and 13. The calculator of the sine and cosine function works in the following way. . The device receives impulses of the increments of the argument oL and the control pulse of the argument oCfj. According to these signals, the calculator generates a 12-digit cC code and 11-digit codes dihct and, for which the 11th bits are sign. The increment pulses of the argument are counted by counters 1 and 2, in which the code is generated. Counter 2 bits have weights 2 and ZG and contain information about the and signs. Therefore, the direct output of the high bit of counter 2 is the output from the calculator of the sign bit code a d d. and the direct outputs of both bits of counter 2 are fed to the inputs of adder 4, which generates the sign bit of the COS d-code and outputs it to the output of the calculator. The codes for the numbers / SmdL / and / cosol / in the calculator are based on known theoretical conditions (.osxdx, cosx -JsmxdLx) This calculation in the device is performed on two digital integrators with parallel transfer of the number from the integrand register. The first integrator is formed by register 8 , the first group of elements And 10 and the adder 12, and the second - the register 9, the second group of elements And And and the adder 13.; The calculation of the codes d / and / fcOSd / leads from sequentially through quadrants, at the beginning of each of which is set the initial conditions Registers Register 8 and 9 .. Correction rabotty calculator and setting initial conditions in the first quadrant is osusches by the control pulse which sets the angle dLg counters 1 and 2 in the null state, and the adder 13 - and through a single OR gate 3 carries registers 8

781817 and 9 V zero state. Since the signals at the control inputs of registers 8 and 9 onpef are shared with the direct and inverse values of the first bit of counter 2, then zero is removed from the outputs of register 8 and register 9 is one. , This corresponds to the initial conditions in the first quadrant of the angle, SmAo 0 COS d-Q 1 The initial conditions in the second, third and fourth quadrants of the angle are determined by the overflow pulse of the counter I, which through the element OR 3 sets the registers 8 and 9 to the zero state. The initial conditions in the second, third, and fourth quadrants of the angle correspond to the conditions. „,; . quadrant second: oL-, coscLOi third: оС - PG, S-in dl O, / coso (J - (, fourth: di 5-ir, / eiiic cf - 1, cosd O. Integration is carried out by argument d At the input of digital integrators (the second inputs of all circuits are And) a sequence of pulses with the weight of each pulse 2. rad. The number of pulses in this sequence per quadrant of the angle is. (l ° -t) c-i607. This is the number of pulses N It is produced by elements 5,6 and 7 by summing the input pulses of the argument coming from the input of the calculator to the second input of the element OR 7, from the input to its first input from the pulse correction sequence delay element 5. The pulse correction sequence is produced by the OR element 6, which sums up three different pulse sequences produced by counter 1. Pulse sequences produced by the counter 1 on the argument pulses coming to the counter input from the calculator , are the counting pulses of the installation in the units of the triggers of the first, fourth and seventh bits. Therefore, after each resetting of the counter 1 and the arrival of the calculator 1023 pulses of the argument at the output of the element 7, a sequence of pulses is generated, the number of pulses in which is equal to УУ- 1023 + 512 +64 + 8 to 1607 The error of this representation of the frag .at sequence of pulses at the output of the element 7 does not exceed ± 2 rad. The pulses from the output of element 7 are fed to the addition control. For each of these pulses

It polls the elements of the first and second groups 10 and 11, during which the contents of register 8 are transferred to the adder

12, and the contents of register 9 into cosine adder 13. In this case, the adder 12 and the adder

13 memorize the summation residues and produce, respectively, the increment of the cosine and the increment of the sine. The increment of the sine from the output of the adder 13 is fed to the summing input of register 8, and the increment of the cosine from the output of the adder 12 to the summing input of register 9. The increment of the functions to the summing inputs of registers 8 and 9 is received in the form of the presence or absence of a pulse.

with a weight of 2, the contents of these registers change only after the moment of termination of the pulses at their summing inputs. The outputs of the register 8 is generated 10-bit code I Siv SI, and the outputs of the register 9 10-bit code ICcSSii.

From the description of the operation of the calculator, it follows that when an impulse of argument arrives at its input, each integration cycle contains one or two equal summation cycles.

Therefore, the integration cycle lasts or ()

S

Hb - the duration of the input pulse argde oLI

GU ment;

t. - the duration of the delay element 5

delays.

The technical and economic efficiency of the present invention is that the calculator of sine and cosine functions has a simple structure, does not contain clocking nodes or control blocks, and can calculate the function and the sine and cosine of the argument, which changes with high speed.

Claims (2)

1. Author's certificate of the USSR N 400019, cl. H 03 K 13/02, 1973. 2. USSR author's certificate number 419896, cl. G 06 F 15/34, 1973. 5in 1 ". Lz en So $ l. . ..... and ... .M " P Coy 0 Kodlco oil