SU780159A1

SU780159A1 - Dc amplifier

Info

Publication number: SU780159A1
Application number: SU762421990A
Authority: SU
Inventors: Владимир Ильич Клягин
Original assignee: Предприятие П/Я Р-6133
Priority date: 1976-11-22
Filing date: 1976-11-22
Publication date: 1980-11-15

Description

(54) УСИЛИТЕЛЬ ПОСТОЯННОГО ТОКА(54) DC POWER AMPLIFIER

1one

Изобретение относитс к измерительной технике и может использоватьс в корректирующих устройствах систем автоматического управлени и регулировани . -.The invention relates to measurement technology and can be used in correction devices of automatic control and regulation systems. -.

Известен усилитель посто нного тока , содержащий первый и второй инвертирующие каскады, выходы каждого из которых соответственно, через первый и второй- переключатели соединены с нагрузкой, .а также входной ре.зистор , первый вывод которого соединён с иcтo iникoм сигнала ..A DC amplifier containing the first and second inverting stages is known, the outputs of each of which, respectively, are connected to the load through the first and second switches, as well as an input resistor, the first terminal of which is connected to its source signal.

Однако известный усилитель имеет недостаточно большую ширину полосы пропускани .However, a known amplifier has an insufficiently large bandwidth.

Целью изобретени вл етс расширение полосы пропускани .The aim of the invention is to increase bandwidth.

Дл этого в усилитель посто нного тока,. содержгиций первый и второй инвертирующие каскс1ды, выходы каждого из которых соответственно через первый и второй переключатели соединены с нагрузкой, а также входной резистор , первый -вывод которого соединен с источником сигнала, введены два ключа, включенные между вторым выводом входного резистора и входами соответственно первого и второго инвертирующего каскадов, а также четыреFor this, a DC amplifier ,. the contents of the first and second inverting kaks1dy, the outputs of each of which are connected to the load through the first and second switches respectively, as well as the input resistor, the first output of which is connected to the signal source, introduced two keys connected between the second output of the input resistor and the inputs of the first and second inverting cascades, as well as four

дополнительных рез-истора, причём первый дополнительный резистор вк.шочен между входом и выходом первого инвёртй15уйщегоК1скада:7 второй-- мевду входом и выходом второго инвертирующего каскада, третий - между входом первого инвертиру ощёго каскада и вторыитгерё ЙЙ9чателем7 а четвертый - между входом второго инвертирующего . additional resistors, and the first additional resistor is inserted between the input and output of the first inverting QC: 7 second - the input and output of the second inverting cascade, the third between the input of the first inverter of the clamping cascade and the second generator between the second inverter.

10 каскада и первым переключателем.10 cascade and the first switch.

На чертеже изображена структурна электрическа схема предложенного усилител посто нного тока.The drawing shows a structural electrical circuit of the proposed DC amplifier.

Усилитель посто нного тока содержит первый и второй инвертирующие каскады 1 и 2, первый и второй переключатели 3 и 4,нагрузку 5, входной резистор 6, источник сигнала 7,.первый и втСрой ключи В к 9, дополни20 тельные резисторы 10-13.The DC amplifier contains the first and second inverting stages 1 and 2, the first and second switches 3 and 4, the load 5, the input resistor 6, the signal source 7, the first and the second B keys to 9, the additional resistors 10–13.

Усилитель посто нного тока работает следующим образом.The DC amplifier operates as follows.

При начальном положении (позици а) первого и Второго переключателей 3-4 и первого и второго ключей 8, 9 на выходе усилител напр жение равноIn the initial position (position a) of the first and second switches 3-4 and the first and second keys 8, 9 at the output of the voltage amplifier is

К.,ис4-и „, -Knc,-UcT2 « „ „, При следующем положении (позиций б ) K., is4-and ", -Knc, -UcT2" "", Under the following position (positions b)

Claims

30 of the first and second switches 3, 4 and the first and second keys 8, 9, the output voltage of the amplifier is; ftbnil-il c.- -Ucri-Kncfl-UcMo - gain coefficient of amplifier M .aiL Кь Rb - voltage of signal, cm, zero offset of the first and second in;, V.. spinning cascades 1. and 2 respectively with::. connected source: signal to their outputs; - transfer ratios. cross-connect through additional resistors 12, 13 RIO. ./ - .1 ПС, .R, 4 offset of the zero level, fMl of the second and second inverting cascades. 1 and 2, respectively, when the input is grounded, when the first and second switches 3, 4 and the first and second keys are operated 8/9 with the fg operating frequency. In the amplifier code, the voltage is O i.tii; f; ;; , BW) (S. t, and, and t is the duration of a different time. The first and second switches 3,4 and the first and second keys 8, 9 are in the initial and subsequent positions, respectively. If the conditions are met: a) D YSL 0.5To .g, tu + t de ty. - switching time; - adjustment time of the first,. and the second .inverting, cad 1 and 2, V l: c) R6 RHR10 R1 R13 R .R IV then we get. , with (nl) 5- l C fUcMfV (, where, 2,3, ... Thus, the output signal of the amplifier has) 1 of a frequency component, proportional to the input signal, and a high frequency (pulse) component of the zero level with a period T, Squalitude S 0.5 and amplitude А i (JcMub this average offset value of the device’s zero level is zero. The proposed DC amplifier does not have capacitive elements, all its elements can be implemented using an integrated technology, which allows mass production of the device as well as desires Correction circuit parameters, zero-level offset compensation accuracy, and bandwidth widens. Claims A DC amplifier containing first and second inverting stages, each of which outputs are respectively connected to the load, and also the input resistor, the first pin of which is connected to the signal source, which is characterized by the fact that, in order to expand the bandwidth, two keys are inserted in it, which are included between the second output of the input slot torus and inputs, respectively, of the first and second inverting stages, as well as four additional resistors, with the first additional resistor connected between the input and output of the first inverting cascade, / the second between the input and output of the second inverting cascade, the third - between the inputs of the first inverting gsascade and the second switch, and the fourth between the input of the second inverting stage and the first switch. Sources of information taken into account in the examination 1. B. Anisimov. etc. Analog computing machines. M., Higher School 1971, p. 224, fig. Iv. 35 (prototype).