SU762169A1 - Time internal to code converter - Google Patents

Description

The invention relates to automation, and computer technology and can serve for the accurate measurement of time intervals in cyclic angle-code converters.

A known converter of time ⁵ intervals into a code containing a clock generator, counter, keys and register ζΐ].

However, it does not allow to simultaneously measure time intervals between ¹⁰ consecutive next pulses of 'start-start * and start-stop'.

The closest in technical essence to the proposed one is a pre- _{) 5} processor containing a clock pulse generator connected to the inputs of the start and stop pulse shapers and to the first input of the And element, the second input of which is connected to the control trigger output _I , and the output to the counter, the outputs of the counter are connected to the information inputs of the register, the synchronizing input of which is connected to the output of the pulse shaper 'stop' £ 23.

This transducer does not allow to convert into the code the intervals of lies, between the pulses' start * - 'start * and' start * - 'stop', following continuously, and does not provide the necessary accuracy when measuring the boundary values of the measured parameter, close to its minimum and maximum values, since in these cases it is possible to receive one pulse 'start * two pulses' stop *.

The chain of the invention is the expansion of functionality due to the simultaneous conversion of time intervals between pulses 'start'

- 'start' and 'start' - 'stop' of the converter.

This goal is achieved by the fact that a pulse sequence analyzer, an additional register and a delay element are inserted into the converter, the output of which is connected to a single input of the control trigger and to the 'set to θ' input of the counter, the outputs of the counter are connected to the information inputs of the additional register, the synchronizing input of which is connected to the output of the pulse shaper 'start', to the input of the delay element, the zero input of the trigger and to the first input of the analyzer of pulse sequences, the second input after the bottom is connected to the output of the pulse shaper 'stop', and the output is connected to the output terminal of the converter.

In FIG. 1 is a block diagram. converter; in FIG. 2 and 3 are timing diagrams of the operation of the converter.

The converter contains a generator of 1 clock pulses, drivers 2 and 3 of pulses 'stop' and 'start', an analyzer of 4 pulses, element 5 .. delays, trigger 6 control element? And, counter 8, register 9, additional register 10, element 11 and 12 are NOT, elements 13, 14 and 15 AND, triggers .16, 17 and 18.. '...............

The output of the clock pulse generator 1 is connected to the inputs of the stop and start pulsers 2 and 3 and the first input of the And element 7, the second input of which is connected to the output of the trigger 6 of the control, and the output with the counter input of the counter 8, the outputs of which are connected respectively to the information inputs of registers 9 and 10, from the outputs of which information is taken. The input 'setting to O' of the counter 8 is connected to a single input of the trigger 6 of the control and the output of the delay element 5, the input of which is connected to the output of the pulse shaper 3 'start', the zero input of the trigger 6 of the control, the clock input of the register 10 and the first input of the analyzer 4 pulses, the second input of which is connected to the output of the driver 2 pulses' stop * and the clock input of the register 9, and the output is connected to the output terminal of the Converter.

For convenience, the operation of the converter in FIG. 1 shows one of the possible embodiments of the analyzer 4 pulses.

The first input of the 4 pulse analyzer is connected to the zero inputs of the triggers 1b, 17 and 18 and the input of the element

NOT, the output of which is connected to one input of episode 13 AND, another input!

which is connected to the second input of the 4-pulse analyzer, and the output is to the single input of the trigger 16, to the first input of the episode 15 I, and through element 12 is NOT to the first input of the element 14 AND, the second input of which is connected to the output of the trigger .16, and the output - with a single input of trigger 17, the output of which through the second input of element 15 AND 10 is connected σ by a single input of trigger 18, the output of which is connected to the output terminal of the device.

The converter operates as follows ₁₅ .

The pulses' start 'and' stop * in the shapers 2 and 3 are synchronized with negative pulses of the generator 1 clock pulses. The synchronized 2 'start' pulses are set in the 'О * control trigger 6, the code information from the counter 8 is copied to register 10 and through the delay element 5, the delay time of which is equal to the duration of the clock pulse period of the generator 1, reset the counter 8, set to' 1 ' control trigger 6, which allows the passage of clock pulses of generator 1 through element 7 AND to the counter input of counter 8.

The synchronized 'stop' pulses following from the output of the shaper 2 rewrite the code information from ₃₅ counter 8 into register 9 and enter the second input of the 4 pulse analyzer. Synchronized 'start' pulses are received at the first input of the 4 pulse analyzer, which _{set 4θ push the} triggers 16, 17, and ₁₈ into the 'θ' and the stop pulses coming to the second input through element 13 AND set the trigger 16 to '1' if at the other input of episode 13 And there is no over 45 strike, which is possible in the case of simultaneous receipt of pulses' start 'and' stop *. After setting trigger 16 to '1', on the back frbnt • of the synchronized pulse, 'stop' _{5θ will be} set to trigger 1 '1', which will give permission to trigger 18,

If the pulse 'stop' not received pulse 'start' and entered follows ₅₅ blowing momentum 'Stop *, then the triggered flip-flop 18, whose output is in the form of feature IA inverter output simultaneously from the code registers information 9 and 10. 762169

When for each pulse 'start * one pulse' stop * is received, then the output of the pulse analyzer is '0 * and the code information transmitted from registers 9 and 10 determines the time intervals between the pulses' start * - 'stop' (T *), respectively and 'start' - 'stop' (TF) (see Fig. Over).

In the case when two pulses of “stop” arrived at one pulse “start”, then at the output of the analyzer there are 4 pulses - “1” and the time interval between pulses “start” -. “Start” (T ^) corresponds to the code received from register 10, and the time interval 'start' - 'stop' (T-,) is determined as follows:

at the minimum values of the measured parameter Τ γ is determined by subtracting the codes of register 10 (Tu) and register 9 (TD) (see Fig. 36)

Т = t ₂ - t ₃ , at the maximum values of the measured parameter - by adding the codes of register 10 (T ^) and register 9 (T $) (see Fig. Sv)

T, = T ₂ + t _b .

Using this converter of time intervals into code allows you to measure time intervals

- between each previous and subsequent impulses' start 'and the time intervals between each impulses' start' and 'stop *. When used in cyclic transducers, the angle code of the proposed converter increases the accuracy of measuring the boundary values of the angle close to its minimum and maximum values.

Claims (1)

Claim The time interval converter into a code containing a clock pulse generator connected to the inputs of the start and stop pulse shapers and to the first input of the And element, the second input of which is connected to the output of the control trigger, and the output to the counter, the outputs of the counter are connected to information the inputs of the register, the synchronizing input of which is connected to the output of the pulse shaper 'stop', characterized in that, with an expansion circuit ~ of functionality due to the conversion of time intervals between pulses With “start” - “start” and “start” “stop”, a pulse sequence analyzer, an additional register and a delay element, the output of which is connected to a single input of the control trigger and to the input “set to O” of the counter, are entered into it, the outputs of the counter are connected with information inputs of an additional register, the synchronizing input of which is connected to the output of the 'start' pulse shaper, to the input of the delay element, the zero input of the trigger and to the first input of the pulse sequence analyzer, the second input of the last connection nen with the output of the pulse shaper 'stop', and the output with the output terminal of the converter.