SU762154A1 - Apparatus for measuring the time of the main maximum of periodic signal - Google Patents

Description

The invention relates to radio engineering, can be applied in the technique of transmitting discrete information.

A device is known for determining the presence of a temporary position of the main peaks appearing in an electrical signal [1]. The device contains a control and synchronization unit, serially connected analog-to-digital converter, delay element, converter to data from digital form to analog, the signal from which is fed to one of the inputs of the comparator. At the other input of the comparator receives a signal from the memory block through the weakening block. One output 15 of the synchronization and control unit is connected to an analog-to-digital converter, a delay element, and the other input is connected to a memory unit.

The device analyzes the signal at 20 27 (+1 time intervals and generates a cut-off function depending on the signal level at an odd number of intervals. The presence of the main peak of the electrical signal is determined by comparing the cut-off level with the signal delayed by the time required to generate the function the cutoff level, after which the temporary position of the signal peak is determined.

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• The device’s drawbacks include the need to generate the cut-off level function, as well as insufficient noise immunity, due to the fact that the decision on the temporary position of the maximum is determined based on the analysis of only one signal period, and when the signal maximum is found in noise, noise emissions may exceed the maximum signal value.

A device for determining the temporary position of the main maximum of a periodic signal, containing an analog-to-digital converter, one input of which is connected to the input of the device and another input connected to the first output of the control unit, to the input of which the reference frequency generator is connected, is known. the input of the multi-input comparison unit, the other inputs of which are connected to the corresponding outputs of the analog-to-digital converter and the outputs of the memory block whose inputs are through the block the census is connected to the mentioned outputs of the analog-to-digital converter, and the output of the multi-input comparison unit is connected to one of the inputs of the census block and the first input of the controlled shift register, the second input of which and the output output 762154

The first shift register is connected to the first output of the control unit, and the outputs of the controlled shift register through the census block are connected to the inputs of the shift register, the output of which is connected to one of the device outputs and the clock synchronization block input, the output of which is the output of the device that is connected to the input of the memory block and the input of the census block [2].

This device is not sufficiently robust, since the signal maximum is found as a result of a consecutive analysis of the signal values on one of its periods, and when the signal maximum is found in noise, noise emissions may exceed the maximum signal value.

The purpose of the invention is to improve the noise immunity of determining the temporal position of the averaged maximum of the signal.

To achieve this goal, a device containing an analog-to-digital converter, one input of which is connected to the input of the device and the other to the first input of the control unit, one output of the control unit is connected to the first input of the multi-input comparison unit, the output of the multi-input comparison unit is connected to one from the inputs of the census block and the first input of the controlled shift register, the second input of which and the input of the output ring shift register are connected to the second output of the control unit, and the outputs of the controlled register with Wig through the second census unit connected to the inputs of the output ring shift register, entered the adder, matrix registers, switch, additional controlled shift register, additional census block, additional output ring shift register, the coincidence element, and between the outputs of the analog-to-digital converter and the inputs of the multi-input unit comparisons included a series-connected adder, a register matrix, a switch, the first group of outputs of which is connected to the inputs of the adder, and the second subkey It is connected via a serially connected first census block and a memory block with inputs of a multi-input comparison unit, the output of which is connected to the input of an additional controlled register, whose outputs are connected to the inputs of an additional output ring register through the additional census block, one of the inputs of which is connected to the third output of the control unit; the fourth output of the control unit is connected to the inputs of the second census block, the additional census block and the memory block, the fifth output of the control block is connected to the input of the additional shift register, the sixth and seventh outputs of the control unit are connected to the switch inputs, the first output is connected to the matrix input

registers, the output of the output ring shift register is connected to the input of the match element, another input of which is connected to the output of the additional output ring shift register, and the output of the coincidence element is connected to the output of the device.

FIG. 1 shows the block diagram of the device; in fig. 2 shows the timing diagram explaining the principles of operation of the device.

The device contains an analog-to-digital converter 1, a control unit 2, an adder 3, an array of registers 4, a switch 5, a multi-input comparison unit 6, a census block 7, a controlled shift ring register 8, a controlled shift register 9, a memory block 10, an output ring shift register 11, the output ring shift register 12, the census block 13, the census block 14, the match item 15.

The device works as follows.

The input of analog-digital converter 1 receives a sequence of video pulses of various amplitudes with a period T. The analog-digital converter converts the current value of the signal into an L-bit parallel code with a sampling frequency over time when the input from the control unit receives 2 bursts of pulses with a burst duration ί ( Fig. 2, a). The Δ-bit parallel binary code arrives pg times in time ί to adder 3, where it is added to the result of the previous addition delayed by the period of the signal T in the matrix 4 formed by the t-bit registers 4, the number n of which is fed to the adder 3 through the switch 5 On the matrix of registers 4, forwarding pulses with a sampling rate of time (Fig. 2.6) are sent from the control unit 2, delayed by the time of converting the current signal value to the code и _η and coinciding with the control pulses of the switch.

From the outputs of the adder 3, the binary number in the parallel code goes to the inputs of the corresponding shift registers of the matrix 4, from the outputs of which is switched to the adder 3 or to the comparison unit 6 and the census block 7.

Switching to the adder is carried out by permitting pulses delayed by time 1 _n (Fig. 2, c).

The binary number from the switch 5 is fed simultaneously to the comparison unit 6 and the census block 7 upon receipt of 2 pulses at the switch with the control unit, the temporary position of which relative to the enabling pulses is shown in FIG. 2, d).

For each pulse with a sampling frequency of time delayed by ί _η ,

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from the comparison block 7, the lower digit of the ring register 8 and register 9 is written “1”, and to the remaining “O”, if the next value accumulated in K periods, the signal value in binary code is greater than the previous one. The previous value of the accumulated signal is stored in the memory unit 10, where it is overwritten by the signal from the comparison unit 7. Thus, the maximum value of the signal from the beginning of the analysis is stored in the memory unit 10. The propulsive pulses delayed relative to the recording time “1” in register 8 are sent to it from the control unit '2 at the sampling rate. The propulsive pulses delayed relative to the recording time “1” in register 10 arrive at it from the control unit 2 with a frequency. Thus, the position “1” in the t-bit ring register 8 corresponds to the time position of the largest averaged maximum of the signal in the L / -th part KN signal periods.

Position "1" in the / V-bit register

10 indicates that the highest averaged maximum belongs to one of the N parts of the signal period. Information about the temporary position of the highest average maximum is recorded in registers 8 and 9 with a delay relative to the end of the K periods at the time of the last analysis

I. Therefore, the census of information from registers 8 and 9 into the output ring register

11 and the output ring register 12 is performed at the beginning of the second period of the signal T in the next analysis cycle T _c of the signal periods (time point of Fig. 2, a) through T _c the census unit 13 and the census block 14.

The pulse characterizing the temporary position of the signal maximum is fed to the input of the coincidence element 15 when the units coming from the ring register 11, advanced by pulses with the sampling frequency, and the g-bit ring register 12, advanced by pulses with a period ί, coincide.

Thus, the use of this device, for example, in the equipment for the transmission of discrete information allows to increase its noise immunity.

Claims (1)

Claim A device for determining the temporary position of the main maximum of a periodic signal, containing an analog-to-digital converter, one input of which connected to the input of the device and the other to the first input of the control unit; one output of the control unit is connected to the first input of the multi-input comparison unit; the output of the multi-input comparison unit is connected to one of the inputs of the census block and the first input of the controlled shift register, the second input of which is the input output ring shift register connected to the second output of the control unit, and the outputs of the controlled shift register through the second census block are connected to the inputs of the output ring shift register, different t That, in order to improve noise immunity, an adder, a matrix of registers, a switch, an additional controlled shift register, an additional census block, an additional output circular shift register 20, a coincidence element, and between the outputs of the analog-to-digital converter and the inputs of the multi-input unit are entered into it comparisons include a series-connected adder, a register matrix, a switch, the first group of outputs of which is connected to the inputs of the adder, and the second one is connected via connected series The first census block and a memory block with inputs of a multi-input 30 comparison unit, the output of which is connected to the input of an additional controlled register, the outputs of which are connected to the inputs of an additional output ring 35 register through an additional census block, one of the inputs of which is connected to the third output of the control unit, the fourth the output of the control unit is connected to the inputs of the second census block, the additional census block and the memory block, 40 the fifth output of the control block is connected to the input of the additional register The shift bar, the sixth and seventh outputs of the control unit are connected to the inputs of the switch, the first output is connected to the input of matrix 45 of the register, the output of the output ring shift register is connected to the input of the coincidence element, another input of which is connected to the output of the additional output ring shift register, and the output of the element 50 a match is connected to the output of the device.