SU758167A1 - Digital sign correlator - Google Patents

Description

The invention is intended for use in information-measuring systems, in systems of automation of scientific research.

The sign correlator is known, which contains a sign analyzer consisting of a pulse-amplitude modulator connected in series, an amplitude selector, a pulse shaper [1]. Pulse shaper10

owls connected to one of the inputs of the time selector, the other input of which is connected to the trigger output.

The signal from the output of the selector is fed to the block 3 of the delay, the frequency divider 15 and one of the outputs of the circuit And, the input of which is connected to the pulse counter. The choice of the division factor of the frequency divider is determined by the total number of analyzed pulses 20 of the generator.

For an estimate of the probability of coincidence of characters in such a correlator, the quotient is taken from dividing the number of matched characters by the total number of characters. The value of * * on the delay when this is set multiple of the repetition period of the generator. For one implementation of a random process, one ordinate of the correlation function is calculated at 30

the fixed value of the correlation function argument. The estimate of the normalized correlation function is the cosine of the doubled probability value for the coincidence of the signs of one polarity.

The disadvantages of this device are the low speed of determining the ordinates of the correlation function, since the calculation of all points of the correlation function requires reproducing the original implementation of the random process as many times as the ordinates are necessary to determine and the impossibility of determining the sign correlation function, which leads to a limitation of the scope.

The multichannel sign correlator closest to the invention is known, which contains two sign analyzers, a sign memory unit, a pulse generator, AND elements, NOT elements, a counter-commutator and accumulative counters {2}.

The disadvantage of this correlator

is that, basically,

the amount of equipment is determined by the number of channels of the correlator.

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The aim of the invention is to simplify the device.

This is achieved by the fact that in a digital sign correlator containing the first and second sign analyzers, whose inputs are the first and second inputs of the device, a trigger, the first installation input of which is connected to the output of the second sign analyzer, and the second is connected to the output of the counter, a clock generator the output of which is connected to the input of the counter and to the first input of the element I, the second and third inputs of which are connected respectively to the outputs of the first analyzer of the sign and the trigger, a memory block is entered, an information input which is connected to the output element And, and the address inputs are connected to the corresponding bit outputs of the counter.

The drawing shows a block diagram of a digital sign correlator.

It contains a character analyzer 1, the input of which is one of the device inputs, and the output is connected to the input of the AND 2 element. Another input of the AND element is connected to the single output of the trigger 3. The output of the AND element is connected to the control input of the memory block 4. Address inputs of the memory block 4 connected to the corresponding outputs of the counter 5. The second analyzer mark 6, the input of which is the second input of the device connected to the installation input of the trigger 3. The output of the clock generator 7 is connected to the third input element And 2 and the counting input of the counter 5.

Comparators are used as a sign analyzer. The memory block is organized in such a way that when a signal arrives at the control input, the content unit of the memory cell whose number is specified on the address inputs increases by one.

memory block. The remaining elements of the scheme 45 No. ΐ are standard, commercially produced by industry.

The correlator determines the number of matched characters of uncorrelated pairs of samples of characters of input random processes for all ordinates of the correlation function for one realization of a random process. Accumulation of the number of matched characters of the corresponding ordinates of the correlation function. This occurs in the memory block.

The device works as follows.

Clock pulses coming from generator 7, produce the entry of "units" in counter 5 and the analysis of the coincidence of the signs of the sign sequences of the processes y (ι) from the output of the analyzer of the sign 1 and χ (ΐ) stored on

trigger 3. Counter 5 counts the clock pulses and controls

address inputs of the memory block. Whenever the number of clock pulses coincides with the number of detected

5 ordinates of the correlation functions., The counter 5 is set to the zero state and the "overflow" signal is generated, which enters the sign of the process x (ι) from the output of the comparator 6 into 10 trigger 3. An analysis of the signs of the input processes is performed on the element II. matches

characters a signal is generated that arrives at the control input of block 45 and produces 4 units of the cell contents of memory 4 indicated by counter 5. Each ordinate of the correlation function corresponds to one cell of the block 2θ of memory.

Consider the operation of the circuit since the generation of the signal "overflow"; The signal "overflow" causes the sign of the process χ (ι) to be triggered 3, the counter is set to the zero state 5, and the analysis of the coincidence of the signs y (z) and the newly stored χ () is performed. In the case of coincidence of characters, the content of the zero cell of the memory block is increased by one, which corresponds to the zero argument of the correlation function. The next clock pulse 35 produces an increase in the "unit" of counter 5 and a change in the contents of the first memory cell, which will correspond to the first argument of the correlation function. Subsequent clock pulses analyze the coincidence of characters for the next ordinates of the correlation function and increase the content of the corresponding cells of the memory unit by one. After Counting the number of clock pulses equal to the number of ordinates of the correlation function, the accumulation process will repeat again. The end of the analysis of the coincidence of the characters of the input random processes is determined by the clock generator.

Claims (1)

Claim A digital sign correlator containing the first and second sign analyzers, whose inputs are the first and second inputs of the correlator, respectively, a trigger, the first installation input of which is connected to the output of the second sign analyzer, and 60 is connected to the output of the counter, a clock generator whose output is connected to the input of the counter and with the first input of the element I, the second and third inputs of which are connected respectively to the outputs of the first analyte5 758167 6 mark and trigger masking, characterized in that, for the sake of simplicity, a memory block is inserted into the correlator, whose information input is connected to the output of the AND element, and the address inputs are connected to the corresponding bit outputs of the counter.